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Commit ef551c7e authored by Kai Germaschewski's avatar Kai Germaschewski
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ISDN/HiSax: Use {isac,hscx}_{read,write} and friends 

Using {isac,hscx}_{read,write} instead of the low-level
readreg/writereg simplifies the code a bit.
parent 8fa894ae
Show whitespace changes
Inline Side-by-side
Showing with 122 additions and 126 deletions
drivers/isdn/hisax/asuscom.c
View file @ ef551c7e
......@@ -207,32 +207,32 @@ asuscom_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u8 val;
spin_lock(&cs->lock);
val = readreg(cs, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs, cs->hw.asus.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs, cs->hw.asus.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
goto Start_ISAC;
}
writereg(cs, cs->hw.asus.hscx, HSCX_MASK, 0xFF);
writereg(cs, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs, cs->hw.asus.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.asus.isac, ISAC_MASK, 0x0);
writereg(cs, cs->hw.asus.hscx, HSCX_MASK, 0x0);
writereg(cs, cs->hw.asus.hscx, HSCX_MASK + 0x40, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......@@ -251,7 +251,7 @@ asuscom_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = readreg(cs, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -262,7 +262,7 @@ asuscom_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
hscx_int_main(cs, val);
}
if (ista & 0x20) {
val = 0xfe & readreg(cs, cs->hw.asus.isac, ISAC_ISTA | 0x80);
val = ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......
drivers/isdn/hisax/avm_a1.c
View file @ ef551c7e
......@@ -138,22 +138,22 @@ avm_a1_interrupt(int intno, void *dev_id, struct pt_regs *regs)
} else if (cs->debug & L1_DEB_INTSTAT)
debugl1(cs, "avm IntStatus %x", sval);
if (!(sval & AVM_A1_STAT_HSCX)) {
val = readreg(cs->hw.avm.hscx[1], HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val)
hscx_int_main(cs, val);
}
if (!(sval & AVM_A1_STAT_ISAC)) {
val = readreg(cs->hw.avm.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val)
isac_interrupt(cs, val);
}
}
writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0xFF);
writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0xFF);
writereg(cs->hw.avm.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.avm.isac, ISAC_MASK, 0x0);
writereg(cs->hw.avm.hscx[0], HSCX_MASK, 0x0);
writereg(cs->hw.avm.hscx[1], HSCX_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
drivers/isdn/hisax/bkm_a8.c
View file @ ef551c7e
......@@ -189,7 +189,7 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = readreg(cs, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -201,7 +201,7 @@ bkm_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
}
}
if (ista & 0x20) {
val = 0xfe & readreg(cs, ISAC_ISTA | 0x80);
val = ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......
drivers/isdn/hisax/elsa.c
View file @ ef551c7e
......@@ -357,24 +357,24 @@ elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
}
}
#endif
val = readreg(cs, cs->hw.elsa.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val) {
hscx_int_main(cs, val);
}
val = readreg(cs, cs->hw.elsa.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val) {
isac_interrupt(cs, val);
}
val = readreg(cs, cs->hw.elsa.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val && icnt) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
icnt--;
goto Start_HSCX;
}
val = readreg(cs, cs->hw.elsa.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val && icnt) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
......@@ -383,9 +383,9 @@ elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
}
if (!icnt)
printk(KERN_WARNING"ELSA IRQ LOOP\n");
writereg(cs, cs->hw.elsa.hscx, HSCX_MASK, 0xFF);
writereg(cs, cs->hw.elsa.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs, cs->hw.elsa.isac, ISAC_MASK, 0xFF);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
if (cs->hw.elsa.status & ELSA_TIMER_AKTIV) {
if (!TimerRun(cs)) {
/* Timer Restart */
......@@ -405,9 +405,9 @@ elsa_interrupt(int intno, void *dev_id, struct pt_regs *regs)
#endif
if (cs->hw.elsa.trig)
byteout(cs->hw.elsa.trig, 0x00);
writereg(cs, cs->hw.elsa.hscx, HSCX_MASK, 0x0);
writereg(cs, cs->hw.elsa.hscx, HSCX_MASK + 0x40, 0x0);
writereg(cs, cs->hw.elsa.isac, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x00);
hscx_write(cs, 1, HSCX_MASK, 0x00);
isac_write(cs, ISAC_MASK, 0x00);
unlock:
spin_unlock(&cs->lock);
}
......@@ -443,7 +443,7 @@ elsa_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = readreg(cs, cs->hw.elsa.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -454,7 +454,7 @@ elsa_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
hscx_int_main(cs, val);
}
if (ista & 0x20) {
val = 0xfe & readreg(cs, cs->hw.elsa.isac, ISAC_ISTA + 0x80);
val = ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......
drivers/isdn/hisax/gazel.c
View file @ ef551c7e
......@@ -318,7 +318,7 @@ gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
}
}
if (ista & 0x20) {
val = 0xfe & isac_read(cs, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......@@ -713,5 +713,5 @@ setup_gazel(struct IsdnCard *card)
break;
}
return (1);
return 1;
}
drivers/isdn/hisax/ix1_micro.c
View file @ ef551c7e
......@@ -169,32 +169,32 @@ ix1micro_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u8 val;
spin_lock(&cs->lock);
val = readreg(cs, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs, cs->hw.ix1.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs, cs->hw.ix1.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
goto Start_ISAC;
}
writereg(cs, cs->hw.ix1.hscx, HSCX_MASK, 0xFF);
writereg(cs, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs, cs->hw.ix1.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.ix1.isac, ISAC_MASK, 0);
writereg(cs, cs->hw.ix1.hscx, HSCX_MASK, 0);
writereg(cs, cs->hw.ix1.hscx, HSCX_MASK + 0x40, 0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
drivers/isdn/hisax/mic.c
View file @ ef551c7e
......@@ -164,32 +164,32 @@ mic_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u8 val;
spin_lock(&cs->lock);
val = readreg(cs, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs, cs->hw.mic.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs, cs->hw.mic.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
goto Start_ISAC;
}
writereg(cs, cs->hw.mic.hscx, HSCX_MASK, 0xFF);
writereg(cs, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs, cs->hw.mic.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.mic.isac, ISAC_MASK, 0x0);
writereg(cs, cs->hw.mic.hscx, HSCX_MASK, 0x0);
writereg(cs, cs->hw.mic.hscx, HSCX_MASK + 0x40, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
drivers/isdn/hisax/niccy.c
View file @ ef551c7e
......@@ -186,32 +186,32 @@ niccy_interrupt(int intno, void *dev_id, struct pt_regs *regs)
return;
outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
}
val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
goto Start_ISAC;
}
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0xFF);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0);
writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
drivers/isdn/hisax/s0box.c
View file @ ef551c7e
......@@ -186,22 +186,22 @@ s0box_interrupt(int intno, void *dev_id, struct pt_regs *regs)
int count = 0;
spin_lock(&cs->lock);
val = readreg(cs, cs->hw.teles3.hscx[1], HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs, cs->hw.teles3.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
count++;
val = readreg(cs, cs->hw.teles3.hscx[1], HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val && count < MAXCOUNT) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs, cs->hw.teles3.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val && count < MAXCOUNT) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
......@@ -209,12 +209,12 @@ s0box_interrupt(int intno, void *dev_id, struct pt_regs *regs)
}
if (count >= MAXCOUNT)
printk(KERN_WARNING "S0Box: more than %d loops in s0box_interrupt\n", count);
writereg(cs, cs->hw.teles3.hscx[0], HSCX_MASK, 0xFF);
writereg(cs, cs->hw.teles3.hscx[1], HSCX_MASK, 0xFF);
writereg(cs, cs->hw.teles3.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.teles3.isac, ISAC_MASK, 0x0);
writereg(cs, cs->hw.teles3.hscx[0], HSCX_MASK, 0x0);
writereg(cs, cs->hw.teles3.hscx[1], HSCX_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
drivers/isdn/hisax/saphir.c
View file @ ef551c7e
......@@ -160,21 +160,21 @@ saphir_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u8 val;
spin_lock(&cs->lock);
val = readreg(cs, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs, cs->hw.saphir.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs, cs->hw.saphir.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
......@@ -185,12 +185,13 @@ saphir_interrupt(int intno, void *dev_id, struct pt_regs *regs)
mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ);
else
printk(KERN_WARNING "saphir: Spurious timer!\n");
writereg(cs, cs->hw.saphir.hscx, HSCX_MASK, 0xFF);
writereg(cs, cs->hw.saphir.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs, cs->hw.saphir.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.saphir.isac, ISAC_MASK, 0);
writereg(cs, cs->hw.saphir.hscx, HSCX_MASK, 0);
writereg(cs, cs->hw.saphir.hscx, HSCX_MASK + 0x40, 0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
drivers/isdn/hisax/sedlbauer.c
View file @ ef551c7e
......@@ -328,32 +328,32 @@ sedlbauer_interrupt(int intno, void *dev_id, struct pt_regs *regs)
return;
}
val = readreg(cs, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
val = readreg(cs, cs->hw.sedl.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
goto Start_HSCX;
}
val = readreg(cs, cs->hw.sedl.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
goto Start_ISAC;
}
writereg(cs, cs->hw.sedl.hscx, HSCX_MASK, 0xFF);
writereg(cs, cs->hw.sedl.hscx, HSCX_MASK + 0x40, 0xFF);
writereg(cs, cs->hw.sedl.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.sedl.isac, ISAC_MASK, 0x0);
writereg(cs, cs->hw.sedl.hscx, HSCX_MASK, 0x0);
writereg(cs, cs->hw.sedl.hscx, HSCX_MASK + 0x40, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
}
static void
......@@ -371,7 +371,7 @@ sedlbauer_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug & L1_DEB_IPAC)
debugl1(cs, "IPAC ISTA %02X", ista);
if (ista & 0x0f) {
val = readreg(cs, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
val = hscx_read(cs, 1, HSCX_ISTA);
if (ista & 0x01)
val |= 0x01;
if (ista & 0x04)
......@@ -382,7 +382,7 @@ sedlbauer_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
hscx_int_main(cs, val);
}
if (ista & 0x20) {
val = 0xfe & readreg(cs, cs->hw.sedl.isac, ISAC_ISTA | 0x80);
val = ipac_dc_read(cs, ISAC_ISTA) & 0xfe;
if (val) {
isac_interrupt(cs, val);
}
......@@ -411,21 +411,21 @@ sedlbauer_interrupt_isar(int intno, void *dev_id, struct pt_regs *regs)
int cnt = 5;
spin_lock(&cs->lock);
val = readreg(cs, cs->hw.sedl.hscx, ISAR_IRQBIT);
val = isar_read(cs, 0, ISAR_IRQBIT);
Start_ISAR:
if (val & ISAR_IRQSTA)
isar_int_main(cs);
val = readreg(cs, cs->hw.sedl.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = readreg(cs, cs->hw.sedl.hscx, ISAR_IRQBIT);
val = isar_read(cs, 0, ISAR_IRQBIT);
if ((val & ISAR_IRQSTA) && --cnt) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "ISAR IntStat after IntRoutine");
goto Start_ISAR;
}
val = readreg(cs, cs->hw.sedl.isac, ISAC_ISTA);
val = isac_read(cs, ISAC_ISTA);
if (val && --cnt) {
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "ISAC IntStat after IntRoutine");
......@@ -435,10 +435,10 @@ sedlbauer_interrupt_isar(int intno, void *dev_id, struct pt_regs *regs)
if (cs->debug & L1_DEB_ISAC)
debugl1(cs, "Sedlbauer IRQ LOOP");
writereg(cs, cs->hw.sedl.hscx, ISAR_IRQBIT, 0);
writereg(cs, cs->hw.sedl.isac, ISAC_MASK, 0xFF);
writereg(cs, cs->hw.sedl.isac, ISAC_MASK, 0x0);
writereg(cs, cs->hw.sedl.hscx, ISAR_IRQBIT, ISAR_IRQMSK);
isar_write(cs, 0, ISAR_IRQBIT, 0);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
isar_write(cs, 0, ISAR_IRQBIT, ISAR_IRQMSK);
spin_unlock(&cs->lock);
}
......@@ -503,22 +503,17 @@ Sedl_card_msg(struct IsdnCardState *cs, int mt, void *arg)
return(0);
case CARD_RELEASE:
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
writereg(cs, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
writereg(cs, cs->hw.sedl.isac,
ISAC_MASK, 0xFF);
isar_write(cs, 0, ISAR_IRQBIT, 0);
isac_write(cs, ISAC_MASK, 0xFF);
reset_sedlbauer(cs);
writereg(cs, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
writereg(cs, cs->hw.sedl.isac,
ISAC_MASK, 0xFF);
isar_write(cs, 0, ISAR_IRQBIT, 0);
isac_write(cs, ISAC_MASK, 0xFF);
}
release_io_sedlbauer(cs);
return(0);
case CARD_INIT:
if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
writereg(cs, cs->hw.sedl.hscx,
ISAR_IRQBIT, 0);
isar_write(cs, 0, ISAR_IRQBIT, 0);
initisac(cs);
initisar(cs);
} else {
......@@ -747,8 +742,8 @@ setup_sedlbauer(struct IsdnCard *card)
*/
if (cs->hw.sedl.bus != SEDL_BUS_PCI) {
cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR;
val = readreg(cs,
cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC, IPAC_ID);
val = readreg(cs, cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC,
IPAC_ID);
printk(KERN_DEBUG "Sedlbauer: testing IPAC version %x\n", val);
if ((val == 1) || (val == 2)) {
/* IPAC */
......
drivers/isdn/hisax/sportster.c
View file @ ef551c7e
......@@ -129,7 +129,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs)
u8 val;
spin_lock(&cs->lock);
val = READHSCX(cs, 1, HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
Start_HSCX:
if (val)
hscx_int_main(cs, val);
......@@ -137,7 +137,7 @@ sportster_interrupt(int intno, void *dev_id, struct pt_regs *regs)
Start_ISAC:
if (val)
isac_interrupt(cs, val);
val = READHSCX(cs, 1, HSCX_ISTA);
val = hscx_read(cs, 1, HSCX_ISTA);
if (val) {
if (cs->debug & L1_DEB_HSCX)
debugl1(cs, "HSCX IntStat after IntRoutine");
......
drivers/isdn/hisax/teles3.c
View file @ ef551c7e
......@@ -156,12 +156,12 @@ teles3_interrupt(int intno, void *dev_id, struct pt_regs *regs)
}
if (count >= MAXCOUNT)
printk(KERN_WARNING "Teles3: more than %d loops in teles3_interrupt\n", count);
writereg(cs->hw.teles3.hscx[0], HSCX_MASK, 0xFF);
writereg(cs->hw.teles3.hscx[1], HSCX_MASK, 0xFF);
writereg(cs->hw.teles3.isac, ISAC_MASK, 0xFF);
writereg(cs->hw.teles3.isac, ISAC_MASK, 0x0);
writereg(cs->hw.teles3.hscx[0], HSCX_MASK, 0x0);
writereg(cs->hw.teles3.hscx[1], HSCX_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0xFF);
hscx_write(cs, 1, HSCX_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0xFF);
isac_write(cs, ISAC_MASK, 0x0);
hscx_write(cs, 0, HSCX_MASK, 0x0);
hscx_write(cs, 1, HSCX_MASK, 0x0);
spin_unlock(&cs->lock);
}
......
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