[PATCH] share i386/x86-64 oprofile code

The x86-64 port shares the oprofile code with i386.  This needs some
minor changes in the i386 oprofile, mostly to use
instruction_pointer(regs) to access the EIP instead of referencing it
directly.  On i386 this is a nop.

arch/i386/oprofile/nmi_int.c

@@ -233,6 +233,7 @@ int __init nmi_init(struct oprofile_operations ** ops, enum oprofile_cpu * cpu)
 			*cpu = OPROFILE_CPU_ATHLON;
 			break;
  
+#ifndef CONFIG_X86_64
 		case X86_VENDOR_INTEL:
 			/* Less than a P6-class processor */
 			if (family != 6)
@@ -248,6 +249,7 @@ int __init nmi_init(struct oprofile_operations ** ops, enum oprofile_cpu * cpu)
  
 			model = &op_ppro_spec;
 			break;
+#endif
 
 		default:
 			return 0;

arch/i386/oprofile/op_model_athlon.c

@@ -99,7 +99,7 @@ static int athlon_check_ctrs(unsigned int const cpu,
 	for (i = 0 ; i < NUM_COUNTERS; ++i) {
 		CTR_READ(low, high, msrs, i);
 		if (CTR_OVERFLOWED(low)) {
-			oprofile_add_sample(regs->eip, i, cpu);
+			oprofile_add_sample(instruction_pointer(regs), i, cpu);
 			CTR_WRITE(reset_value[i], msrs, i);
 			return 1;
 		}

arch/i386/oprofile/op_model_ppro.c

@@ -94,7 +94,7 @@ static int ppro_check_ctrs(unsigned int const cpu,
 	for (i = 0 ; i < NUM_COUNTERS; ++i) {
 		CTR_READ(low, high, msrs, i);
 		if (CTR_OVERFLOWED(low)) {
-			oprofile_add_sample(regs->eip, i, cpu);
+			oprofile_add_sample(instruction_pointer(regs), i, cpu);
 			CTR_WRITE(reset_value[i], msrs, i);
 			return 1;
 		}

arch/i386/oprofile/timer_int.c

@@ -21,7 +21,7 @@ static int timer_notify(struct notifier_block * self, unsigned long val, void *
 	struct pt_regs * regs = (struct pt_regs *)data;
 	int cpu = smp_processor_id();
  
-	oprofile_add_sample(regs->eip, 0, cpu);
+	oprofile_add_sample(instruction_pointer(regs), 0, cpu);
 	return 0;
 }