Commit f8f6eb0d authored by Alexander Graf's avatar Alexander Graf

KVM: PPC: Book3S PR: Ignore PMU SPRs

When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs
that we don't emulate. Just ignore accesses to them.
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent f24bc1ed
...@@ -455,6 +455,13 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) ...@@ -455,6 +455,13 @@ int kvmppc_core_emulate_mtspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
case SPRN_WPAR_GEKKO: case SPRN_WPAR_GEKKO:
case SPRN_MSSSR0: case SPRN_MSSSR0:
case SPRN_DABR: case SPRN_DABR:
#ifdef CONFIG_PPC_BOOK3S_64
case SPRN_MMCRS:
case SPRN_MMCRA:
case SPRN_MMCR0:
case SPRN_MMCR1:
case SPRN_MMCR2:
#endif
break; break;
unprivileged: unprivileged:
default: default:
...@@ -553,6 +560,13 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val ...@@ -553,6 +560,13 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
case SPRN_WPAR_GEKKO: case SPRN_WPAR_GEKKO:
case SPRN_MSSSR0: case SPRN_MSSSR0:
case SPRN_DABR: case SPRN_DABR:
#ifdef CONFIG_PPC_BOOK3S_64
case SPRN_MMCRS:
case SPRN_MMCRA:
case SPRN_MMCR0:
case SPRN_MMCR1:
case SPRN_MMCR2:
#endif
*spr_val = 0; *spr_val = 0;
break; break;
default: default:
......
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