Commit f90203e0 authored by Linus Torvalds's avatar Linus Torvalds

Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc

* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (61 commits)
  [POWERPC] Use udbg_early_init() on ppc32
  [POWERPC] Open Firmware serial port driver
  [POWERPC] Move MPIC smp routines into mpic.c
  [POWERPC] Cleanup pseries kexec code
  [POWERPC] Cleanup pseries smp initialisation code
  [POWERPC] Consolidate pseries platform header files into pseries.h
  [POWERPC] 85xx: Drop use of SYNC macro in head_fsl_booke.S
  [POWERPC] cell: pm_rtas_activat_signals routine cleanup
  [POWERPC] cell: PPU Oprofile cleanup patch
  [POWERPC] spufs: avoid accessing kernel memory through mmapped /mem node
  [POWERPC] spu sched: static timeslicing for SCHED_RR contexts
  [POWERPC] spu sched: use DECLARE_BITMAP
  [POWERPC] spu sched: forced preemption at execution
  [POWERPC] spu sched: update some comments
  [POWERPC] spu sched: simplity spu_remove_from_active_list
  [POWERPC] spufs: optimize spu_run
  [POWERPC] spufs: runqueue simplification
  [POWERPC] spufs: move prio to spu_context
  [POWERPC] spufs: state_mutex cleanup
  [POWERPC] spufs: simplify state_mutex
  ...
parents 33e563c1 719c91cc
......@@ -1334,6 +1334,9 @@ platforms are moved over to use the flattened-device-tree model.
fsl-usb2-mph compatible controllers. Either this property or
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
controllers.
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
controllers. Can be "host", "peripheral", or "otg". Default to
"host" if not defined for backward compatibility.
Recommended properties :
- interrupts : <a b> where a is the interrupt number and b is a
......@@ -1367,6 +1370,7 @@ platforms are moved over to use the flattened-device-tree model.
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 1>;
dr_mode = "otg";
phy = "ulpi";
};
......
......@@ -876,7 +876,7 @@ config ARCH_SPARSEMEM_ENABLE
config ARCH_SPARSEMEM_DEFAULT
def_bool y
depends on (SMP && PPC_PSERIES) || PPC_CELL
depends on (SMP && PPC_PSERIES) || PPC_PS3
config ARCH_POPULATES_NODE_MAP
def_bool y
......
/*
* Device Tree Souce for Buffalo KuroboxHD
*
* Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use
* the default configuration linkstation_defconfig.
*
* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
XXXX add flash parts, rtc, ??
build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
*/
/ {
linux,phandle = <1000>;
model = "KuroboxHD";
compatible = "linkstation";
#address-cells = <1>;
#size-cells = <1>;
cpus {
linux,phandle = <2000>;
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,603e { /* Really 8241 */
linux,phandle = <2100>;
linux,boot-cpu;
device_type = "cpu";
reg = <0>;
clock-frequency = <bebc200>; /* Fixed by bootwrapper */
timebase-frequency = <1743000>; /* Fixed by bootwrapper */
bus-frequency = <0>; /* From bootloader */
/* Following required by dtc but not used */
i-cache-line-size = <0>;
d-cache-line-size = <0>;
i-cache-size = <4000>;
d-cache-size = <4000>;
};
};
memory {
linux,phandle = <3000>;
device_type = "memory";
reg = <00000000 04000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
linux,phandle = <4000>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
reg = <80000000 00100000>;
ranges = <80000000 80000000 70000000 /* pci mem space */
fc000000 fc000000 00100000 /* EUMB */
fe000000 fe000000 00c00000 /* pci i/o space */
fec00000 fec00000 00300000 /* pci cfg regs */
fef00000 fef00000 00100000>; /* pci iack */
i2c@80003000 {
linux,phandle = <4300>;
device_type = "i2c";
compatible = "fsl-i2c";
reg = <80003000 1000>;
interrupts = <5 2>;
interrupt-parent = <4400>;
};
serial@80004500 {
linux,phandle = <4511>;
device_type = "serial";
compatible = "ns16550";
reg = <80004500 8>;
clock-frequency = <5d08d88>;
current-speed = <2580>;
interrupts = <9 2>;
interrupt-parent = <4400>;
};
serial@80004600 {
linux,phandle = <4512>;
device_type = "serial";
compatible = "ns16550";
reg = <80004600 8>;
clock-frequency = <5d08d88>;
current-speed = <e100>;
interrupts = <a 0>;
interrupt-parent = <4400>;
};
pic@80040000 {
linux,phandle = <4400>;
#interrupt-cells = <2>;
#address-cells = <0>;
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
reg = <80040000 40000>;
built-in;
};
pci@fec00000 {
linux,phandle = <4500>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
reg = <fec00000 400000>;
ranges = <01000000 0 0 fe000000 0 00c00000
02000000 0 80000000 80000000 0 70000000>;
bus-range = <0 ff>;
clock-frequency = <7f28155>;
interrupt-parent = <4400>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 - IRQ0 ETH */
5800 0 0 1 4400 0 1
5800 0 0 2 4400 1 1
5800 0 0 3 4400 2 1
5800 0 0 4 4400 3 1
/* IDSEL 0x12 - IRQ1 IDE0 */
6000 0 0 1 4400 1 1
6000 0 0 2 4400 2 1
6000 0 0 3 4400 3 1
6000 0 0 4 4400 0 1
/* IDSEL 0x14 - IRQ3 USB2.0 */
7000 0 0 1 4400 3 1
7000 0 0 2 4400 3 1
7000 0 0 3 4400 3 1
7000 0 0 4 4400 3 1
>;
};
};
};
/*
* Lite5200 board Device Tree Source
*
* Copyright 2006 Secret Lab Technologies Ltd.
* Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
......@@ -17,8 +17,9 @@
*/
/ {
model = "Lite5200";
compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx";
model = "fsl,lite5200";
// revision = "1.0";
compatible = "fsl,lite5200\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
......@@ -47,14 +48,17 @@ memory {
};
soc5200@f0000000 {
model = "fsl,mpc5200";
revision = "" // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "mpc5200-cdm\0mpc52xx-cdm";
compatible = "mpc5200-cdm";
reg = <200 38>;
};
......@@ -64,77 +68,86 @@ pic@500 {
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
compatible = "mpc5200-pic\0mpc52xx-pic";
compatible = "mpc5200-pic";
reg = <500 80>;
built-in;
};
gpt@600 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <500>;
has-wdt;
};
gpt@610 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <500>;
};
gpt@620 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <500>;
};
gpt@630 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <500>;
};
gpt@640 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <500>;
};
gpt@650 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <500>;
};
gpt@660 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <500>;
};
gpt@670 { // General Purpose Timer
compatible = "mpc5200-gpt\0mpc52xx-gpt";
compatible = "mpc5200-gpt";
device_type = "gpt";
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
interrupt-parent = <500>;
};
rtc@800 { // Real time clock
compatible = "mpc5200-rtc\0mpc52xx-rtc";
compatible = "mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
......@@ -143,7 +156,8 @@ rtc@800 { // Real time clock
mscan@900 {
device_type = "mscan";
compatible = "mpc5200-mscan\0mpc52xx-mscan";
compatible = "mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <500>;
reg = <900 80>;
......@@ -151,21 +165,22 @@ mscan@900 {
mscan@980 {
device_type = "mscan";
compatible = "mpc5200-mscan\0mpc52xx-mscan";
compatible = "mpc5200-mscan";
cell-index = <1>;
interrupts = <1 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
gpio@b00 {
compatible = "mpc5200-gpio\0mpc52xx-gpio";
compatible = "mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <500>;
};
gpio-wkup@b00 {
compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup";
compatible = "mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <500>;
......@@ -176,7 +191,7 @@ pci@0d00 {
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "mpc5200-pci\0mpc52xx-pci";
compatible = "mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 500 0 0 3
......@@ -194,7 +209,7 @@ c000 0 0 3 500 0 0 3
spi@f00 {
device_type = "spi";
compatible = "mpc5200-spi\0mpc52xx-spi";
compatible = "mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <500>;
......@@ -202,7 +217,7 @@ spi@f00 {
usb@1000 {
device_type = "usb-ohci-be";
compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be";
compatible = "mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <500>;
......@@ -210,7 +225,7 @@ usb@1000 {
bestcomm@1200 {
device_type = "dma-controller";
compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm";
compatible = "mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
......@@ -220,67 +235,73 @@ bestcomm@1200 {
};
xlb@1f00 {
compatible = "mpc5200-xlb\0mpc52xx-xlb";
compatible = "mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
compatible = "mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
// PSC2 in spi mode example
spi@2200 { // PSC2
device_type = "spi";
compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi";
reg = <2200 100>;
interrupts = <2 2 0>;
interrupt-parent = <500>;
};
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
// device_type = "sound";
// compatible = "mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// interrupt-parent = <500>;
//};
// PSC3 in CODEC mode example
i2s@2400 { // PSC3
device_type = "sound";
compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s";
reg = <2400 100>;
interrupts = <2 3 0>;
interrupt-parent = <500>;
};
//i2s@2400 { // PSC3
// device_type = "sound";
// compatible = "mpc5200-psc-i2s";
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// interrupt-parent = <500>;
//};
// PSC4 unconfigured
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
// compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
// PSC5 unconfigured
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
// compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
// PSC6 in AC97 mode example
ac97@2c00 { // PSC6
device_type = "sound";
compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97";
reg = <2c00 100>;
interrupts = <2 4 0>;
interrupt-parent = <500>;
};
// PSC6 in spi mode example
//spi@2c00 { // PSC6
// device_type = "spi";
// compatible = "mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
// interrupt-parent = <500>;
//};
ethernet@3000 {
device_type = "network";
compatible = "mpc5200-fec\0mpc52xx-fec";
compatible = "mpc5200-fec";
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
......@@ -289,7 +310,7 @@ ethernet@3000 {
ata@3a00 {
device_type = "ata";
compatible = "mpc5200-ata\0mpc52xx-ata";
compatible = "mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <500>;
......@@ -297,7 +318,8 @@ ata@3a00 {
i2c@3d00 {
device_type = "i2c";
compatible = "mpc5200-i2c\0mpc52xx-i2c";
compatible = "mpc5200-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
......@@ -305,14 +327,15 @@ i2c@3d00 {
i2c@3d40 {
device_type = "i2c";
compatible = "mpc5200-i2c\0mpc52xx-i2c";
compatible = "mpc5200-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
};
sram@8000 {
device_type = "sram";
compatible = "mpc5200-sram\0mpc52xx-sram\0sram";
compatible = "mpc5200-sram\0sram";
reg = <8000 4000>;
};
};
......
/*
* Lite5200B board Device Tree Source
*
* Copyright 2006 Secret Lab Technologies Ltd.
* Copyright 2006-2007 Secret Lab Technologies Ltd.
* Grant Likely <grant.likely@secretlab.ca>
*
* This program is free software; you can redistribute it and/or modify it
......@@ -17,8 +17,9 @@
*/
/ {
model = "Lite5200b";
compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx";
model = "fsl,lite5200b";
// revision = "1.0";
compatible = "fsl,lite5200b\0generic-mpc5200";
#address-cells = <1>;
#size-cells = <1>;
......@@ -47,14 +48,17 @@ memory {
};
soc5200@f0000000 {
model = "fsl,mpc5200b";
revision = ""; // from bootloader
#interrupt-cells = <3>;
device_type = "soc";
ranges = <0 f0000000 f0010000>;
reg = <f0000000 00010000>;
bus-frequency = <0>; // from bootloader
system-frequency = <0>; // from bootloader
cdm@200 {
compatible = "mpc5200b-cdm\0mpc52xx-cdm";
compatible = "mpc5200b-cdm\0mpc5200-cdm";
reg = <200 38>;
};
......@@ -64,77 +68,86 @@ pic@500 {
interrupt-controller;
#interrupt-cells = <3>;
device_type = "interrupt-controller";
compatible = "mpc5200b-pic\0mpc52xx-pic";
compatible = "mpc5200b-pic\0mpc5200-pic";
reg = <500 80>;
built-in;
};
gpt@600 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <500>;
has-wdt;
};
gpt@610 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
interrupt-parent = <500>;
};
gpt@620 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
interrupt-parent = <500>;
};
gpt@630 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
interrupt-parent = <500>;
};
gpt@640 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
interrupt-parent = <500>;
};
gpt@650 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
interrupt-parent = <500>;
};
gpt@660 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
interrupt-parent = <500>;
};
gpt@670 { // General Purpose Timer
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
compatible = "mpc5200b-gpt\0mpc5200-gpt";
device_type = "gpt";
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
interrupt-parent = <500>;
};
rtc@800 { // Real time clock
compatible = "mpc5200b-rtc\0mpc52xx-rtc";
compatible = "mpc5200b-rtc\0mpc5200-rtc";
device_type = "rtc";
reg = <800 100>;
interrupts = <1 5 0 1 6 0>;
......@@ -143,7 +156,8 @@ rtc@800 { // Real time clock
mscan@900 {
device_type = "mscan";
compatible = "mpc5200b-mscan\0mpc52xx-mscan";
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <0>;
interrupts = <2 11 0>;
interrupt-parent = <500>;
reg = <900 80>;
......@@ -151,21 +165,22 @@ mscan@900 {
mscan@980 {
device_type = "mscan";
compatible = "mpc5200b-mscan\0mpc52xx-mscan";
compatible = "mpc5200b-mscan\0mpc5200-mscan";
cell-index = <1>;
interrupts = <1 12 0>;
interrupt-parent = <500>;
reg = <980 80>;
};
gpio@b00 {
compatible = "mpc5200b-gpio\0mpc52xx-gpio";
compatible = "mpc5200b-gpio\0mpc5200-gpio";
reg = <b00 40>;
interrupts = <1 7 0>;
interrupt-parent = <500>;
};
gpio-wkup@b00 {
compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup";
compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
reg = <c00 40>;
interrupts = <1 8 0 0 3 0>;
interrupt-parent = <500>;
......@@ -176,7 +191,7 @@ pci@0d00 {
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
compatible = "mpc5200b-pci\0mpc52xx-pci";
compatible = "mpc5200b-pci\0mpc5200-pci";
reg = <d00 100>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
......@@ -199,7 +214,7 @@ c800 0 0 3 500 1 3 3
spi@f00 {
device_type = "spi";
compatible = "mpc5200b-spi\0mpc52xx-spi";
compatible = "mpc5200b-spi\0mpc5200-spi";
reg = <f00 20>;
interrupts = <2 d 0 2 e 0>;
interrupt-parent = <500>;
......@@ -207,7 +222,7 @@ spi@f00 {
usb@1000 {
device_type = "usb-ohci-be";
compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be";
compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
reg = <1000 ff>;
interrupts = <2 6 0>;
interrupt-parent = <500>;
......@@ -215,7 +230,7 @@ usb@1000 {
bestcomm@1200 {
device_type = "dma-controller";
compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm";
compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
reg = <1200 80>;
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
3 4 0 3 5 0 3 6 0 3 7 0
......@@ -225,67 +240,73 @@ bestcomm@1200 {
};
xlb@1f00 {
compatible = "mpc5200b-xlb\0mpc52xx-xlb";
compatible = "mpc5200b-xlb\0mpc5200-xlb";
reg = <1f00 100>;
};
serial@2000 { // PSC1
device_type = "serial";
compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
port-number = <0>; // Logical port assignment
cell-index = <0>;
reg = <2000 100>;
interrupts = <2 1 0>;
interrupt-parent = <500>;
};
// PSC2 in spi mode example
spi@2200 { // PSC2
device_type = "spi";
compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi";
reg = <2200 100>;
interrupts = <2 2 0>;
interrupt-parent = <500>;
};
// PSC2 in ac97 mode example
//ac97@2200 { // PSC2
// device_type = "sound";
// compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
// cell-index = <1>;
// reg = <2200 100>;
// interrupts = <2 2 0>;
// interrupt-parent = <500>;
//};
// PSC3 in CODEC mode example
i2s@2400 { // PSC3
device_type = "sound";
compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s";
reg = <2400 100>;
interrupts = <2 3 0>;
interrupt-parent = <500>;
};
//i2s@2400 { // PSC3
// device_type = "sound";
// compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
// cell-index = <2>;
// reg = <2400 100>;
// interrupts = <2 3 0>;
// interrupt-parent = <500>;
//};
// PSC4 unconfigured
// PSC4 in uart mode example
//serial@2600 { // PSC4
// device_type = "serial";
// compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
// cell-index = <3>;
// reg = <2600 100>;
// interrupts = <2 b 0>;
// interrupt-parent = <500>;
//};
// PSC5 unconfigured
// PSC5 in uart mode example
//serial@2800 { // PSC5
// device_type = "serial";
// compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
// cell-index = <4>;
// reg = <2800 100>;
// interrupts = <2 c 0>;
// interrupt-parent = <500>;
//};
// PSC6 in AC97 mode example
ac97@2c00 { // PSC6
device_type = "sound";
compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97";
reg = <2c00 100>;
interrupts = <2 4 0>;
interrupt-parent = <500>;
};
// PSC6 in spi mode example
//spi@2c00 { // PSC6
// device_type = "spi";
// compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
// cell-index = <5>;
// reg = <2c00 100>;
// interrupts = <2 4 0>;
// interrupt-parent = <500>;
//};
ethernet@3000 {
device_type = "network";
compatible = "mpc5200b-fec\0mpc52xx-fec";
compatible = "mpc5200b-fec\0mpc5200-fec";
reg = <3000 800>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
......@@ -294,7 +315,7 @@ ethernet@3000 {
ata@3a00 {
device_type = "ata";
compatible = "mpc5200b-ata\0mpc52xx-ata";
compatible = "mpc5200b-ata\0mpc5200-ata";
reg = <3a00 100>;
interrupts = <2 7 0>;
interrupt-parent = <500>;
......@@ -302,7 +323,8 @@ ata@3a00 {
i2c@3d00 {
device_type = "i2c";
compatible = "mpc5200b-i2c\0mpc52xx-i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c";
cell-index = <0>;
reg = <3d00 40>;
interrupts = <2 f 0>;
interrupt-parent = <500>;
......@@ -310,14 +332,15 @@ i2c@3d00 {
i2c@3d40 {
device_type = "i2c";
compatible = "mpc5200b-i2c\0mpc52xx-i2c";
compatible = "mpc5200b-i2c\0mpc5200-i2c";
cell-index = <1>;
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <500>;
};
sram@8000 {
device_type = "sram";
compatible = "mpc5200b-sram\0mpc52xx-sram\0sram";
compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
reg = <8000 4000>;
};
};
......
/*
* MPC8313E RDB Device Tree Source
*
* Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "MPC8313ERDB";
compatible = "MPC83xx";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8313@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <4000>; // L1, 16K
i-cache-size = <4000>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
32-bit;
};
};
memory {
device_type = "memory";
reg = <00000000 08000000>; // 128MB at 0
};
soc8313@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <200 100>;
};
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
dfsrr;
};
i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
mode = <0>;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
phy_type = "utmi_wide";
};
mdio@24520 {
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <700>;
interrupts = <13 2>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@4 {
linux,phandle = <2452004>;
interrupt-parent = <700>;
interrupts = <14 2>;
reg = <4>;
device_type = "ethernet-phy";
};
};
ethernet@24000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <25 8 24 8 23 8>;
interrupt-parent = <700>;
phy-handle = <2452001>;
};
ethernet@25000 {
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <22 8 21 8 20 8>;
interrupt-parent = <700>;
phy-handle = <2452004>;
};
serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <9 8>;
interrupt-parent = <700>;
};
serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <a 8>;
interrupt-parent = <700>;
};
pci@8500 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
7000 0 0 1 700 12 8
7000 0 0 2 700 12 8
7000 0 0 3 700 12 8
7000 0 0 4 700 12 8
/* IDSEL 0x0F - PCI slot */
7800 0 0 1 700 11 8
7800 0 0 2 700 12 8
7800 0 0 3 700 11 8
7800 0 0 4 700 12 8>;
interrupt-parent = <700>;
interrupts = <42 8>;
bus-range = <0 0>;
ranges = <02000000 0 90000000 90000000 0 10000000
42000000 0 80000000 80000000 0 10000000
01000000 0 00000000 e2000000 0 00100000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <8500 100>;
compatible = "83xx";
device_type = "pci";
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <30000 7000>;
interrupts = <b 8>;
interrupt-parent = <700>;
/* Rev. 2.2 */
num-channels = <1>;
channel-fifo-len = <18>;
exec-units-mask = <0000004c>;
descriptor-types-mask = <0122003f>;
};
/* IPIC
* interrupts cell = <intr #, sense>
* sense values match linux IORESOURCE_IRQ_* defines:
* sense == 8: Level, low assertion
* sense == 2: Edge, high-to-low change
*/
pic@700 {
linux,phandle = <700>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <700 100>;
built-in;
device_type = "ipic";
};
};
};
/*
* MPC8349E-mITX-GP Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "MPC8349EMITXGP";
compatible = "MPC834xMITXGP";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>;
i-cache-line-size = <20>;
d-cache-size = <8000>;
i-cache-size = <8000>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
32-bit;
};
};
memory {
device_type = "memory";
reg = <00000000 10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
reg = <200 100>;
};
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = <700>;
dfsrr;
};
i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = <700>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "mpc83xx_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = <700>;
mode = <0>;
};
usb@23000 {
device_type = "usb";
compatible = "fsl-usb2-dr";
reg = <23000 1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
dr_mode = "otg";
phy_type = "ulpi";
};
mdio@24520 {
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <24520>;
/* Vitesse 8201 */
ethernet-phy@1c {
linux,phandle = <245201c>;
interrupt-parent = <700>;
interrupts = <12 2>;
reg = <1c>;
device_type = "ethernet-phy";
};
};
ethernet@24000 {
device_type = "network";
model = "TSEC";
compatible = "gianfar";
reg = <24000 1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <20 8 21 8 22 8>;
interrupt-parent = <700>;
phy-handle = <245201c>;
};
serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>; // from bootloader
interrupts = <9 8>;
interrupt-parent = <700>;
};
serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>; // from bootloader
interrupts = <a 8>;
interrupt-parent = <700>;
};
pci@8600 {
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
7800 0 0 1 700 14 8 /* PCI_INTA */
7800 0 0 2 700 15 8 /* PCI_INTB */
>;
interrupt-parent = <700>;
interrupts = <43 8>;
bus-range = <1 1>;
ranges = <42000000 0 a0000000 a0000000 0 10000000
02000000 0 b0000000 b0000000 0 10000000
01000000 0 00000000 e3000000 0 01000000>;
clock-frequency = <3f940aa>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <8600 100>;
compatible = "83xx";
device_type = "pci";
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <30000 10000>;
interrupts = <b 8>;
interrupt-parent = <700>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
descriptor-types-mask = <01010ebf>;
};
pic@700 {
linux,phandle = <700>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <700 100>;
built-in;
device_type = "ipic";
};
};
};
......@@ -39,6 +39,11 @@ memory {
reg = <00000000 10000000>; // 256MB at 0
};
bcsr@e2400000 {
device_type = "board-control";
reg = <e2400000 8000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
......@@ -103,6 +108,7 @@ usb@23000 {
#size-cells = <0>;
interrupt-parent = <700>;
interrupts = <26 2>;
dr_mode = "otg";
phy_type = "ulpi";
};
......
/*
* MPC8568E MDS Device Tree Source
*
* Copyright 2007 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/*
/memreserve/ 00000000 1000000;
*/
/ {
model = "MPC8568EMDS";
compatible = "MPC85xxMDS";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells = <0>;
linux,phandle = <200>;
PowerPC,8568@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K
i-cache-size = <8000>; // L1, 32K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
32-bit;
linux,phandle = <201>;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 10000000>;
};
bcsr@f8000000 {
device_type = "board-control";
reg = <f8000000 8000>;
};
soc8568@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
reg = <e0000000 00100000>;
bus-frequency = <0>;
i2c@3000 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
dfsrr;
};
i2c@3100 {
device_type = "i2c";
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <1b 2>;
interrupt-parent = <40000>;
dfsrr;
};
mdio@24520 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "mdio";
compatible = "gianfar";
reg = <24520 20>;
linux,phandle = <24520>;
ethernet-phy@0 {
linux,phandle = <2452000>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
};
ethernet-phy@1 {
linux,phandle = <2452001>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
};
ethernet-phy@2 {
linux,phandle = <2452002>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
};
ethernet-phy@3 {
linux,phandle = <2452003>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
};
};
ethernet@24000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <24000 1000>;
mac-address = [ 00 00 00 00 00 00 ];
interrupts = <d 2 e 2 12 2>;
interrupt-parent = <40000>;
phy-handle = <2452002>;
};
ethernet@25000 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
reg = <25000 1000>;
mac-address = [ 00 00 00 00 00 00];
interrupts = <13 2 14 2 18 2>;
interrupt-parent = <40000>;
phy-handle = <2452003>;
};
serial@4500 {
device_type = "serial";
compatible = "ns16550";
reg = <4500 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
interrupt-parent = <40000>;
};
serial@4600 {
device_type = "serial";
compatible = "ns16550";
reg = <4600 100>;
clock-frequency = <0>;
interrupts = <1a 2>;
interrupt-parent = <40000>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
reg = <30000 f000>;
interrupts = <1d 2>;
interrupt-parent = <40000>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <000000fe>;
descriptor-types-mask = <012b0ebf>;
};
pic@40000 {
linux,phandle = <40000>;
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <40000 40000>;
built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
};
par_io@e0100 {
reg = <e0100 100>;
device_type = "par_io";
num-ports = <7>;
ucc_pin@01 {
linux,phandle = <e010001>;
pio-map = <
/* port pin dir open_drain assignment has_irq */
4 0a 1 0 2 0 /* TxD0 */
4 09 1 0 2 0 /* TxD1 */
4 08 1 0 2 0 /* TxD2 */
4 07 1 0 2 0 /* TxD3 */
4 17 1 0 2 0 /* TxD4 */
4 16 1 0 2 0 /* TxD5 */
4 15 1 0 2 0 /* TxD6 */
4 14 1 0 2 0 /* TxD7 */
4 0f 2 0 2 0 /* RxD0 */
4 0e 2 0 2 0 /* RxD1 */
4 0d 2 0 2 0 /* RxD2 */
4 0c 2 0 2 0 /* RxD3 */
4 1d 2 0 2 0 /* RxD4 */
4 1c 2 0 2 0 /* RxD5 */
4 1b 2 0 2 0 /* RxD6 */
4 1a 2 0 2 0 /* RxD7 */
4 0b 1 0 2 0 /* TX_EN */
4 18 1 0 2 0 /* TX_ER */
4 0f 2 0 2 0 /* RX_DV */
4 1e 2 0 2 0 /* RX_ER */
4 11 2 0 2 0 /* RX_CLK */
4 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0>; /* GTX125 */
};
ucc_pin@02 {
linux,phandle = <e010002>;
pio-map = <
/* port pin dir open_drain assignment has_irq */
5 0a 1 0 2 0 /* TxD0 */
5 09 1 0 2 0 /* TxD1 */
5 08 1 0 2 0 /* TxD2 */
5 07 1 0 2 0 /* TxD3 */
5 17 1 0 2 0 /* TxD4 */
5 16 1 0 2 0 /* TxD5 */
5 15 1 0 2 0 /* TxD6 */
5 14 1 0 2 0 /* TxD7 */
5 0f 2 0 2 0 /* RxD0 */
5 0e 2 0 2 0 /* RxD1 */
5 0d 2 0 2 0 /* RxD2 */
5 0c 2 0 2 0 /* RxD3 */
5 1d 2 0 2 0 /* RxD4 */
5 1c 2 0 2 0 /* RxD5 */
5 1b 2 0 2 0 /* RxD6 */
5 1a 2 0 2 0 /* RxD7 */
5 0b 1 0 2 0 /* TX_EN */
5 18 1 0 2 0 /* TX_ER */
5 10 2 0 2 0 /* RX_DV */
5 1e 2 0 2 0 /* RX_ER */
5 11 2 0 2 0 /* RX_CLK */
5 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0 /* GTX125 */
4 06 3 0 2 0 /* MDIO */
4 05 1 0 2 0>; /* MDC */
};
};
};
qe@e0080000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "qe";
model = "QE";
ranges = <0 e0080000 00040000>;
reg = <e0080000 480>;
brg-frequency = <0>;
bus-frequency = <179A7B00>;
muram@10000 {
device_type = "muram";
ranges = <0 00010000 0000c000>;
data-only@0{
reg = <0 c000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <80>;
mode = "cpu";
};
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
interrupt-parent = <80>;
mode = "cpu";
};
ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <80>;
mac-address = [ 00 04 9f 00 23 23 ];
rx-clock = <0>;
tx-clock = <19>;
phy-handle = <212000>;
pio-handle = <e010001>;
};
ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
model = "UCC";
device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <80>;
mac-address = [ 00 11 22 33 44 55 ];
rx-clock = <0>;
tx-clock = <14>;
phy-handle = <212001>;
pio-handle = <e010002>;
};
mdio@2120 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2120 18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
/* These are the same PHYs as on
* gianfar's MDIO bus */
ethernet-phy@00 {
linux,phandle = <212000>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <0>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@01 {
linux,phandle = <212001>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <1>;
device_type = "ethernet-phy";
interface = <6>;
};
ethernet-phy@02 {
linux,phandle = <212002>;
interrupt-parent = <40000>;
interrupts = <31 1>;
reg = <2>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
ethernet-phy@03 {
linux,phandle = <212003>;
interrupt-parent = <40000>;
interrupts = <32 1>;
reg = <3>;
device_type = "ethernet-phy";
interface = <6>; //ENET_1000_GMII
};
};
qeic@80 {
linux,phandle = <80>;
interrupt-controller;
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
reg = <80 80>;
built-in;
big-endian;
interrupts = <1e 2 1e 2>; //high:30 low:30
interrupt-parent = <40000>;
};
};
};
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Mon Jan 22 22:17:58 2007
# Linux kernel version: 2.6.20-rc6
# Sun Jan 28 23:13:56 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
......@@ -58,7 +58,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION="-kuroboxHG"
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
......@@ -206,7 +206,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
# CONFIG_SECCOMP is not set
CONFIG_SECCOMP=y
CONFIG_ISA_DMA_API=y
#
......@@ -312,39 +312,40 @@ CONFIG_NF_CONNTRACK=m
# CONFIG_NF_CT_ACCT is not set
# CONFIG_NF_CONNTRACK_MARK is not set
# CONFIG_NF_CONNTRACK_EVENTS is not set
# CONFIG_NF_CT_PROTO_SCTP is not set
# CONFIG_NF_CONNTRACK_AMANDA is not set
CONFIG_NF_CT_PROTO_GRE=m
CONFIG_NF_CT_PROTO_SCTP=m
CONFIG_NF_CONNTRACK_AMANDA=m
CONFIG_NF_CONNTRACK_FTP=m
# CONFIG_NF_CONNTRACK_H323 is not set
CONFIG_NF_CONNTRACK_H323=m
CONFIG_NF_CONNTRACK_IRC=m
# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
# CONFIG_NF_CONNTRACK_PPTP is not set
# CONFIG_NF_CONNTRACK_SIP is not set
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
CONFIG_NF_CONNTRACK_PPTP=m
CONFIG_NF_CONNTRACK_SIP=m
CONFIG_NF_CONNTRACK_TFTP=m
CONFIG_NETFILTER_XTABLES=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
CONFIG_NETFILTER_XT_TARGET_MARK=m
# CONFIG_NETFILTER_XT_TARGET_MARK is not set
# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
CONFIG_NETFILTER_XT_MATCH_ESP=m
CONFIG_NETFILTER_XT_MATCH_HELPER=m
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
# CONFIG_NETFILTER_XT_MATCH_ESP is not set
# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
CONFIG_NETFILTER_XT_MATCH_MAC=m
CONFIG_NETFILTER_XT_MATCH_MARK=m
# CONFIG_NETFILTER_XT_MATCH_MARK is not set
# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
# CONFIG_NETFILTER_XT_MATCH_REALM is not set
# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
# CONFIG_NETFILTER_XT_MATCH_STATE is not set
CONFIG_NETFILTER_XT_MATCH_STATE=m
# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
# CONFIG_NETFILTER_XT_MATCH_STRING is not set
# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
......@@ -359,12 +360,12 @@ CONFIG_NF_CONNTRACK_PROC_COMPAT=y
CONFIG_IP_NF_IPTABLES=m
CONFIG_IP_NF_MATCH_IPRANGE=m
# CONFIG_IP_NF_MATCH_TOS is not set
# CONFIG_IP_NF_MATCH_RECENT is not set
CONFIG_IP_NF_MATCH_RECENT=m
# CONFIG_IP_NF_MATCH_ECN is not set
# CONFIG_IP_NF_MATCH_AH is not set
# CONFIG_IP_NF_MATCH_TTL is not set
# CONFIG_IP_NF_MATCH_OWNER is not set
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
CONFIG_IP_NF_MATCH_OWNER=m
CONFIG_IP_NF_MATCH_ADDRTYPE=m
CONFIG_IP_NF_FILTER=m
CONFIG_IP_NF_TARGET_REJECT=m
# CONFIG_IP_NF_TARGET_LOG is not set
......@@ -374,16 +375,17 @@ CONFIG_NF_NAT=m
CONFIG_NF_NAT_NEEDED=y
CONFIG_IP_NF_TARGET_MASQUERADE=m
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_TARGET_NETMAP=m
CONFIG_IP_NF_TARGET_SAME=m
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
# CONFIG_NF_NAT_SNMP_BASIC is not set
CONFIG_NF_NAT_PROTO_GRE=m
CONFIG_NF_NAT_FTP=m
CONFIG_NF_NAT_IRC=m
CONFIG_NF_NAT_TFTP=m
# CONFIG_NF_NAT_AMANDA is not set
# CONFIG_NF_NAT_PPTP is not set
# CONFIG_NF_NAT_H323 is not set
# CONFIG_NF_NAT_SIP is not set
CONFIG_NF_NAT_AMANDA=m
CONFIG_NF_NAT_PPTP=m
CONFIG_NF_NAT_H323=m
CONFIG_NF_NAT_SIP=m
CONFIG_IP_NF_MANGLE=m
CONFIG_IP_NF_TARGET_TOS=m
CONFIG_IP_NF_TARGET_ECN=m
......@@ -472,6 +474,7 @@ CONFIG_MTD_PARTITIONS=y
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
......@@ -518,6 +521,7 @@ CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_START=0xffc00000
CONFIG_MTD_PHYSMAP_LEN=0x400000
CONFIG_MTD_PHYSMAP_BANKWIDTH=1
# CONFIG_MTD_PHYSMAP_OF is not set
# CONFIG_MTD_PLATRAM is not set
#
......@@ -540,6 +544,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
# NAND Flash Device Drivers
#
# CONFIG_MTD_NAND is not set
# CONFIG_MTD_NAND_CAFE is not set
#
# OneNAND Flash Device Drivers
......@@ -696,7 +701,7 @@ CONFIG_ATA=y
# CONFIG_PATA_HPT37X is not set
# CONFIG_PATA_HPT3X2N is not set
# CONFIG_PATA_HPT3X3 is not set
# CONFIG_PATA_IT821X is not set
CONFIG_PATA_IT821X=y
# CONFIG_PATA_JMICRON is not set
# CONFIG_PATA_TRIFLEX is not set
# CONFIG_PATA_MARVELL is not set
......@@ -763,11 +768,33 @@ CONFIG_TUN=m
#
# PHY device support
#
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
# CONFIG_NET_ETHERNET is not set
CONFIG_NET_ETHERNET=y
# CONFIG_MII is not set
# CONFIG_HAPPYMEAL is not set
# CONFIG_SUNGEM is not set
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
#
# Tulip family network device support
#
CONFIG_NET_TULIP=y
# CONFIG_DE2104X is not set
CONFIG_TULIP=y
# CONFIG_TULIP_MWI is not set
CONFIG_TULIP_MMIO=y
# CONFIG_TULIP_NAPI is not set
# CONFIG_DE4X5 is not set
# CONFIG_WINBOND_840 is not set
# CONFIG_DM9102 is not set
# CONFIG_ULI526X is not set
# CONFIG_HP100 is not set
# CONFIG_NET_PCI is not set
#
# Ethernet (1000 Mbit)
......@@ -829,7 +856,8 @@ CONFIG_NET_RADIO=y
# CONFIG_USB_ZD1201 is not set
# CONFIG_HOSTAP is not set
# CONFIG_BCM43XX is not set
# CONFIG_ZD1211RW is not set
CONFIG_ZD1211RW=m
# CONFIG_ZD1211RW_DEBUG is not set
CONFIG_NET_WIRELESS=y
#
......@@ -1098,7 +1126,7 @@ CONFIG_DUMMY_CONSOLE=y
#
# HID Devices
#
CONFIG_HID=y
CONFIG_HID=m
#
# USB support
......@@ -1115,7 +1143,6 @@ CONFIG_USB=y
CONFIG_USB_DEVICEFS=y
# CONFIG_USB_BANDWIDTH is not set
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_MULTITHREAD_PROBE is not set
# CONFIG_USB_OTG is not set
#
......@@ -1136,7 +1163,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
# USB Device Class drivers
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
CONFIG_USB_PRINTER=m
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
......@@ -1371,7 +1398,11 @@ CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_FS_POSIX_ACL=y
# CONFIG_XFS_FS is not set
CONFIG_XFS_FS=m
# CONFIG_XFS_QUOTA is not set
# CONFIG_XFS_SECURITY is not set
# CONFIG_XFS_POSIX_ACL is not set
# CONFIG_XFS_RT is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_MINIX_FS is not set
......@@ -1461,7 +1492,12 @@ CONFIG_SUNRPC_GSS=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
CONFIG_CIFS=m
# CONFIG_CIFS_STATS is not set
# CONFIG_CIFS_WEAK_PW_HASH is not set
# CONFIG_CIFS_XATTR is not set
# CONFIG_CIFS_DEBUG2 is not set
# CONFIG_CIFS_EXPERIMENTAL is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
......@@ -1495,7 +1531,7 @@ CONFIG_NLS_CODEPAGE_437=m
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
CONFIG_NLS_CODEPAGE_932=m
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
......@@ -1526,12 +1562,14 @@ CONFIG_NLS_UTF8=m
# Library routines
#
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
CONFIG_CRC_CCITT=m
# CONFIG_CRC16 is not set
CONFIG_CRC32=y
CONFIG_LIBCRC32C=m
CONFIG_ZLIB_INFLATE=m
CONFIG_ZLIB_DEFLATE=m
CONFIG_TEXTSEARCH=y
CONFIG_TEXTSEARCH_KMP=m
CONFIG_PLIST=y
CONFIG_IOMAP_COPY=y
......
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#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-rc5
# Fri Jan 26 00:19:27 2007
# Linux kernel version: 2.6.20
# Thu Feb 8 01:00:48 2007
#
# CONFIG_PPC64 is not set
CONFIG_PPC32=y
......@@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
CONFIG_PPC_83xx=y
# CONFIG_PPC_85xx is not set
# CONFIG_PPC_86xx is not set
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_8xx is not set
# CONFIG_E200 is not set
CONFIG_6xx=y
CONFIG_83xx=y
......@@ -128,8 +128,9 @@ CONFIG_PPC_GEN550=y
#
# Platform support
#
# CONFIG_MPC8313_RDB is not set
# CONFIG_MPC832x_MDS is not set
CONFIG_MPC834x_SYS=y
CONFIG_MPC834x_MDS=y
# CONFIG_MPC834x_ITX is not set
# CONFIG_MPC8360E_PB is not set
CONFIG_MPC834x=y
......
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......@@ -18,6 +18,7 @@
#include <asm/io.h>
#include <asm/lmb.h>
#include <asm/processor.h>
#include <asm/udbg.h>
#define NO_SCROLL
......@@ -912,3 +913,11 @@ static unsigned char vga_font[cmapsz] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00,
};
void __init udbg_init_btext(void)
{
/* If btext is enabled, we might have a BAT setup for early display,
* thus we do enable some very basic udbg output
*/
udbg_putc = btext_drawchar;
}
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