Commit fa883c62 authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter

drm/i915: Remove redundant initialisation of per-ring IRQ waitqueues

The waitqueues are already initialised during ring initialisation so
kill the redundant and duplicated code to do so in each generations IRQ
installer.
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 8b2e326d
...@@ -2085,12 +2085,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev) ...@@ -2085,12 +2085,6 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
u32 render_irqs; u32 render_irqs;
u32 hotplug_mask; u32 hotplug_mask;
DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
if (HAS_BSD(dev))
DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
if (HAS_BLT(dev))
DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
dev_priv->irq_mask = ~display_mask; dev_priv->irq_mask = ~display_mask;
...@@ -2160,12 +2154,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev) ...@@ -2160,12 +2154,6 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
u32 render_irqs; u32 render_irqs;
u32 hotplug_mask; u32 hotplug_mask;
DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
if (HAS_BSD(dev))
DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
if (HAS_BLT(dev))
DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
dev_priv->irq_mask = ~display_mask; dev_priv->irq_mask = ~display_mask;
...@@ -2216,11 +2204,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev) ...@@ -2216,11 +2204,6 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
dev_priv->irq_mask = ~enable_mask; dev_priv->irq_mask = ~enable_mask;
DRM_INIT_WAITQUEUE(&dev_priv->ring[RCS].irq_queue);
DRM_INIT_WAITQUEUE(&dev_priv->ring[VCS].irq_queue);
DRM_INIT_WAITQUEUE(&dev_priv->ring[BCS].irq_queue);
dev_priv->pipestat[0] = 0; dev_priv->pipestat[0] = 0;
dev_priv->pipestat[1] = 0; dev_priv->pipestat[1] = 0;
......
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