Commit fd7c9d21 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://bk.arm.linux.org.uk/linux-2.6-rmk

into home.osdl.org:/home/torvalds/v2.5/linux
parents 86300396 7b89f42f
......@@ -34,7 +34,7 @@ comma = ,
# Note that GCC does not numerically define an architecture version
# macro, but instead defines a whole series of macros which makes
# testing for a specific architecture or later rather impossible.
arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call check_gcc,-march=armv5te,-march=armv4 -Wa$(comma)-mxscale)
arch-$(CONFIG_CPU_32v5) :=-D__LINUX_ARM_ARCH__=5 $(call check_gcc,-march=armv5te,-march=armv4)
arch-$(CONFIG_CPU_32v4) :=-D__LINUX_ARM_ARCH__=4 -march=armv4
arch-$(CONFIG_CPU_32v3) :=-D__LINUX_ARM_ARCH__=3 -march=armv3
......@@ -47,8 +47,9 @@ tune-$(CONFIG_CPU_ARM922T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_ARM926T) :=-mtune=arm9tdmi
tune-$(CONFIG_CPU_SA110) :=-mtune=strongarm110
tune-$(CONFIG_CPU_SA1100) :=-mtune=strongarm1100
tune-$(CONFIG_CPU_XSCALE) :=$(call check_gcc,-mtune=xscale,-mtune=strongarm110)
tune-$(CONFIG_CPU_XSCALE) :=$(call check_gcc,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
# Need -Uarm for gcc < 3.x
CFLAGS_BOOT :=-mapcs-32 $(arch-y) $(tune-y) -mshort-load-bytes -msoft-float -Wa,-mno-fpu -Uarm
CFLAGS +=-mapcs-32 $(arch-y) $(tune-y) -mshort-load-bytes -msoft-float -Wa,-mno-fpu -Uarm
AFLAGS +=-mapcs-32 $(arch-y) $(tune-y) -msoft-float -Wa,-mno-fpu
......
......@@ -772,8 +772,8 @@ __irq_svc: sub sp, sp, #S_FRAME_SIZE
preempt_return:
ldr r0, [r8, #TI_PREEMPT] @ read preempt value
teq r0, r7
strne r0, [r0, -r0] @ bug()
str r9, [r8, #TI_PREEMPT] @ restore preempt count
strne r0, [r0, -r0] @ bug()
#endif
ldr r0, [sp, #S_PSR] @ irqs are already disabled
msr spsr, r0
......@@ -908,8 +908,8 @@ __irq_usr: sub sp, sp, #S_FRAME_SIZE
#ifdef CONFIG_PREEMPT
ldr r0, [r8, #TI_PREEMPT]
teq r0, r7
strne r0, [r0, -r0]
str r9, [r8, #TI_PREEMPT]
strne r0, [r0, -r0]
mov tsk, r8
#else
get_thread_info tsk
......
......@@ -120,9 +120,9 @@ __turn_mmu_on:
orr r0, r0, #2 @ ...........A.
#endif
mcr p15, 0, r0, c1, c0, 0 @ write control reg
mrc p15, 0, r0, c1, c0, 0 @ read it back.
mov r0, r0
mov r0, r0
mrc p15, 0, r3, c0, c0, 0 @ read id reg
mov r3, r3
mov r3, r3
mov pc, lr
/*
......
......@@ -11,6 +11,7 @@
#include <linux/config.h>
#include <linux/pm.h>
#include <linux/device.h>
#include <linux/sysdev.h>
#include <linux/errno.h>
#include <linux/sched.h>
......@@ -36,18 +37,25 @@ int suspend(void)
if (ret != 0)
goto out;
device_suspend(3);
ret = device_suspend(3);
if (ret)
goto resume_legacy;
local_irq_disable();
leds_event(led_stop);
sysdev_suspend(3);
ret = pm_do_suspend();
sysdev_resume();
leds_event(led_start);
local_irq_enable();
device_resume();
resume_legacy:
pm_send_all(PM_RESUME, (void *)0);
out:
......
......@@ -28,6 +28,7 @@
#include <asm/procinfo.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/cacheflush.h>
#include <asm/tlbflush.h>
#include <asm/mach/arch.h>
......
......@@ -186,7 +186,7 @@ static int impd1_probe(struct device *dev)
memset(d, 0, sizeof(struct amba_device));
snprintf(d->dev.bus_id, sizeof(d->dev.bus_id),
"lm%x:%5.5x", pdev->id, idev->offset >> 12);
"lm%x:%5.5lx", pdev->id, idev->offset >> 12);
d->dev.parent = &pdev->dev;
d->res.start = res->start + idev->offset;
......
......@@ -12,6 +12,7 @@
*/
#include <linux/errno.h>
#include <linux/time.h>
#include <asm/hardware.h>
#include <asm/memory.h>
......@@ -63,15 +64,11 @@ int pm_do_suspend(void)
{
unsigned long sleep_save[SLEEP_SAVE_SIZE];
unsigned long checksum = 0;
unsigned long delta;
int i;
cli();
clf();
leds_event(led_stop);
/* preserve current time */
RCNR = xtime.tv_sec;
delta = xtime.tv_sec - RCNR;
/*
* Temporary solution. This won't be necessary once
......@@ -184,16 +181,12 @@ int pm_do_suspend(void)
RESTORE(FFIER);
/* restore current time */
xtime.tv_sec = RCNR;
xtime.tv_sec = RCNR + delta;
#ifdef DEBUG
printk(KERN_DEBUG "*** made it back from resume\n");
#endif
leds_event(led_start);
sti();
return 0;
}
......
......@@ -270,8 +270,12 @@ static int sa1110_target(struct cpufreq_policy *policy,
* We wait 20ms to be safe.
*/
sdram_set_refresh(2);
if (!irqs_disabled()) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(20 * HZ / 1000);
} else {
mdelay(20);
}
/*
* Reprogram the DRAM timings with interrupts disabled, and
......
......@@ -57,9 +57,11 @@ enum { SLEEP_SAVE_SP = 0,
int pm_do_suspend(void)
{
unsigned long sleep_save[SLEEP_SAVE_SIZE];
unsigned long delta, gpio;
/* preserve current time */
RCNR = xtime.tv_sec;
delta = xtime.tv_sec - RCNR;
gpio = GPLR;
/* save vital registers */
SAVE(OSCR);
......@@ -112,6 +114,9 @@ int pm_do_suspend(void)
RESTORE(Ser1SDCR0);
GPSR = gpio;
GPCR = ~gpio;
/*
* Clear the peripheral sleep-hold bit.
*/
......@@ -125,7 +130,7 @@ int pm_do_suspend(void)
RESTORE(OIER);
/* restore current time */
xtime.tv_sec = RCNR;
xtime.tv_sec = RCNR + delta;
return 0;
}
......
......@@ -79,7 +79,7 @@ ENTRY(cpu_arm1020_proc_fin)
stmfd sp!, {lr}
mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
msr cpsr_c, ip
bl cpu_arm1020_cache_clean_invalidate_all
bl arm1020_flush_kern_cache_all
mrc p15, 0, r0, c1, c0, 0 @ ctrl register
bic r0, r0, #0x1000 @ ...i............
bic r0, r0, #0x000e @ ............wca.
......
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