[ARM] Net: Convert ether1 and ether3 to use iomem accesses.

Signed-off-by: Russell King <rmk@arm.linux.org.uk>

drivers/net/arm/ether1.h

@@ -22,21 +22,22 @@
 #define priv(dev)	((struct ether1_priv *)netdev_priv(dev))
 
 /* Page register */
-#define REG_PAGE	(dev->base_addr + 0x00)
+#define REG_PAGE	(priv(dev)->base + 0x0000)
 
 /* Control register */
-#define REG_CONTROL	(dev->base_addr + 0x01)
+#define REG_CONTROL	(priv(dev)->base + 0x0004)
 #define CTRL_RST	0x01
 #define CTRL_LOOPBACK	0x02
 #define CTRL_CA		0x04
 #define CTRL_ACK	0x08
 
-#define ETHER1_RAM	(dev->base_addr + 0x800)
+#define ETHER1_RAM	(priv(dev)->base + 0x2000)
 
 /* HW address */
-#define IDPROM_ADDRESS	(dev->base_addr + 0x09)
+#define IDPROM_ADDRESS	(priv(dev)->base + 0x0024)
 
 struct ether1_priv {
+	void __iomem *base;
 	struct net_device_stats stats;
 	unsigned int tx_link;
 	unsigned int tx_head;

drivers/net/arm/ether3.c

@@ -104,19 +104,19 @@ typedef enum {
  * The SEEQ8005 doesn't like us writing to its registers
  * too quickly.
  */
-static inline void ether3_outb(int v, const int r)
+static inline void ether3_outb(int v, const void __iomem *r)
 {
-	outb(v, r);
+	writeb(v, r);
 	udelay(1);
 }
 
-static inline void ether3_outw(int v, const int r)
+static inline void ether3_outw(int v, const void __iomem *r)
 {
-	outw(v, r);
+	writew(v, r);
 	udelay(1);
 }
-#define ether3_inb(r)		({ unsigned int __v = inb((r)); udelay(1); __v; })
-#define ether3_inw(r)		({ unsigned int __v = inw((r)); udelay(1); __v; })
+#define ether3_inb(r)		({ unsigned int __v = readb((r)); udelay(1); __v; })
+#define ether3_inw(r)		({ unsigned int __v = readw((r)); udelay(1); __v; })
 
 static int
 ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start)
@@ -149,28 +149,28 @@ ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start)
  * write data to the buffer memory
  */
 #define ether3_writebuffer(dev,data,length)			\
-	outsw(REG_BUFWIN, (data), (length) >> 1)
+	writesw(REG_BUFWIN, (data), (length) >> 1)
 
 #define ether3_writeword(dev,data)				\
-	outw((data), REG_BUFWIN)
+	writew((data), REG_BUFWIN)
 
 #define ether3_writelong(dev,data)	{			\
-	unsigned long reg_bufwin = REG_BUFWIN;			\
-	outw((data), reg_bufwin);				\
-	outw((data) >> 16, reg_bufwin);				\
+	void __iomem *reg_bufwin = REG_BUFWIN;			\
+	writew((data), reg_bufwin);				\
+	writew((data) >> 16, reg_bufwin);			\
 }
 
 /*
  * read data from the buffer memory
  */
 #define ether3_readbuffer(dev,data,length)			\
-	insw(REG_BUFWIN, (data), (length) >> 1)
+	readsw(REG_BUFWIN, (data), (length) >> 1)
 
 #define ether3_readword(dev)					\
-	inw(REG_BUFWIN)
+	readw(REG_BUFWIN)
 
 #define ether3_readlong(dev)	 				\
-	inw(REG_BUFWIN) | (inw(REG_BUFWIN) << 16)
+	readw(REG_BUFWIN) | (readw(REG_BUFWIN) << 16)
 
 /*
  * Switch LED off...
@@ -371,10 +371,10 @@ ether3_probe_bus_8(struct net_device *dev, int val)
 	printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low);
 
 	ether3_outb(write_low, REG_RECVPTR);
-	ether3_outb(write_high, REG_RECVPTR + 1);
+	ether3_outb(write_high, REG_RECVPTR + 4);
 
 	read_low = ether3_inb(REG_RECVPTR);
-	read_high = ether3_inb(REG_RECVPTR + 1);
+	read_high = ether3_inb(REG_RECVPTR + 4);
 
 	printk(", read8 [%02X:%02X]\n", read_high, read_low);
 
@@ -434,7 +434,7 @@ ether3_close(struct net_device *dev)
 	ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
 	priv(dev)->regs.command = 0;
 	while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON));
-	ether3_outb(0x80, REG_CONFIG2 + 1);
+	ether3_outb(0x80, REG_CONFIG2 + 4);
 	ether3_outw(0, REG_COMMAND);
 
 	free_irq(dev->irq, dev);
@@ -778,16 +778,16 @@ ether3_get_dev(struct net_device *dev, struct expansion_card *ec)
 {
 	const char *name = "ether3";
 
-	dev->base_addr = ecard_address(ec, ECARD_MEMC, 0);
 	dev->irq = ec->irq;
+	priv(dev)->seeq = priv(dev)->base;
 
 	if (ec->cid.manufacturer == MANU_ANT &&
 	    ec->cid.product == PROD_ANT_ETHERB) {
-		dev->base_addr += 0x200;
+		priv(dev)->seeq = priv(dev)->base + 0x800;
 		name = "etherb";
 	}
 
-	ec->irqaddr = (volatile unsigned char *)ioaddr(dev->base_addr);
+	ec->irqaddr = priv(dev)->seeq;
 	ec->irqmask = 0xf0;
 
 	ether3_addr(dev->dev_addr, ec);
@@ -815,6 +815,14 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
 	}
 
 	SET_MODULE_OWNER(dev);
+	SET_NETDEV_DEV(dev, &ec->dev);
+
+	priv(dev)->base = ioremap(ecard_resource_start(ec, ECARD_RES_MEMC),
+				  ecard_resource_len(ec, ECARD_RES_MEMC));
+	if (!priv(dev)->base) {
+		ret = -ENOMEM;
+		goto free;
+	}
 
 	name = ether3_get_dev(dev, ec);
 	if (!name) {
@@ -826,7 +834,7 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
 
 	/* Reset card...
 	 */
-	ether3_outb(0x80, REG_CONFIG2 + 1);
+	ether3_outb(0x80, REG_CONFIG2 + 4);
 	bus_type = BUS_UNKNOWN;
 	udelay(4);
 
@@ -883,6 +891,8 @@ ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
 	return 0;
 
  free:
+	if (priv(dev)->base)
+		iounmap(priv(dev)->base);
 	free_netdev(dev);
  release:
 	ecard_release_resources(ec);
@@ -897,6 +907,7 @@ static void __devexit ether3_remove(struct expansion_card *ec)
 	ecard_set_drvdata(ec, NULL);
 
 	unregister_netdev(dev);
+	iounmap(priv(dev)->base);
 	free_netdev(dev);
 	ecard_release_resources(ec);
 }

drivers/net/arm/ether3.h

@@ -25,7 +25,7 @@
 #define priv(dev)	((struct dev_priv *)netdev_priv(dev))
 
 /* Command register definitions & bits */
-#define REG_COMMAND		(dev->base_addr + 0x00)
+#define REG_COMMAND		(priv(dev)->seeq + 0x0000)
 #define CMD_ENINTDMA		0x0001
 #define CMD_ENINTRX		0x0002
 #define CMD_ENINTTX		0x0004
@@ -44,7 +44,7 @@
 #define CMD_FIFOWRITE		0x8000
 
 /* status register */
-#define REG_STATUS		(dev->base_addr + 0x00)
+#define REG_STATUS		(priv(dev)->seeq + 0x0000)
 #define STAT_ENINTSTAT		0x0001
 #define STAT_ENINTRX		0x0002
 #define STAT_ENINTTX		0x0004
@@ -61,7 +61,7 @@
 #define STAT_FIFODIR		0x8000
 
 /* configuration register 1 */
-#define REG_CONFIG1		(dev->base_addr + 0x10)
+#define REG_CONFIG1		(priv(dev)->seeq + 0x0040)
 #define CFG1_BUFSELSTAT0	0x0000
 #define CFG1_BUFSELSTAT1	0x0001
 #define CFG1_BUFSELSTAT2	0x0002
@@ -94,7 +94,7 @@
 #define CFG1_RECVCOMPSTAT5	0x2000
 
 /* configuration register 2 */
-#define REG_CONFIG2		(dev->base_addr + 0x20)
+#define REG_CONFIG2		(priv(dev)->seeq + 0x0080)
 #define CFG2_BYTESWAP		0x0001
 #define CFG2_ERRENCRC		0x0008
 #define CFG2_ERRENDRIBBLE	0x0010
@@ -108,15 +108,15 @@
 #define CFG2_CTRLO		0x1000
 #define CFG2_RESET		0x8000
 
-#define REG_RECVEND		(dev->base_addr + 0x30)
+#define REG_RECVEND		(priv(dev)->seeq + 0x00c0)
 
-#define REG_BUFWIN		(dev->base_addr + 0x40)
+#define REG_BUFWIN		(priv(dev)->seeq + 0x0100)
 
-#define REG_RECVPTR		(dev->base_addr + 0x50)
+#define REG_RECVPTR		(priv(dev)->seeq + 0x0140)
 
-#define REG_TRANSMITPTR		(dev->base_addr + 0x60)
+#define REG_TRANSMITPTR		(priv(dev)->seeq + 0x0180)
 
-#define REG_DMAADDR		(dev->base_addr + 0x70)
+#define REG_DMAADDR		(priv(dev)->seeq + 0x01c0)
 
 /*
  * Cards transmit/receive headers
@@ -154,6 +154,8 @@
 #define MAX_TX_BUFFERED	10
 
 struct dev_priv {
+    void __iomem *base;
+    void __iomem *seeq;
     struct {
 	unsigned int command;
 	unsigned int config1;