For now, disallow allocation of callee-save registers in inline caches

If we allocate a callee-save register that the parent function had
not also allocated, change its value, and then call a function
that then unwinds, the unwinder would pass the new (incorrect)
value of the callee save register to the next frame.

We either need to
- make sure callee-save registers are restored before any potentially-throwing
  callsite, or
- make the unwinder able to restore these registers for us, potentially
  by writing our own exception unwinder.

For now, the easiest thing to do is to disallow allocation of those registers.
(I'm not even sure how much we allocate them at all at the moment.)

src/asm_writing/rewriter.cpp

@@ -24,11 +24,18 @@ namespace pyston {
 
 
 static const assembler::Register allocatable_regs[] = {
-    assembler::RAX, assembler::RCX, assembler::RBX, assembler::RDX,
+    assembler::RAX, assembler::RCX, assembler::RDX,
     // no RSP
     // no RBP
-    assembler::RDI, assembler::RSI, assembler::R8,  assembler::R9,  assembler::R10,
-    assembler::R11, assembler::R12, assembler::R13, assembler::R14, assembler::R15,
+    assembler::RDI, assembler::RSI, assembler::R8,  assembler::R9, assembler::R10, assembler::R11,
+
+    // For now, cannot allocate callee-save registers since we do not restore them properly
+    // at potentially-unwinding callsites.
+    // TODO fix that behavior, or create an unwinder that knows how to unwind through our
+    // inline caches.
+    /*
+    assembler::RBX, assembler::R12, assembler::R13, assembler::R14, assembler::R15,
+    */
 };