Commit cc20131a authored by Marius Wachtler's avatar Marius Wachtler

Fix assert during cfg generation when encountering 'while: return 1 else:'

parent f963786c
......@@ -1837,9 +1837,14 @@ public:
jend->target = end;
curblock->connectTo(end);
}
curblock = end;
cfg->placeBlock(end);
if (end->predecessors.size() == 0) {
delete end;
curblock = NULL;
} else {
curblock = end;
cfg->placeBlock(end);
}
return true;
}
......
......@@ -5,3 +5,11 @@ def f():
break
break
f()
def f2(x):
while x:
return 1
else:
return 2
print f2(1)
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