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Gwenaël Samain
cython
Commits
b66a9dc6
Commit
b66a9dc6
authored
Jun 01, 2019
by
Josh Tobin
Committed by
Stefan Behnel
Jun 01, 2019
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Plain Diff
MemoryView slicing contiguity bugfix (GH-2961)
Fixes GH-2941.
parent
4becc815
Changes
3
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3 changed files
with
20 additions
and
3 deletions
+20
-3
Cython/Compiler/ExprNodes.py
Cython/Compiler/ExprNodes.py
+10
-1
Cython/Compiler/MemoryView.py
Cython/Compiler/MemoryView.py
+2
-2
tests/memoryview/memslice.pyx
tests/memoryview/memslice.pyx
+8
-0
No files found.
Cython/Compiler/ExprNodes.py
View file @
b66a9dc6
...
@@ -4722,8 +4722,17 @@ class MemoryCopyScalar(MemoryCopyNode):
...
@@ -4722,8 +4722,17 @@ class MemoryCopyScalar(MemoryCopyNode):
code
.
putln
(
"%s __pyx_temp_slice = %s;"
%
(
slice_decl
,
self
.
dst
.
result
()))
code
.
putln
(
"%s __pyx_temp_slice = %s;"
%
(
slice_decl
,
self
.
dst
.
result
()))
dst_temp
=
"__pyx_temp_slice"
dst_temp
=
"__pyx_temp_slice"
force_strided
=
False
indices
=
self
.
dst
.
original_indices
for
idx
in
indices
:
if
isinstance
(
idx
,
SliceNode
)
and
not
(
idx
.
start
.
is_none
and
idx
.
stop
.
is_none
and
idx
.
step
.
is_none
):
force_strided
=
True
slice_iter_obj
=
MemoryView
.
slice_iter
(
self
.
dst
.
type
,
dst_temp
,
slice_iter_obj
=
MemoryView
.
slice_iter
(
self
.
dst
.
type
,
dst_temp
,
self
.
dst
.
type
.
ndim
,
code
)
self
.
dst
.
type
.
ndim
,
code
,
force_strided
=
force_strided
)
p
=
slice_iter_obj
.
start_loops
()
p
=
slice_iter_obj
.
start_loops
()
if
dtype
.
is_pyobject
:
if
dtype
.
is_pyobject
:
...
...
Cython/Compiler/MemoryView.py
View file @
b66a9dc6
...
@@ -402,8 +402,8 @@ def get_is_contig_utility(contig_type, ndim):
...
@@ -402,8 +402,8 @@ def get_is_contig_utility(contig_type, ndim):
return
utility
return
utility
def
slice_iter
(
slice_type
,
slice_result
,
ndim
,
code
):
def
slice_iter
(
slice_type
,
slice_result
,
ndim
,
code
,
force_strided
=
False
):
if
slice_type
.
is_c_contig
or
slice_type
.
is_f_contig
:
if
(
slice_type
.
is_c_contig
or
slice_type
.
is_f_contig
)
and
not
force_strided
:
return
ContigSliceIter
(
slice_type
,
slice_result
,
ndim
,
code
)
return
ContigSliceIter
(
slice_type
,
slice_result
,
ndim
,
code
)
else
:
else
:
return
StridedSliceIter
(
slice_type
,
slice_result
,
ndim
,
code
)
return
StridedSliceIter
(
slice_type
,
slice_result
,
ndim
,
code
)
...
...
tests/memoryview/memslice.pyx
View file @
b66a9dc6
...
@@ -2252,7 +2252,9 @@ def test_contig_scalar_to_slice_assignment():
...
@@ -2252,7 +2252,9 @@ def test_contig_scalar_to_slice_assignment():
"""
"""
>>> test_contig_scalar_to_slice_assignment()
>>> test_contig_scalar_to_slice_assignment()
14 14 14 14
14 14 14 14
30 14 30 14
20 20 20 20
20 20 20 20
30 30 20 20
"""
"""
cdef
int
[
5
][
10
]
a
cdef
int
[
5
][
10
]
a
cdef
int
[:,
::
1
]
m
=
a
cdef
int
[:,
::
1
]
m
=
a
...
@@ -2260,9 +2262,15 @@ def test_contig_scalar_to_slice_assignment():
...
@@ -2260,9 +2262,15 @@ def test_contig_scalar_to_slice_assignment():
m
[...]
=
14
m
[...]
=
14
print
m
[
0
,
0
],
m
[
-
1
,
-
1
],
m
[
3
,
2
],
m
[
4
,
9
]
print
m
[
0
,
0
],
m
[
-
1
,
-
1
],
m
[
3
,
2
],
m
[
4
,
9
]
m
[:,
:
1
]
=
30
print
m
[
0
,
0
],
m
[
0
,
1
],
m
[
1
,
0
],
m
[
1
,
1
]
m
[:,
:]
=
20
m
[:,
:]
=
20
print
m
[
0
,
0
],
m
[
-
1
,
-
1
],
m
[
3
,
2
],
m
[
4
,
9
]
print
m
[
0
,
0
],
m
[
-
1
,
-
1
],
m
[
3
,
2
],
m
[
4
,
9
]
m
[:
1
,
:]
=
30
print
m
[
0
,
0
],
m
[
0
,
1
],
m
[
1
,
0
],
m
[
1
,
1
]
@
testcase
@
testcase
def
test_dtype_object_scalar_assignment
():
def
test_dtype_object_scalar_assignment
():
"""
"""
...
...
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