cmd/internal/obj/x86: fix /is4 encoding for VBLEND

Fixes VBLENDVP{D/S}, VPBLENDVB encoding for /is4 imm8[7:4]
encoded register operand.

Explanation:
`reg[r]+regrex[r]+1` will yield correct values for 8..15 reg indexes,
but for 0..7 it gives `index+1` results.
There was no test that used lower 8 register with /is4 encoding,
so the bug passed the tests.
The proper solution is to get 4th bit from regrex with a proper shift:
`reg[r]|(regrex[r]<<1)`.

Instead of inlining `reg[r]|(regrex[r]<<1)` expr,
using new `regIndex(r)` function.

Test that reproduces this issue is added to
amd64enc_extra.s test suite.

Bug came from https://golang.org/cl/70650.

Change-Id: I846a25e88d5e6df88df9d9c3f5fe94ec55416a33
Reviewed-on: https://go-review.googlesource.com/78815
Run-TryBot: Iskander Sharipov <iskander.sharipov@intel.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Ilya Tocar <ilya.tocar@intel.com>

src/cmd/asm/internal/asm/testdata/amd64enc_extra.s

@@ -233,5 +233,7 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
 	VPGATHERQQ Y0, (R13)(Y1*1), Y2          // c4c2fd91540d00
 	VPGATHERQQ Y0, 16(R13)(Y1*1), Y2        // c4c2fd91540d10
 	VPGATHERQQ Y0, 512(R13)(Y1*1), Y2       // c4c2fd91940d00020000
+	// Test low-8 register for /is4 "hr" operand.
+	VPBLENDVB X0, (BX), X1, X2              // c4e3714c1300
 	// End of tests.
 	RET

src/cmd/internal/obj/x86/asm6.go

@@ -3964,7 +3964,7 @@ func (asmbuf *AsmBuf) doasm(ctxt *obj.Link, cursym *obj.LSym, p *obj.Prog) {
 				hr, from, from3, to := unpackOps4(p)
 				asmbuf.asmvex(ctxt, from, from3, to, o.op[z], o.op[z+1])
 				asmbuf.asmand(ctxt, cursym, p, from, to)
-				asmbuf.Put1(byte(regrex[hr.Reg]+reg[hr.Reg]+1) << 4)
+				asmbuf.Put1(byte(regIndex(hr.Reg) << 4))
 
 			case Zr_m_xm:
 				asmbuf.mediaop(ctxt, o, op, int(yt.zoffset), z)