Commit 990dac27 authored by fanzha02's avatar fanzha02 Committed by Cherry Zhang

cmd/internal/obj/arm64: fix assemble LDXP bug

The current code calculates register number incorrectly.

The fix corrects the register number calculation.

Add cases created by decoder to test assembler.

Fixes #20697
Fixes #20723

Change-Id: I73ac153df9ea9f51c43a5104828d7a5389551c92
Reviewed-on: https://go-review.googlesource.com/45850
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: default avatarCherry Zhang <cherryyz@google.com>
parent 0ff876a8
...@@ -381,6 +381,10 @@ func TestARM64EndToEnd(t *testing.T) { ...@@ -381,6 +381,10 @@ func TestARM64EndToEnd(t *testing.T) {
testEndToEnd(t, "arm64", "arm64") testEndToEnd(t, "arm64", "arm64")
} }
func TestARM64Encoder(t *testing.T) {
testEndToEnd(t, "arm64", "arm64enc")
}
func TestAMD64EndToEnd(t *testing.T) { func TestAMD64EndToEnd(t *testing.T) {
testEndToEnd(t, "amd64", "amd64") testEndToEnd(t, "amd64", "amd64")
} }
......
This diff is collapsed.
...@@ -2232,7 +2232,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) { ...@@ -2232,7 +2232,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = 0 o1 = 0
} }
case 15: /* mul/mneg/umulh/umull r,[r,]r; madd/msub Rm,Rn,Ra,Rd */ case 15: /* mul/mneg/umulh/umull r,[r,]r; madd/msub Rm,Ra,Rn,Rd */
o1 = c.oprrr(p, p.As) o1 = c.oprrr(p, p.As)
rf := int(p.From.Reg) rf := int(p.From.Reg)
...@@ -2900,9 +2900,9 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) { ...@@ -2900,9 +2900,9 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
o1 = c.opload(p, p.As) o1 = c.opload(p, p.As)
o1 |= 0x1F << 16 o1 |= 0x1F << 16
o1 |= uint32(p.From.Reg) << 5 o1 |= uint32(p.From.Reg&31) << 5
if p.Reg != 0 { if p.Reg != 0 {
o1 |= uint32(p.Reg) << 10 o1 |= uint32(p.Reg&31) << 10
} else { } else {
o1 |= 0x1F << 10 o1 |= 0x1F << 10
} }
......
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