r8a7794-alt.dts

/*
 * Device Tree Source for the Alt board
 *
 * Copyright (C) 2014 Renesas Electronics Corporation
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/dts-v1/;
#include "r8a7794.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Alt";
	compatible = "renesas,alt", "renesas,r8a7794";

	aliases {
		serial0 = &scif2;
		i2c9 = &gpioi2c1;
		i2c10 = &gpioi2c4;
		i2c11 = &i2chdmi;
		i2c12 = &i2cexio4;
	};

	chosen {
		bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
		stdout-path = "serial0:115200n8";
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x40000000>;
	};

	d3_3v: regulator-d3-3v {
		compatible = "regulator-fixed";
		regulator-name = "D3.3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
		regulator-always-on;
	};

	vcc_sdhi0: regulator-vcc-sdhi0 {
		compatible = "regulator-fixed";

		regulator-name = "SDHI0 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;

		gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vccq_sdhi0: regulator-vccq-sdhi0 {
		compatible = "regulator-gpio";

		regulator-name = "SDHI0 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1
			  1800000 0>;
	};

	vcc_sdhi1: regulator-vcc-sdhi1 {
		compatible = "regulator-fixed";

		regulator-name = "SDHI1 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;

		gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vccq_sdhi1: regulator-vccq-sdhi1 {
		compatible = "regulator-gpio";

		regulator-name = "SDHI1 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1
			  1800000 0>;
	};

	lbsc {
		#address-cells = <1>;
		#size-cells = <1>;
	};

	vga-encoder {
		compatible = "adi,adv7123";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				adv7123_in: endpoint {
					remote-endpoint = <&du_out_rgb1>;
				};
			};
			port@1 {
				reg = <1>;
				adv7123_out: endpoint {
					remote-endpoint = <&vga_in>;
				};
			};
		};
	};

	vga {
		compatible = "vga-connector";

		port {
			vga_in: endpoint {
				remote-endpoint = <&adv7123_out>;
			};
		};
	};

	x2_clk: x2-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <74250000>;
	};

	x13_clk: x13-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <148500000>;
	};

	gpioi2c1: i2c-9 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "i2c-gpio";
		status = "disabled";
		scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
	};

	gpioi2c4: i2c-10 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "i2c-gpio";
		status = "disabled";
		scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <5>;
	};

	/*
	 * A fallback to GPIO is provided for I2C1.
	 */
	i2chdmi: i2c-11 {
		compatible = "i2c-demux-pinctrl";
		i2c-parent = <&i2c1>, <&gpioi2c1>;
		i2c-bus-name = "i2c-hdmi";
		#address-cells = <1>;
		#size-cells = <0>;

		composite-in@20 {
			compatible = "adi,adv7180";
			reg = <0x20>;
			remote = <&vin0>;

			port {
				adv7180: endpoint {
					bus-width = <8>;
					remote-endpoint = <&vin0ep>;
				};
			};
		};
	};

	/*
	 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
	 * A fallback to GPIO is provided.
	 */
	i2cexio4: i2c-14 {
		compatible = "i2c-demux-pinctrl";
		i2c-parent = <&i2c4>, <&gpioi2c4>;
		i2c-bus-name = "i2c-exio4";
		#address-cells = <1>;
		#size-cells = <0>;
	};
};

&du {
	pinctrl-0 = <&du_pins>;
	pinctrl-names = "default";
	status = "okay";

	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
		 <&x13_clk>, <&x2_clk>;
	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";

	ports {
		port@1 {
			endpoint {
				remote-endpoint = <&adv7123_in>;
			};
		};
	};
};

&extal_clk {
	clock-frequency = <20000000>;
};

&pfc {
	pinctrl-0 = <&scif_clk_pins>;
	pinctrl-names = "default";

	du_pins: du {
		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
		function = "du1";
	};

	scif2_pins: scif2 {
		groups = "scif2_data";
		function = "scif2";
	};

	scif_clk_pins: scif_clk {
		groups = "scif_clk";
		function = "scif_clk";
	};

	ether_pins: ether {
		groups = "eth_link", "eth_mdio", "eth_rmii";
		function = "eth";
	};

	phy1_pins: phy1 {
		groups = "intc_irq8";
		function = "intc";
	};

	i2c1_pins: i2c1 {
		groups = "i2c1";
		function = "i2c1";
	};

	i2c4_pins: i2c4 {
		groups = "i2c4";
		function = "i2c4";
	};

	vin0_pins: vin0 {
		groups = "vin0_data8", "vin0_clk";
		function = "vin0";
	};

	mmcif0_pins: mmcif0 {
		groups = "mmc_data8", "mmc_ctrl";
		function = "mmc";
	};

	sdhi0_pins: sd0 {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <3300>;
	};

	sdhi0_pins_uhs: sd0_uhs {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
		power-source = <1800>;
	};

	sdhi1_pins: sd1 {
		groups = "sdhi1_data4", "sdhi1_ctrl";
		function = "sdhi1";
		power-source = <3300>;
	};

	sdhi1_pins_uhs: sd1_uhs {
		groups = "sdhi1_data4", "sdhi1_ctrl";
		function = "sdhi1";
		power-source = <1800>;
	};
};

&cmt0 {
	status = "okay";
};

&pfc {
	qspi_pins: qspi {
		groups = "qspi_ctrl", "qspi_data4";
		function = "qspi";
	};
};

&ether {
	pinctrl-0 = <&ether_pins &phy1_pins>;
	pinctrl-names = "default";

	phy-handle = <&phy1>;
	renesas,ether-link-active-low;
	status = "okay";

	phy1: ethernet-phy@1 {
		reg = <1>;
		interrupt-parent = <&irqc0>;
		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
		micrel,led-mode = <1>;
	};
};

&mmcif0 {
	pinctrl-0 = <&mmcif0_pins>;
	pinctrl-names = "default";

	vmmc-supply = <&d3_3v>;
	vqmmc-supply = <&d3_3v>;
	bus-width = <8>;
	non-removable;
	status = "okay";
};

&rwdt {
	timeout-sec = <60>;
	status = "okay";
};

&sdhi0 {
	pinctrl-0 = <&sdhi0_pins>;
	pinctrl-1 = <&sdhi0_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&vcc_sdhi0>;
	vqmmc-supply = <&vccq_sdhi0>;
	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
	sd-uhs-sdr50;
	sd-uhs-sdr104;
	status = "okay";
};

&sdhi1 {
	pinctrl-0 = <&sdhi1_pins>;
	pinctrl-1 = <&sdhi1_pins_uhs>;
	pinctrl-names = "default", "state_uhs";

	vmmc-supply = <&vcc_sdhi1>;
	vqmmc-supply = <&vccq_sdhi1>;
	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
	sd-uhs-sdr50;
	status = "okay";
};

&i2c1 {
	pinctrl-0 = <&i2c1_pins>;
	pinctrl-names = "i2c-hdmi";

	clock-frequency = <400000>;
};

&i2c4 {
	pinctrl-0 = <&i2c4_pins>;
	pinctrl-names = "i2c-exio4";
};

&vin0 {
	status = "okay";
	pinctrl-0 = <&vin0_pins>;
	pinctrl-names = "default";

	port {
		#address-cells = <1>;
		#size-cells = <0>;

		vin0ep: endpoint {
			remote-endpoint = <&adv7180>;
			bus-width = <8>;
		};
	};
};

&scif2 {
	pinctrl-0 = <&scif2_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&scif_clk {
	clock-frequency = <14745600>;
};

&qspi {
	pinctrl-0 = <&qspi_pins>;
	pinctrl-names = "default";

	status = "okay";

	flash@0 {
		compatible = "spansion,s25fl512s", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <30000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		spi-cpol;
		spi-cpha;
		m25p,fast-read;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "loader";
				reg = <0x00000000 0x00040000>;
				read-only;
			};
			partition@40000 {
				label = "system";
				reg = <0x00040000 0x00040000>;
				read-only;
			};
			partition@80000 {
				label = "user";
				reg = <0x00080000 0x03f80000>;
			};
		};
	};
};