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/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * derived from drivers/kvm/kvm_main.c
 *
 * Copyright (C) 2006 Qumranet, Inc.
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 * Copyright (C) 2008 Qumranet, Inc.
 * Copyright IBM Corporation, 2008
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 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
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 *
 * Authors:
 *   Avi Kivity   <avi@qumranet.com>
 *   Yaniv Kamay  <yaniv@qumranet.com>
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 *   Amit Shah    <amit.shah@qumranet.com>
 *   Ben-Ami Yassour <benami@il.ibm.com>
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 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

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#include <linux/kvm_host.h>
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#include "irq.h"
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#include "mmu.h"
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#include "i8254.h"
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#include "tss.h"
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#include "kvm_cache_regs.h"
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#include "x86.h"
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#include "cpuid.h"
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#include "assigned-dev.h"
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#include "pmu.h"
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#include "hyperv.h"
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#include <linux/clocksource.h>
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#include <linux/interrupt.h>
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#include <linux/kvm.h>
#include <linux/fs.h>
#include <linux/vmalloc.h>
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#include <linux/export.h>
#include <linux/moduleparam.h>
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#include <linux/mman.h>
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#include <linux/highmem.h>
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#include <linux/iommu.h>
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#include <linux/intel-iommu.h>
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#include <linux/cpufreq.h>
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#include <linux/user-return-notifier.h>
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#include <linux/srcu.h>
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#include <linux/slab.h>
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#include <linux/perf_event.h>
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#include <linux/uaccess.h>
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#include <linux/hash.h>
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#include <linux/pci.h>
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#include <linux/timekeeper_internal.h>
#include <linux/pvclock_gtod.h>
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#include <linux/kvm_irqfd.h>
#include <linux/irqbypass.h>
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#include <linux/sched/stat.h>

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#include <trace/events/kvm.h>
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#include <asm/debugreg.h>
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#include <asm/msr.h>
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#include <asm/desc.h>
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#include <asm/mce.h>
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#include <linux/kernel_stat.h>
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#include <asm/fpu/internal.h> /* Ugh! */
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#include <asm/pvclock.h>
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#include <asm/div64.h>
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#include <asm/irq_remapping.h>
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#define CREATE_TRACE_POINTS
#include "trace.h"

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#define MAX_IO_MSRS 256
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#define KVM_MAX_MCE_BANKS 32
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u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
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#define emul_to_vcpu(ctxt) \
	container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)

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/* EFER defaults:
 * - enable syscall per default because its emulated by KVM
 * - enable LME and LMA per default on 64 bit KVM
 */
#ifdef CONFIG_X86_64
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static
u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
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#else
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static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
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#endif
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#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
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#define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
                                    KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
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static void update_cr8_intercept(struct kvm_vcpu *vcpu);
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static void process_nmi(struct kvm_vcpu *vcpu);
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static void enter_smm(struct kvm_vcpu *vcpu);
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static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
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struct kvm_x86_ops *kvm_x86_ops __read_mostly;
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EXPORT_SYMBOL_GPL(kvm_x86_ops);
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static bool __read_mostly ignore_msrs = 0;
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module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
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unsigned int min_timer_period_us = 500;
module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);

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static bool __read_mostly kvmclock_periodic_sync = true;
module_param(kvmclock_periodic_sync, bool, S_IRUGO);

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bool __read_mostly kvm_has_tsc_control;
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EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
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u32  __read_mostly kvm_max_guest_tsc_khz;
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EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
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u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
u64  __read_mostly kvm_max_tsc_scaling_ratio;
EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
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u64 __read_mostly kvm_default_tsc_scaling_ratio;
EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
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/* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
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static u32 __read_mostly tsc_tolerance_ppm = 250;
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module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);

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/* lapic timer advance (tscdeadline mode only) in nanoseconds */
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unsigned int __read_mostly lapic_timer_advance_ns = 0;
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module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);

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static bool __read_mostly vector_hashing = true;
module_param(vector_hashing, bool, S_IRUGO);

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static bool __read_mostly backwards_tsc_observed = false;
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#define KVM_NR_SHARED_MSRS 16

struct kvm_shared_msrs_global {
	int nr;
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	u32 msrs[KVM_NR_SHARED_MSRS];
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};

struct kvm_shared_msrs {
	struct user_return_notifier urn;
	bool registered;
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	struct kvm_shared_msr_values {
		u64 host;
		u64 curr;
	} values[KVM_NR_SHARED_MSRS];
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};

static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
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static struct kvm_shared_msrs __percpu *shared_msrs;
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struct kvm_stats_debugfs_item debugfs_entries[] = {
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	{ "pf_fixed", VCPU_STAT(pf_fixed) },
	{ "pf_guest", VCPU_STAT(pf_guest) },
	{ "tlb_flush", VCPU_STAT(tlb_flush) },
	{ "invlpg", VCPU_STAT(invlpg) },
	{ "exits", VCPU_STAT(exits) },
	{ "io_exits", VCPU_STAT(io_exits) },
	{ "mmio_exits", VCPU_STAT(mmio_exits) },
	{ "signal_exits", VCPU_STAT(signal_exits) },
	{ "irq_window", VCPU_STAT(irq_window_exits) },
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	{ "nmi_window", VCPU_STAT(nmi_window_exits) },
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	{ "halt_exits", VCPU_STAT(halt_exits) },
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	{ "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
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	{ "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
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	{ "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
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	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
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	{ "hypercalls", VCPU_STAT(hypercalls) },
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	{ "request_irq", VCPU_STAT(request_irq_exits) },
	{ "irq_exits", VCPU_STAT(irq_exits) },
	{ "host_state_reload", VCPU_STAT(host_state_reload) },
	{ "efer_reload", VCPU_STAT(efer_reload) },
	{ "fpu_reload", VCPU_STAT(fpu_reload) },
	{ "insn_emulation", VCPU_STAT(insn_emulation) },
	{ "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
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	{ "irq_injections", VCPU_STAT(irq_injections) },
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	{ "nmi_injections", VCPU_STAT(nmi_injections) },
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	{ "req_event", VCPU_STAT(req_event) },
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	{ "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
	{ "mmu_pte_write", VM_STAT(mmu_pte_write) },
	{ "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
	{ "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
	{ "mmu_flooded", VM_STAT(mmu_flooded) },
	{ "mmu_recycled", VM_STAT(mmu_recycled) },
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	{ "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
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	{ "mmu_unsync", VM_STAT(mmu_unsync) },
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	{ "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
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	{ "largepages", VM_STAT(lpages) },
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	{ "max_mmu_page_hash_collisions",
		VM_STAT(max_mmu_page_hash_collisions) },
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	{ NULL }
};

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u64 __read_mostly host_xcr0;

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static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
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static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
{
	int i;
	for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
		vcpu->arch.apf.gfns[i] = ~0;
}

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static void kvm_on_user_return(struct user_return_notifier *urn)
{
	unsigned slot;
	struct kvm_shared_msrs *locals
		= container_of(urn, struct kvm_shared_msrs, urn);
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	struct kvm_shared_msr_values *values;
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	unsigned long flags;

	/*
	 * Disabling irqs at this point since the following code could be
	 * interrupted and executed through kvm_arch_hardware_disable()
	 */
	local_irq_save(flags);
	if (locals->registered) {
		locals->registered = false;
		user_return_notifier_unregister(urn);
	}
	local_irq_restore(flags);
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	for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
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		values = &locals->values[slot];
		if (values->host != values->curr) {
			wrmsrl(shared_msrs_global.msrs[slot], values->host);
			values->curr = values->host;
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		}
	}
}

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static void shared_msr_update(unsigned slot, u32 msr)
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{
	u64 value;
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	unsigned int cpu = smp_processor_id();
	struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
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	/* only read, and nobody should modify it at this time,
	 * so don't need lock */
	if (slot >= shared_msrs_global.nr) {
		printk(KERN_ERR "kvm: invalid MSR slot!");
		return;
	}
	rdmsrl_safe(msr, &value);
	smsr->values[slot].host = value;
	smsr->values[slot].curr = value;
}

void kvm_define_shared_msr(unsigned slot, u32 msr)
{
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	BUG_ON(slot >= KVM_NR_SHARED_MSRS);
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	shared_msrs_global.msrs[slot] = msr;
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	if (slot >= shared_msrs_global.nr)
		shared_msrs_global.nr = slot + 1;
}
EXPORT_SYMBOL_GPL(kvm_define_shared_msr);

static void kvm_shared_msr_cpu_online(void)
{
	unsigned i;

	for (i = 0; i < shared_msrs_global.nr; ++i)
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		shared_msr_update(i, shared_msrs_global.msrs[i]);
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}

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int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
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{
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	unsigned int cpu = smp_processor_id();
	struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
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	int err;
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	if (((value ^ smsr->values[slot].curr) & mask) == 0)
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		return 0;
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	smsr->values[slot].curr = value;
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	err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
	if (err)
		return 1;

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	if (!smsr->registered) {
		smsr->urn.on_user_return = kvm_on_user_return;
		user_return_notifier_register(&smsr->urn);
		smsr->registered = true;
	}
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	return 0;
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}
EXPORT_SYMBOL_GPL(kvm_set_shared_msr);

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static void drop_user_return_notifiers(void)
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{
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	unsigned int cpu = smp_processor_id();
	struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
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	if (smsr->registered)
		kvm_on_user_return(&smsr->urn);
}

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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
{
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	return vcpu->arch.apic_base;
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}
EXPORT_SYMBOL_GPL(kvm_get_apic_base);

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int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
{
	u64 old_state = vcpu->arch.apic_base &
		(MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
	u64 new_state = msr_info->data &
		(MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
	u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
		0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);

	if (!msr_info->host_initiated &&
	    ((msr_info->data & reserved_bits) != 0 ||
	     new_state == X2APIC_ENABLE ||
	     (new_state == MSR_IA32_APICBASE_ENABLE &&
	      old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
	     (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
	      old_state == 0)))
		return 1;

	kvm_lapic_set_base(vcpu, msr_info->data);
	return 0;
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}
EXPORT_SYMBOL_GPL(kvm_set_apic_base);

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asmlinkage __visible void kvm_spurious_fault(void)
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{
	/* Fault while not rebooting.  We want the trace. */
	BUG();
}
EXPORT_SYMBOL_GPL(kvm_spurious_fault);

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#define EXCPT_BENIGN		0
#define EXCPT_CONTRIBUTORY	1
#define EXCPT_PF		2

static int exception_class(int vector)
{
	switch (vector) {
	case PF_VECTOR:
		return EXCPT_PF;
	case DE_VECTOR:
	case TS_VECTOR:
	case NP_VECTOR:
	case SS_VECTOR:
	case GP_VECTOR:
		return EXCPT_CONTRIBUTORY;
	default:
		break;
	}
	return EXCPT_BENIGN;
}

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#define EXCPT_FAULT		0
#define EXCPT_TRAP		1
#define EXCPT_ABORT		2
#define EXCPT_INTERRUPT		3

static int exception_type(int vector)
{
	unsigned int mask;

	if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
		return EXCPT_INTERRUPT;

	mask = 1 << vector;

	/* #DB is trap, as instruction watchpoints are handled elsewhere */
	if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
		return EXCPT_TRAP;

	if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
		return EXCPT_ABORT;

	/* Reserved exceptions will result in fault */
	return EXCPT_FAULT;
}

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static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
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		unsigned nr, bool has_error, u32 error_code,
		bool reinject)
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{
	u32 prev_nr;
	int class1, class2;

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	kvm_make_request(KVM_REQ_EVENT, vcpu);

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	if (!vcpu->arch.exception.pending) {
	queue:
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		if (has_error && !is_protmode(vcpu))
			has_error = false;
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		vcpu->arch.exception.pending = true;
		vcpu->arch.exception.has_error_code = has_error;
		vcpu->arch.exception.nr = nr;
		vcpu->arch.exception.error_code = error_code;
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		vcpu->arch.exception.reinject = reinject;
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		return;
	}

	/* to check exception */
	prev_nr = vcpu->arch.exception.nr;
	if (prev_nr == DF_VECTOR) {
		/* triple fault -> shutdown */
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		kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
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		return;
	}
	class1 = exception_class(prev_nr);
	class2 = exception_class(nr);
	if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
		|| (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
		/* generate double fault per SDM Table 5-5 */
		vcpu->arch.exception.pending = true;
		vcpu->arch.exception.has_error_code = true;
		vcpu->arch.exception.nr = DF_VECTOR;
		vcpu->arch.exception.error_code = 0;
	} else
		/* replace previous exception with a new one in a hope
		   that instruction re-execution will regenerate lost
		   exception */
		goto queue;
}

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void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
{
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	kvm_multiple_exception(vcpu, nr, false, 0, false);
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}
EXPORT_SYMBOL_GPL(kvm_queue_exception);

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void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
{
	kvm_multiple_exception(vcpu, nr, false, 0, true);
}
EXPORT_SYMBOL_GPL(kvm_requeue_exception);

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int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
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{
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	if (err)
		kvm_inject_gp(vcpu, 0);
	else
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		return kvm_skip_emulated_instruction(vcpu);

	return 1;
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}
EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
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void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
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{
	++vcpu->stat.pf_guest;
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	vcpu->arch.cr2 = fault->address;
	kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
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}
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EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
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static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
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{
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	if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
		vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
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	else
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		vcpu->arch.mmu.inject_page_fault(vcpu, fault);
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	return fault->nested_page_fault;
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}

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void kvm_inject_nmi(struct kvm_vcpu *vcpu)
{
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	atomic_inc(&vcpu->arch.nmi_queued);
	kvm_make_request(KVM_REQ_NMI, vcpu);
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}
EXPORT_SYMBOL_GPL(kvm_inject_nmi);

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void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
{
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	kvm_multiple_exception(vcpu, nr, true, error_code, false);
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}
EXPORT_SYMBOL_GPL(kvm_queue_exception_e);

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void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
{
	kvm_multiple_exception(vcpu, nr, true, error_code, true);
}
EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);

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/*
 * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 * a #GP and return false.
 */
bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
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{
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	if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
		return true;
	kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
	return false;
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}
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EXPORT_SYMBOL_GPL(kvm_require_cpl);
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bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
{
	if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
		return true;

	kvm_queue_exception(vcpu, UD_VECTOR);
	return false;
}
EXPORT_SYMBOL_GPL(kvm_require_dr);

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/*
 * This function will be used to read from the physical memory of the currently
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 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
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 * can read from guest physical or from the guest's guest physical memory.
 */
int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
			    gfn_t ngfn, void *data, int offset, int len,
			    u32 access)
{
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	struct x86_exception exception;
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	gfn_t real_gfn;
	gpa_t ngpa;

	ngpa     = gfn_to_gpa(ngfn);
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	real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
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	if (real_gfn == UNMAPPED_GVA)
		return -EFAULT;

	real_gfn = gpa_to_gfn(real_gfn);

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	return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
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}
EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);

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static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
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			       void *data, int offset, int len, u32 access)
{
	return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
				       data, offset, len, access);
}

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/*
 * Load the pae pdptrs.  Return true is they are all valid.
 */
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int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
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{
	gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
	unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
	int i;
	int ret;
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	u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
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	ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
				      offset * sizeof(u64), sizeof(pdpte),
				      PFERR_USER_MASK|PFERR_WRITE_MASK);
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	if (ret < 0) {
		ret = 0;
		goto out;
	}
	for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
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		if ((pdpte[i] & PT_PRESENT_MASK) &&
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		    (pdpte[i] &
		     vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
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			ret = 0;
			goto out;
		}
	}
	ret = 1;

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	memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
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	__set_bit(VCPU_EXREG_PDPTR,
		  (unsigned long *)&vcpu->arch.regs_avail);
	__set_bit(VCPU_EXREG_PDPTR,
		  (unsigned long *)&vcpu->arch.regs_dirty);
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out:

	return ret;
}
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EXPORT_SYMBOL_GPL(load_pdptrs);
582

583
bool pdptrs_changed(struct kvm_vcpu *vcpu)
584
{
585
	u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
586
	bool changed = true;
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	int offset;
	gfn_t gfn;
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	int r;

	if (is_long_mode(vcpu) || !is_pae(vcpu))
		return false;

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	if (!test_bit(VCPU_EXREG_PDPTR,
		      (unsigned long *)&vcpu->arch.regs_avail))
		return true;

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	gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
	offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
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	r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
				       PFERR_USER_MASK | PFERR_WRITE_MASK);
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	if (r < 0)
		goto out;
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	changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
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out:

	return changed;
}
609
EXPORT_SYMBOL_GPL(pdptrs_changed);
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611
int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
612
{
613
	unsigned long old_cr0 = kvm_read_cr0(vcpu);
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	unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
615

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	cr0 |= X86_CR0_ET;

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#ifdef CONFIG_X86_64
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	if (cr0 & 0xffffffff00000000UL)
		return 1;
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#endif

	cr0 &= ~CR0_RESERVED_BITS;
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	if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
		return 1;
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	if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
		return 1;
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	if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
#ifdef CONFIG_X86_64
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		if ((vcpu->arch.efer & EFER_LME)) {
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			int cs_db, cs_l;

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			if (!is_pae(vcpu))
				return 1;
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			kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
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			if (cs_l)
				return 1;
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		} else
#endif
643
		if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
644
						 kvm_read_cr3(vcpu)))
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			return 1;
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	}

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	if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
		return 1;

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	kvm_x86_ops->set_cr0(vcpu, cr0);

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	if ((cr0 ^ old_cr0) & X86_CR0_PG) {
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		kvm_clear_async_pf_completion_queue(vcpu);
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		kvm_async_pf_hash_reset(vcpu);
	}
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	if ((cr0 ^ old_cr0) & update_bits)
		kvm_mmu_reset_context(vcpu);
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	if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
	    kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
	    !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
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		kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);

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	return 0;
}
668
EXPORT_SYMBOL_GPL(kvm_set_cr0);
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void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
671
{
672
	(void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
673
}
674
EXPORT_SYMBOL_GPL(kvm_lmsw);
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static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
{
	if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
			!vcpu->guest_xcr0_loaded) {
		/* kvm_set_xcr() also depends on this */
		xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
		vcpu->guest_xcr0_loaded = 1;
	}
}

static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
{
	if (vcpu->guest_xcr0_loaded) {
		if (vcpu->arch.xcr0 != host_xcr0)
			xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
		vcpu->guest_xcr0_loaded = 0;
	}
}

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static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
696
{
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	u64 xcr0 = xcr;
	u64 old_xcr0 = vcpu->arch.xcr0;
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	u64 valid_bits;
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	/* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
	if (index != XCR_XFEATURE_ENABLED_MASK)
		return 1;
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	if (!(xcr0 & XFEATURE_MASK_FP))
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		return 1;
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	if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
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		return 1;
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	/*
	 * Do not allow the guest to set bits that we do not support
	 * saving.  However, xcr0 bit 0 is always set, even if the
	 * emulated CPU does not support XSAVE (see fx_init).
	 */
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	valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
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	if (xcr0 & ~valid_bits)
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		return 1;
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	if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
	    (!(xcr0 & XFEATURE_MASK_BNDCSR)))
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		return 1;

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	if (xcr0 & XFEATURE_MASK_AVX512) {
		if (!(xcr0 & XFEATURE_MASK_YMM))
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			return 1;
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		if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
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			return 1;
	}
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	vcpu->arch.xcr0 = xcr0;
729

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	if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
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		kvm_update_cpuid(vcpu);
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	return 0;
}

int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
{
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	if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
	    __kvm_set_xcr(vcpu, index, xcr)) {
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		kvm_inject_gp(vcpu, 0);
		return 1;
	}
	return 0;
}
EXPORT_SYMBOL_GPL(kvm_set_xcr);

746
int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
747
{
748
	unsigned long old_cr4 = kvm_read_cr4(vcpu);
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	unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
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				   X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
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	if (cr4 & CR4_RESERVED_BITS)
		return 1;
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	if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
		return 1;

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	if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
		return 1;

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	if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
		return 1;

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	if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
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		return 1;

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	if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
		return 1;

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	if (is_long_mode(vcpu)) {
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		if (!(cr4 & X86_CR4_PAE))
			return 1;
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	} else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
		   && ((cr4 ^ old_cr4) & pdptr_bits)
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		   && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
				   kvm_read_cr3(vcpu)))
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		return 1;

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	if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
		if (!guest_cpuid_has_pcid(vcpu))
			return 1;

		/* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
		if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
			return 1;
	}

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	if (kvm_x86_ops->set_cr4(vcpu, cr4))
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		return 1;
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	if (((cr4 ^ old_cr4) & pdptr_bits) ||
	    (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
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		kvm_mmu_reset_context(vcpu);
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795
	if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
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		kvm_update_cpuid(vcpu);
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	return 0;
}
800
EXPORT_SYMBOL_GPL(kvm_set_cr4);
801

802
int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
803
{
804
#ifdef CONFIG_X86_64
805
	cr3 &= ~CR3_PCID_INVD;
806
#endif
807

808
	if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
809
		kvm_mmu_sync_roots(vcpu);
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		kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
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		return 0;
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	}

814
	if (is_long_mode(vcpu)) {
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		if (cr3 & CR3_L_MODE_RESERVED_BITS)
			return 1;
	} else if (is_pae(vcpu) && is_paging(vcpu) &&
		   !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
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		return 1;
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821
	vcpu->arch.cr3 = cr3;
822
	__set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
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	kvm_mmu_new_cr3(vcpu);
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	return 0;
}
826
EXPORT_SYMBOL_GPL(kvm_set_cr3);
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int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
829
{
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	if (cr8 & CR8_RESERVED_BITS)
		return 1;
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	if (lapic_in_kernel(vcpu))
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		kvm_lapic_set_tpr(vcpu, cr8);
	else
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		vcpu->arch.cr8 = cr8;
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	return 0;
}
838
EXPORT_SYMBOL_GPL(kvm_set_cr8);
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840
unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
841
{
842
	if (lapic_in_kernel(vcpu))
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		return kvm_lapic_get_cr8(vcpu);
	else
845
		return vcpu->arch.cr8;
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}
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EXPORT_SYMBOL_GPL(kvm_get_cr8);
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static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
{
	int i;

	if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
		for (i = 0; i < KVM_NR_DB_REGS; i++)
			vcpu->arch.eff_db[i] = vcpu->arch.db[i];
		vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
	}
}

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static void kvm_update_dr6(struct kvm_vcpu *vcpu)
{
	if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
		kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
}

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static void kvm_update_dr7(struct kvm_vcpu *vcpu)
{
	unsigned long dr7;

	if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
		dr7 = vcpu->arch.guest_debug_dr7;
	else
		dr7 = vcpu->arch.dr7;
	kvm_x86_ops->set_dr7(vcpu, dr7);
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	vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
	if (dr7 & DR7_BP_EN_MASK)
		vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
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}

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static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
{
	u64 fixed = DR6_FIXED_1;

	if (!guest_cpuid_has_rtm(vcpu))
		fixed |= DR6_RTM;
	return fixed;
}

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static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
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{
	switch (dr) {
	case 0 ... 3:
		vcpu->arch.db[dr] = val;
		if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
			vcpu->arch.eff_db[dr] = val;
		break;
	case 4:
		/* fall through */
	case 6:
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		if (val & 0xffffffff00000000ULL)
			return -1; /* #GP */
902
		vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
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		kvm_update_dr6(vcpu);
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		break;
	case 5:
		/* fall through */
	default: /* 7 */
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		if (val & 0xffffffff00000000ULL)
			return -1; /* #GP */
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		vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
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		kvm_update_dr7(vcpu);
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		break;
	}

	return 0;
}
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int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
{
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	if (__kvm_set_dr(vcpu, dr, val)) {
921
		kvm_inject_gp(vcpu, 0);
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		return 1;
	}
	return 0;
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}
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EXPORT_SYMBOL_GPL(kvm_set_dr);

928
int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
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{
	switch (dr) {
	case 0 ... 3:
		*val = vcpu->arch.db[dr];
		break;
	case 4:
		/* fall through */
	case 6:
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		if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
			*val = vcpu->arch.dr6;
		else
			*val = kvm_x86_ops->get_dr6(vcpu);
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		break;
	case 5:
		/* fall through */
	default: /* 7 */
		*val = vcpu->arch.dr7;
		break;
	}
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	return 0;
}
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EXPORT_SYMBOL_GPL(kvm_get_dr);

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bool kvm_rdpmc(struct kvm_vcpu *vcpu)
{
	u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
	u64 data;
	int err;

958
	err = kvm_pmu_rdpmc(vcpu, ecx, &data);
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	if (err)
		return err;
	kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
	kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
	return err;
}
EXPORT_SYMBOL_GPL(kvm_rdpmc);

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/*
 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 *
 * This list is modified at module load time to reflect the
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 * capabilities of the host cpu. This capabilities test skips MSRs that are
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 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 * may depend on host virtualization features rather than host cpu features.
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 */
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977 978
static u32 msrs_to_save[] = {
	MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
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	MSR_STAR,
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#ifdef CONFIG_X86_64
	MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
#endif
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	MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
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	MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
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};

static unsigned num_msrs_to_save;

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static u32 emulated_msrs[] = {
	MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
	MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
	HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
	HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
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	HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
	HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
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	HV_X64_MSR_RESET,
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	HV_X64_MSR_VP_INDEX,
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	HV_X64_MSR_VP_RUNTIME,
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	HV_X64_MSR_SCONTROL,
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	HV_X64_MSR_STIMER0_CONFIG,
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	HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
	MSR_KVM_PV_EOI_EN,

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	MSR_IA32_TSC_ADJUST,
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	MSR_IA32_TSCDEADLINE,
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	MSR_IA32_MISC_ENABLE,
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	MSR_IA32_MCG_STATUS,
	MSR_IA32_MCG_CTL,
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	MSR_IA32_MCG_EXT_CTL,
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	MSR_IA32_SMBASE,
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};

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static unsigned num_emulated_msrs;

1015
bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1016
{
1017
	if (efer & efer_reserved_bits)
1018
		return false;
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	if (efer & EFER_FFXSR) {
		struct kvm_cpuid_entry2 *feat;

		feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
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		if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
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			return false;
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	}

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	if (efer & EFER_SVME) {
		struct kvm_cpuid_entry2 *feat;

		feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
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		if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
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			return false;
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	}

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	return true;
}
EXPORT_SYMBOL_GPL(kvm_valid_efer);

static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
{
	u64 old_efer = vcpu->arch.efer;

	if (!kvm_valid_efer(vcpu, efer))
		return 1;

	if (is_paging(vcpu)
	    && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
		return 1;

1051
	efer &= ~EFER_LMA;
1052
	efer |= vcpu->arch.efer & EFER_LMA;
1053

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	kvm_x86_ops->set_efer(vcpu, efer);

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	/* Update reserved bits */
	if ((efer ^ old_efer) & EFER_NX)
		kvm_mmu_reset_context(vcpu);

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	return 0;
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}

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void kvm_enable_efer_bits(u64 mask)
{
       efer_reserved_bits &= ~mask;
}
EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);

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/*
 * Writes msr value into into the appropriate "register".
 * Returns 0 on success, non-0 otherwise.
 * Assumes vcpu_load() was already called.
 */
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int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
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{
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	switch (msr->index) {
	case MSR_FS_BASE:
	case MSR_GS_BASE:
	case MSR_KERNEL_GS_BASE:
	case MSR_CSTAR:
	case MSR_LSTAR:
		if (is_noncanonical_address(msr->data))
			return 1;
		break;
	case MSR_IA32_SYSENTER_EIP:
	case MSR_IA32_SYSENTER_ESP:
		/*
		 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
		 * non-canonical address is written on Intel but not on
		 * AMD (which ignores the top 32-bits, because it does
		 * not implement 64-bit SYSENTER).
		 *
		 * 64-bit code should hence be able to write a non-canonical
		 * value on AMD.  Making the address canonical ensures that
		 * vmentry does not fail on Intel after writing a non-canonical
		 * value, and that something deterministic happens if the guest
		 * invokes 64-bit SYSENTER.
		 */
		msr->data = get_canonical(msr->data);
	}
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	return kvm_x86_ops->set_msr(vcpu, msr);
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}
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EXPORT_SYMBOL_GPL(kvm_set_msr);
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/*
 * Adapt set_msr() to msr_io()'s calling convention
 */
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static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
{
	struct msr_data msr;
	int r;

	msr.index = index;
	msr.host_initiated = true;
	r = kvm_get_msr(vcpu, &msr);
	if (r)
		return r;

	*data = msr.data;
	return 0;
}

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static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
{
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	struct msr_data msr;

	msr.data = *data;
	msr.index = index;
	msr.host_initiated = true;
	return kvm_set_msr(vcpu, &msr);
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}

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#ifdef CONFIG_X86_64
struct pvclock_gtod_data {
	seqcount_t	seq;

	struct { /* extract of a clocksource struct */
		int vclock_mode;
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		u64	cycle_last;
		u64	mask;
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		u32	mult;
		u32	shift;
	} clock;

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	u64		boot_ns;
	u64		nsec_base;
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	u64		wall_time_sec;
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};

static struct pvclock_gtod_data pvclock_gtod_data;

static void update_pvclock_gtod(struct timekeeper *tk)
{
	struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
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	u64 boot_ns;

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	boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
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	write_seqcount_begin(&vdata->seq);

	/* copy pvclock gtod data */
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	vdata->clock.vclock_mode	= tk->tkr_mono.clock->archdata.vclock_mode;
	vdata->clock.cycle_last		= tk->tkr_mono.cycle_last;
	vdata->clock.mask		= tk->tkr_mono.mask;
	vdata->clock.mult		= tk->tkr_mono.mult;
	vdata->clock.shift		= tk->tkr_mono.shift;
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	vdata->boot_ns			= boot_ns;
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	vdata->nsec_base		= tk->tkr_mono.xtime_nsec;
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	vdata->wall_time_sec            = tk->xtime_sec;

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	write_seqcount_end(&vdata->seq);
}
#endif

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void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
{
	/*
	 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
	 * vcpu_enter_guest.  This function is only called from
	 * the physical CPU that is running vcpu.
	 */
	kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
}
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static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
{
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	int version;
	int r;
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	struct pvclock_wall_clock wc;
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	struct timespec64 boot;
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	if (!wall_clock)
		return;

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	r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
	if (r)
		return;

	if (version & 1)
		++version;  /* first time write, random junk */

	++version;
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	if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
		return;
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	/*
	 * The guest calculates current wall clock time by adding
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	 * system time (updated by kvm_guest_time_update below) to the
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	 * wall clock specified here.  guest system time equals host
	 * system time for us, thus we must fill in host boot time here.
	 */
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	getboottime64(&boot);
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	if (kvm->arch.kvmclock_offset) {
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		struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
		boot = timespec64_sub(boot, ts);
1220
	}
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	wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
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	wc.nsec = boot.tv_nsec;
	wc.version = version;
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	kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));

	version++;
	kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
}

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static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
{
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	do_shl32_div32(dividend, divisor);
	return dividend;
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}

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static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
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			       s8 *pshift, u32 *pmultiplier)
1239
{
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	uint64_t scaled64;
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	int32_t  shift = 0;
	uint64_t tps64;
	uint32_t tps32;

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	tps64 = base_hz;
	scaled64 = scaled_hz;
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	while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
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		tps64 >>= 1;
		shift--;
	}

	tps32 = (uint32_t)tps64;
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	while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
		if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
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			scaled64 >>= 1;
		else
			tps32 <<= 1;
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		shift++;
	}

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	*pshift = shift;
	*pmultiplier = div_frac(scaled64, tps32);
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	pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
		 __func__, base_hz, scaled_hz, shift, *pmultiplier);
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}

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#ifdef CONFIG_X86_64
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static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
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#endif
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static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
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static unsigned long max_tsc_khz;
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static u32 adjust_tsc_khz(u32 khz, s32 ppm)
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{
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	u64 v = (u64)khz * (1000000 + ppm);
	do_div(v, 1000000);
	return v;
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}

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static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
{
	u64 ratio;

	/* Guest TSC same frequency as host TSC? */
	if (!scale) {
		vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
		return 0;
	}

	/* TSC scaling supported? */
	if (!kvm_has_tsc_control) {
		if (user_tsc_khz > tsc_khz) {
			vcpu->arch.tsc_catchup = 1;
			vcpu->arch.tsc_always_catchup = 1;
			return 0;
		} else {
			WARN(1, "user requested TSC rate below hardware speed\n");
			return -1;
		}
	}

	/* TSC scaling required  - calculate ratio */
	ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
				user_tsc_khz, tsc_khz);

	if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
		WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
			  user_tsc_khz);
		return -1;
	}

	vcpu->arch.tsc_scaling_ratio = ratio;
	return 0;
}

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static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1319
{
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	u32 thresh_lo, thresh_hi;
	int use_scaling = 0;
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	/* tsc_khz can be zero if TSC calibration fails */
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	if (user_tsc_khz == 0) {
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		/* set tsc_scaling_ratio to a safe value */
		vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
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		return -1;
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	}
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	/* Compute a scale to convert nanoseconds in TSC cycles */
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	kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
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			   &vcpu->arch.virtual_tsc_shift,
			   &vcpu->arch.virtual_tsc_mult);
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	vcpu->arch.virtual_tsc_khz = user_tsc_khz;
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	/*
	 * Compute the variation in TSC rate which is acceptable
	 * within the range of tolerance and decide if the
	 * rate being applied is within that bounds of the hardware
	 * rate.  If so, no scaling or compensation need be done.
	 */
	thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
	thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
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	if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
		pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
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		use_scaling = 1;
	}
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	return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
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}

static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
{
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	u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
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				      vcpu->arch.virtual_tsc_mult,
				      vcpu->arch.virtual_tsc_shift);
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	tsc += vcpu->arch.this_tsc_write;
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	return tsc;
}

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static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
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{
#ifdef CONFIG_X86_64
	bool vcpus_matched;
	struct kvm_arch *ka = &vcpu->kvm->arch;
	struct pvclock_gtod_data *gtod = &pvclock_gtod_data;

	vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
			 atomic_read(&vcpu->kvm->online_vcpus));

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	/*
	 * Once the masterclock is enabled, always perform request in
	 * order to update it.
	 *
	 * In order to enable masterclock, the host clocksource must be TSC
	 * and the vcpus need to have matched TSCs.  When that happens,
	 * perform request to enable masterclock.
	 */
	if (ka->use_master_clock ||
	    (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
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		kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);

	trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
			    atomic_read(&vcpu->kvm->online_vcpus),
		            ka->use_master_clock, gtod->clock.vclock_mode);
#endif
}

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static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
{
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	u64 curr_offset = vcpu->arch.tsc_offset;
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	vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
}

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/*
 * Multiply tsc by a fixed point number represented by ratio.
 *
 * The most significant 64-N bits (mult) of ratio represent the
 * integral part of the fixed point number; the remaining N bits
 * (frac) represent the fractional part, ie. ratio represents a fixed
 * point number (mult + frac * 2^(-N)).
 *
 * N equals to kvm_tsc_scaling_ratio_frac_bits.
 */
static inline u64 __scale_tsc(u64 ratio, u64 tsc)
{
	return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
}

u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
{
	u64 _tsc = tsc;
	u64 ratio = vcpu->arch.tsc_scaling_ratio;

	if (ratio != kvm_default_tsc_scaling_ratio)
		_tsc = __scale_tsc(ratio, tsc);

	return _tsc;
}
EXPORT_SYMBOL_GPL(kvm_scale_tsc);

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static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
{
	u64 tsc;

	tsc = kvm_scale_tsc(vcpu, rdtsc());

	return target_tsc - tsc;
}

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u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
{
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	return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
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}
EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);

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static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
{
	kvm_x86_ops->write_tsc_offset(vcpu, offset);
	vcpu->arch.tsc_offset = offset;
}

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void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
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{
	struct kvm *kvm = vcpu->kvm;
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	u64 offset, ns, elapsed;
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	unsigned long flags;
1447
	s64 usdiff;
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	bool matched;
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	bool already_matched;
1450
	u64 data = msr->data;
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1452
	raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
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	offset = kvm_compute_tsc_offset(vcpu, data);
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	ns = ktime_get_boot_ns();
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	elapsed = ns - kvm->arch.last_tsc_nsec;
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	if (vcpu->arch.virtual_tsc_khz) {
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		int faulted = 0;

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		/* n.b - signed multiplication and division required */
		usdiff = data - kvm->arch.last_tsc_write;
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#ifdef CONFIG_X86_64
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		usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
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#else
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		/* do_div() only does unsigned */
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		asm("1: idivl %[divisor]\n"
		    "2: xor %%edx, %%edx\n"
		    "   movl $0, %[faulted]\n"
		    "3:\n"
		    ".section .fixup,\"ax\"\n"
		    "4: movl $1, %[faulted]\n"
		    "   jmp  3b\n"
		    ".previous\n"

		_ASM_EXTABLE(1b, 4b)

		: "=A"(usdiff), [faulted] "=r" (faulted)
		: "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));

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#endif
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		do_div(elapsed, 1000);
		usdiff -= elapsed;
		if (usdiff < 0)
			usdiff = -usdiff;
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		/* idivl overflow => difference is larger than USEC_PER_SEC */
		if (faulted)
			usdiff = USEC_PER_SEC;
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	} else
		usdiff = USEC_PER_SEC; /* disable TSC match window below */
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	/*
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	 * Special case: TSC write with a small delta (1 second) of virtual
	 * cycle time against real time is interpreted as an attempt to
	 * synchronize the CPU.
         *
	 * For a reliable TSC, we can match TSC offsets, and for an unstable
	 * TSC, we add elapsed time in this computation.  We could let the
	 * compensation code attempt to catch up if we fall behind, but
	 * it's better to try to match offsets from the beginning.
         */
1502
	if (usdiff < USEC_PER_SEC &&
1503
	    vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1504
		if (!check_tsc_unstable()) {
1505
			offset = kvm->arch.cur_tsc_offset;
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			pr_debug("kvm: matched tsc offset for %llu\n", data);
		} else {
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			u64 delta = nsec_to_cycles(vcpu, elapsed);
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			data += delta;
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			offset = kvm_compute_tsc_offset(vcpu, data);
1511
			pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1512
		}
1513
		matched = true;
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		already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
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	} else {
		/*
		 * We split periods of matched TSC writes into generations.
		 * For each generation, we track the original measured
		 * nanosecond time, offset, and write, so if TSCs are in
		 * sync, we can match exact offset, and if not, we can match
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		 * exact software computation in compute_guest_tsc()
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		 *
		 * These values are tracked in kvm->arch.cur_xxx variables.
		 */
		kvm->arch.cur_tsc_generation++;
		kvm->arch.cur_tsc_nsec = ns;
		kvm->arch.cur_tsc_write = data;
		kvm->arch.cur_tsc_offset = offset;
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		matched = false;
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		pr_debug("kvm: new tsc generation %llu, clock %llu\n",
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			 kvm->arch.cur_tsc_generation, data);
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	}
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	/*
	 * We also track th most recent recorded KHZ, write and time to
	 * allow the matching interval to be extended at each write.
	 */
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	kvm->arch.last_tsc_nsec = ns;
	kvm->arch.last_tsc_write = data;
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	kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
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	vcpu->arch.last_guest_tsc = data;
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	/* Keep track of which generation this VCPU has synchronized to */
	vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
	vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
	vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;

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	if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
		update_ia32_tsc_adjust_msr(vcpu, offset);
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	kvm_vcpu_write_tsc_offset(vcpu, offset);
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	raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
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	spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
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	if (!matched) {
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		kvm->arch.nr_vcpus_matched_tsc = 0;
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	} else if (!already_matched) {
		kvm->arch.nr_vcpus_matched_tsc++;
	}
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	kvm_track_tsc_matching(vcpu);
	spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
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}
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EXPORT_SYMBOL_GPL(kvm_write_tsc);

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static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
					   s64 adjustment)
{
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	kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
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}

static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
{
	if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
		WARN_ON(adjustment < 0);
	adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
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	adjust_tsc_offset_guest(vcpu, adjustment);
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}

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#ifdef CONFIG_X86_64

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static u64 read_tsc(void)
1584
{
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	u64 ret = (u64)rdtsc_ordered();
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	u64 last = pvclock_gtod_data.clock.cycle_last;
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	if (likely(ret >= last))
		return ret;

	/*
	 * GCC likes to generate cmov here, but this branch is extremely
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	 * predictable (it's just a function of time and the likely is
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	 * very likely) and there's a data dependence, so force GCC
	 * to generate a branch instead.  I don't barrier() because
	 * we don't actually need a barrier, and if this function
	 * ever gets inlined it will generate worse code.
	 */
	asm volatile ("");
	return last;
}

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static inline u64 vgettsc(u64 *cycle_now)
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{
	long v;
	struct pvclock_gtod_data *gtod = &pvclock_gtod_data;

	*cycle_now = read_tsc();

	v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
	return v * gtod->clock.mult;
}

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static int do_monotonic_boot(s64 *t, u64 *cycle_now)
1615
{
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	struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
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	unsigned long seq;
	int mode;
1619
	u64 ns;
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	do {
		seq = read_seqcount_begin(&gtod->seq);
		mode = gtod->clock.vclock_mode;
1624
		ns = gtod->nsec_base;
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		ns += vgettsc(cycle_now);
		ns >>= gtod->clock.shift;
1627
		ns += gtod->boot_ns;
1628
	} while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1629
	*t = ns;
1630 1631 1632 1633

	return mode;
}

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static int do_realtime(struct timespec *ts, u64 *cycle_now)
{
	struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
	unsigned long seq;
	int mode;
	u64 ns;

	do {
		seq = read_seqcount_begin(&gtod->seq);
		mode = gtod->clock.vclock_mode;
		ts->tv_sec = gtod->wall_time_sec;
		ns = gtod->nsec_base;
		ns += vgettsc(cycle_now);
		ns >>= gtod->clock.shift;
	} while (unlikely(read_seqcount_retry(&gtod->seq, seq)));

	ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
	ts->tv_nsec = ns;

	return mode;
}

1656
/* returns true if host is using tsc clocksource */
1657
static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *cycle_now)
1658 1659 1660 1661 1662
{
	/* checked again under seqlock below */
	if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
		return false;

1663
	return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1664
}
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/* returns true if host is using tsc clocksource */
static bool kvm_get_walltime_and_clockread(struct timespec *ts,
					   u64 *cycle_now)
{
	/* checked again under seqlock below */
	if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
		return false;

	return do_realtime(ts, cycle_now) == VCLOCK_TSC;
}
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#endif

/*
 *
1680 1681 1682
 * Assuming a stable TSC across physical CPUS, and a stable TSC
 * across virtual CPUs, the following condition is possible.
 * Each numbered line represents an event visible to both
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 * CPUs at the next numbered event.
 *
 * "timespecX" represents host monotonic time. "tscX" represents
 * RDTSC value.
 *
 * 		VCPU0 on CPU0		|	VCPU1 on CPU1
 *
 * 1.  read timespec0,tsc0
 * 2.					| timespec1 = timespec0 + N
 * 					| tsc1 = tsc0 + M
 * 3. transition to guest		| transition to guest
 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
 * 5.				        | ret1 = timespec1 + (rdtsc - tsc1)
 * 				        | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
 *
 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
 *
 * 	- ret0 < ret1
 *	- timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
 *		...
 *	- 0 < N - M => M < N
 *
 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
 * always the case (the difference between two distinct xtime instances
 * might be smaller then the difference between corresponding TSC reads,
 * when updating guest vcpus pvclock areas).
 *
 * To avoid that problem, do not allow visibility of distinct
 * system_timestamp/tsc_timestamp values simultaneously: use a master
 * copy of host monotonic time values. Update that master copy
 * in lockstep.
 *
1715
 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
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 *
 */

static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
{
#ifdef CONFIG_X86_64
	struct kvm_arch *ka = &kvm->arch;
	int vclock_mode;
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	bool host_tsc_clocksource, vcpus_matched;

	vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
			atomic_read(&kvm->online_vcpus));
1728 1729 1730 1731 1732

	/*
	 * If the host uses TSC clock, then passthrough TSC as stable
	 * to the guest.
	 */
1733
	host_tsc_clocksource = kvm_get_time_and_clockread(
1734 1735 1736
					&ka->master_kernel_ns,
					&ka->master_cycle_now);

1737
	ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1738 1739
				&& !backwards_tsc_observed
				&& !ka->boot_vcpu_runs_old_kvmclock;
1740

1741 1742 1743 1744
	if (ka->use_master_clock)
		atomic_set(&kvm_guest_has_master_clock, 1);

	vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1745 1746
	trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
					vcpus_matched);
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#endif
}

1750 1751 1752 1753 1754
void kvm_make_mclock_inprogress_request(struct kvm *kvm)
{
	kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
}

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static void kvm_gen_update_masterclock(struct kvm *kvm)
{
#ifdef CONFIG_X86_64
	int i;
	struct kvm_vcpu *vcpu;
	struct kvm_arch *ka = &kvm->arch;

	spin_lock(&ka->pvclock_gtod_sync_lock);
	kvm_make_mclock_inprogress_request(kvm);
	/* no guest entries from this point */
	pvclock_update_vm_gtod_copy(kvm);

	kvm_for_each_vcpu(i, vcpu, kvm)
1768
		kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
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	/* guest entries allowed */
	kvm_for_each_vcpu(i, vcpu, kvm)
		clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);

	spin_unlock(&ka->pvclock_gtod_sync_lock);
#endif
}

1778 1779 1780
static u64 __get_kvmclock_ns(struct kvm *kvm)
{
	struct kvm_arch *ka = &kvm->arch;
1781
	struct pvclock_vcpu_time_info hv_clock;
1782

1783 1784 1785 1786
	spin_lock(&ka->pvclock_gtod_sync_lock);
	if (!ka->use_master_clock) {
		spin_unlock(&ka->pvclock_gtod_sync_lock);
		return ktime_get_boot_ns() + ka->kvmclock_offset;
1787 1788
	}

1789 1790 1791 1792 1793 1794 1795 1796
	hv_clock.tsc_timestamp = ka->master_cycle_now;
	hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
	spin_unlock(&ka->pvclock_gtod_sync_lock);

	kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
			   &hv_clock.tsc_shift,
			   &hv_clock.tsc_to_system_mul);
	return __pvclock_read_cycles(&hv_clock, rdtsc());
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}

u64 get_kvmclock_ns(struct kvm *kvm)
{
	unsigned long flags;
	s64 ns;

	local_irq_save(flags);
	ns = __get_kvmclock_ns(kvm);
	local_irq_restore(flags);

	return ns;
}

1811 1812 1813 1814 1815
static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
{
	struct kvm_vcpu_arch *vcpu = &v->arch;
	struct pvclock_vcpu_time_info guest_hv_clock;

1816
	if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836
		&guest_hv_clock, sizeof(guest_hv_clock))))
		return;

	/* This VCPU is paused, but it's legal for a guest to read another
	 * VCPU's kvmclock, so we really have to follow the specification where
	 * it says that version is odd if data is being modified, and even after
	 * it is consistent.
	 *
	 * Version field updates must be kept separate.  This is because
	 * kvm_write_guest_cached might use a "rep movs" instruction, and
	 * writes within a string instruction are weakly ordered.  So there
	 * are three writes overall.
	 *
	 * As a small optimization, only write the version field in the first
	 * and third write.  The vcpu->pv_time cache is still valid, because the
	 * version field is the first in the struct.
	 */
	BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);

	vcpu->hv_clock.version = guest_hv_clock.version + 1;
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	kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
				&vcpu->hv_clock,
				sizeof(vcpu->hv_clock.version));
1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852

	smp_wmb();

	/* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
	vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);

	if (vcpu->pvclock_set_guest_stopped_request) {
		vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
		vcpu->pvclock_set_guest_stopped_request = false;
	}

	trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);

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	kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
				&vcpu->hv_clock,
				sizeof(vcpu->hv_clock));
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	smp_wmb();

	vcpu->hv_clock.version++;
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	kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
				&vcpu->hv_clock,
				sizeof(vcpu->hv_clock.version));
1863 1864
}

1865
static int kvm_guest_time_update(struct kvm_vcpu *v)
1866
{
1867
	unsigned long flags, tgt_tsc_khz;
1868
	struct kvm_vcpu_arch *vcpu = &v->arch;
1869
	struct kvm_arch *ka = &v->kvm->arch;
1870
	s64 kernel_ns;
1871
	u64 tsc_timestamp, host_tsc;
1872
	u8 pvclock_flags;
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	bool use_master_clock;

	kernel_ns = 0;
	host_tsc = 0;
1877

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	/*
	 * If the host uses TSC clock, then passthrough TSC as stable
	 * to the guest.
	 */
	spin_lock(&ka->pvclock_gtod_sync_lock);
	use_master_clock = ka->use_master_clock;
	if (use_master_clock) {
		host_tsc = ka->master_cycle_now;
		kernel_ns = ka->master_kernel_ns;
	}
	spin_unlock(&ka->pvclock_gtod_sync_lock);
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	/* Keep irq disabled to prevent changes to the clock */
	local_irq_save(flags);
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	tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
	if (unlikely(tgt_tsc_khz == 0)) {
1894 1895 1896 1897
		local_irq_restore(flags);
		kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
		return 1;
	}
1898
	if (!use_master_clock) {
1899
		host_tsc = rdtsc();
1900
		kernel_ns = ktime_get_boot_ns();
1901 1902
	}

1903
	tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
1904

Zachary Amsden's avatar
Zachary Amsden committed
1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917
	/*
	 * We may have to catch up the TSC to match elapsed wall clock
	 * time for two reasons, even if kvmclock is used.
	 *   1) CPU could have been running below the maximum TSC rate
	 *   2) Broken TSC compensation resets the base at each VCPU
	 *      entry to avoid unknown leaps of TSC even when running
	 *      again on the same CPU.  This may cause apparent elapsed
	 *      time to disappear, and the guest to stand still or run
	 *	very slowly.
	 */
	if (vcpu->tsc_catchup) {
		u64 tsc = compute_guest_tsc(v, kernel_ns);
		if (tsc > tsc_timestamp) {
1918
			adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
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Zachary Amsden committed
1919 1920
			tsc_timestamp = tsc;
		}
1921 1922
	}

1923 1924
	local_irq_restore(flags);

1925
	/* With all the info we got, fill in the values */
1926

1927 1928 1929 1930
	if (kvm_has_tsc_control)
		tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);

	if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
1931
		kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
1932 1933
				   &vcpu->hv_clock.tsc_shift,
				   &vcpu->hv_clock.tsc_to_system_mul);
1934
		vcpu->hw_tsc_khz = tgt_tsc_khz;
1935 1936
	}

1937
	vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1938
	vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
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1939
	vcpu->last_guest_tsc = tsc_timestamp;
1940

1941
	/* If the host uses TSC clocksource, then it is stable */
1942
	pvclock_flags = 0;
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	if (use_master_clock)
		pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;

1946 1947
	vcpu->hv_clock.flags = pvclock_flags;

1948 1949 1950 1951
	if (vcpu->pv_time_enabled)
		kvm_setup_pvclock_page(v);
	if (v == kvm_get_vcpu(v->kvm, 0))
		kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
1952
	return 0;
1953 1954
}

1955 1956 1957 1958 1959 1960 1961 1962
/*
 * kvmclock updates which are isolated to a given vcpu, such as
 * vcpu->cpu migration, should not allow system_timestamp from
 * the rest of the vcpus to remain static. Otherwise ntp frequency
 * correction applies to one vcpu's system_timestamp but not
 * the others.
 *
 * So in those cases, request a kvmclock update for all vcpus.
1963 1964 1965 1966
 * We need to rate-limit these requests though, as they can
 * considerably slow guests that have a large number of vcpus.
 * The time for a remote vcpu to update its kvmclock is bound
 * by the delay we use to rate-limit the updates.
1967 1968
 */

1969 1970 1971
#define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)

static void kvmclock_update_fn(struct work_struct *work)
1972 1973
{
	int i;
1974 1975 1976 1977
	struct delayed_work *dwork = to_delayed_work(work);
	struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
					   kvmclock_update_work);
	struct kvm *kvm = container_of(ka, struct kvm, arch);
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	struct kvm_vcpu *vcpu;

	kvm_for_each_vcpu(i, vcpu, kvm) {
1981
		kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1982 1983 1984 1985
		kvm_vcpu_kick(vcpu);
	}
}

1986 1987 1988 1989
static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
{
	struct kvm *kvm = v->kvm;

1990
	kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1991 1992 1993 1994
	schedule_delayed_work(&kvm->arch.kvmclock_update_work,
					KVMCLOCK_UPDATE_DELAY);
}

1995 1996 1997 1998 1999 2000 2001 2002 2003
#define KVMCLOCK_SYNC_PERIOD (300 * HZ)

static void kvmclock_sync_fn(struct work_struct *work)
{
	struct delayed_work *dwork = to_delayed_work(work);
	struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
					   kvmclock_sync_work);
	struct kvm *kvm = container_of(ka, struct kvm, arch);

2004 2005 2006
	if (!kvmclock_periodic_sync)
		return;

2007 2008 2009 2010 2011
	schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
	schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
					KVMCLOCK_SYNC_PERIOD);
}

Huang Ying's avatar
Huang Ying committed
2012
static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
2013
{
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Huang Ying committed
2014 2015 2016
	u64 mcg_cap = vcpu->arch.mcg_cap;
	unsigned bank_num = mcg_cap & 0xff;

2017 2018
	switch (msr) {
	case MSR_IA32_MCG_STATUS:
Huang Ying's avatar
Huang Ying committed
2019
		vcpu->arch.mcg_status = data;
2020
		break;
2021
	case MSR_IA32_MCG_CTL:
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Huang Ying committed
2022 2023 2024 2025 2026 2027 2028 2029
		if (!(mcg_cap & MCG_CTL_P))
			return 1;
		if (data != 0 && data != ~(u64)0)
			return -1;
		vcpu->arch.mcg_ctl = data;
		break;
	default:
		if (msr >= MSR_IA32_MC0_CTL &&
2030
		    msr < MSR_IA32_MCx_CTL(bank_num)) {
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Huang Ying committed
2031
			u32 offset = msr - MSR_IA32_MC0_CTL;
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			/* only 0 or all 1s can be written to IA32_MCi_CTL
			 * some Linux kernels though clear bit 10 in bank 4 to
			 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
			 * this to avoid an uncatched #GP in the guest
			 */
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Huang Ying committed
2037
			if ((offset & 0x3) == 0 &&
2038
			    data != 0 && (data | (1 << 10)) != ~(u64)0)
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Huang Ying committed
2039 2040 2041 2042 2043 2044 2045 2046 2047
				return -1;
			vcpu->arch.mce_banks[offset] = data;
			break;
		}
		return 1;
	}
	return 0;
}

Ed Swierk's avatar
Ed Swierk committed
2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064
static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
{
	struct kvm *kvm = vcpu->kvm;
	int lm = is_long_mode(vcpu);
	u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
		: (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
	u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
		: kvm->arch.xen_hvm_config.blob_size_32;
	u32 page_num = data & ~PAGE_MASK;
	u64 page_addr = data & PAGE_MASK;
	u8 *page;
	int r;

	r = -E2BIG;
	if (page_num >= blob_size)
		goto out;
	r = -ENOMEM;
2065 2066 2067
	page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
	if (IS_ERR(page)) {
		r = PTR_ERR(page);
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2068
		goto out;
2069
	}
2070
	if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
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		goto out_free;
	r = 0;
out_free:
	kfree(page);
out:
	return r;
}

2079 2080 2081 2082
static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
{
	gpa_t gpa = data & ~0x3f;

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Guo Chao committed
2083
	/* Bits 2:5 are reserved, Should be zero */
2084
	if (data & 0x3c)
2085 2086 2087 2088 2089 2090 2091 2092 2093 2094
		return 1;

	vcpu->arch.apf.msr_val = data;

	if (!(data & KVM_ASYNC_PF_ENABLED)) {
		kvm_clear_async_pf_completion_queue(vcpu);
		kvm_async_pf_hash_reset(vcpu);
		return 0;
	}

2095
	if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2096
					sizeof(u32)))
2097 2098
		return 1;

2099
	vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2100 2101 2102 2103
	kvm_async_pf_wakeup_all(vcpu);
	return 0;
}

2104 2105
static void kvmclock_reset(struct kvm_vcpu *vcpu)
{
2106
	vcpu->arch.pv_time_enabled = false;
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}

2109 2110 2111 2112 2113
static void record_steal_time(struct kvm_vcpu *vcpu)
{
	if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
		return;

2114
	if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
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		&vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
		return;

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	vcpu->arch.st.steal.preempted = 0;

2120 2121 2122 2123 2124
	if (vcpu->arch.st.steal.version & 1)
		vcpu->arch.st.steal.version += 1;  /* first time write, random junk */

	vcpu->arch.st.steal.version += 1;

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	kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
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		&vcpu->arch.st.steal, sizeof(struct kvm_steal_time));

	smp_wmb();

2130 2131 2132
	vcpu->arch.st.steal.steal += current->sched_info.run_delay -
		vcpu->arch.st.last_steal;
	vcpu->arch.st.last_steal = current->sched_info.run_delay;
2133

2134
	kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2135 2136 2137 2138 2139
		&vcpu->arch.st.steal, sizeof(struct kvm_steal_time));

	smp_wmb();

	vcpu->arch.st.steal.version += 1;
2140

2141
	kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2142 2143 2144
		&vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
}

2145
int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2146
{
2147
	bool pr = false;
2148 2149
	u32 msr = msr_info->index;
	u64 data = msr_info->data;
2150

2151
	switch (msr) {
2152 2153 2154 2155 2156 2157 2158 2159
	case MSR_AMD64_NB_CFG:
	case MSR_IA32_UCODE_REV:
	case MSR_IA32_UCODE_WRITE:
	case MSR_VM_HSAVE_PA:
	case MSR_AMD64_PATCH_LOADER:
	case MSR_AMD64_BU_CFG2:
		break;

2160
	case MSR_EFER:
2161
		return set_efer(vcpu, data);
2162 2163
	case MSR_K7_HWCR:
		data &= ~(u64)0x40;	/* ignore flush filter disable */
2164
		data &= ~(u64)0x100;	/* ignore ignne emulation enable */
2165
		data &= ~(u64)0x8;	/* ignore TLB cache disable */
2166
		data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2167
		if (data != 0) {
2168 2169
			vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
				    data);
2170 2171
			return 1;
		}
2172
		break;
2173 2174
	case MSR_FAM10H_MMIO_CONF_BASE:
		if (data != 0) {
2175 2176
			vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
				    "0x%llx\n", data);
2177 2178
			return 1;
		}
2179
		break;
2180 2181 2182 2183 2184 2185 2186 2187 2188
	case MSR_IA32_DEBUGCTLMSR:
		if (!data) {
			/* We support the non-activated case already */
			break;
		} else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
			/* Values other than LBR and BTF are vendor-specific,
			   thus reserved and should throw a #GP */
			return 1;
		}
2189 2190
		vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
			    __func__, data);
2191
		break;
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2192
	case 0x200 ... 0x2ff:
2193
		return kvm_mtrr_set_msr(vcpu, msr, data);
2194
	case MSR_IA32_APICBASE:
2195
		return kvm_set_apic_base(vcpu, msr_info);
2196 2197
	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
		return kvm_x2apic_msr_write(vcpu, msr, data);
2198 2199 2200
	case MSR_IA32_TSCDEADLINE:
		kvm_set_lapic_tscdeadline_msr(vcpu, data);
		break;
2201 2202 2203
	case MSR_IA32_TSC_ADJUST:
		if (guest_cpuid_has_tsc_adjust(vcpu)) {
			if (!msr_info->host_initiated) {
2204
				s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2205
				adjust_tsc_offset_guest(vcpu, adj);
2206 2207 2208 2209
			}
			vcpu->arch.ia32_tsc_adjust_msr = data;
		}
		break;
2210
	case MSR_IA32_MISC_ENABLE:
2211
		vcpu->arch.ia32_misc_enable_msr = data;
2212
		break;
2213 2214 2215 2216 2217
	case MSR_IA32_SMBASE:
		if (!msr_info->host_initiated)
			return 1;
		vcpu->arch.smbase = data;
		break;
2218
	case MSR_KVM_WALL_CLOCK_NEW:
2219 2220 2221 2222
	case MSR_KVM_WALL_CLOCK:
		vcpu->kvm->arch.wall_clock = data;
		kvm_write_wall_clock(vcpu->kvm, data);
		break;
2223
	case MSR_KVM_SYSTEM_TIME_NEW:
2224
	case MSR_KVM_SYSTEM_TIME: {
2225 2226
		struct kvm_arch *ka = &vcpu->kvm->arch;

2227
		kvmclock_reset(vcpu);
2228

2229 2230 2231 2232 2233 2234 2235 2236 2237 2238
		if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
			bool tmp = (msr == MSR_KVM_SYSTEM_TIME);

			if (ka->boot_vcpu_runs_old_kvmclock != tmp)
				set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
					&vcpu->requests);

			ka->boot_vcpu_runs_old_kvmclock = tmp;
		}

2239
		vcpu->arch.time = data;
2240
		kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2241 2242 2243 2244 2245

		/* we verify if the enable bit is set... */
		if (!(data & 1))
			break;

2246
		if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2247 2248
		     &vcpu->arch.pv_time, data & ~1ULL,
		     sizeof(struct pvclock_vcpu_time_info)))
2249 2250 2251
			vcpu->arch.pv_time_enabled = false;
		else
			vcpu->arch.pv_time_enabled = true;
2252

2253 2254
		break;
	}
2255 2256 2257 2258
	case MSR_KVM_ASYNC_PF_EN:
		if (kvm_pv_enable_async_pf(vcpu, data))
			return 1;
		break;
2259 2260 2261 2262 2263 2264 2265 2266
	case MSR_KVM_STEAL_TIME:

		if (unlikely(!sched_info_on()))
			return 1;

		if (data & KVM_STEAL_RESERVED_MASK)
			return 1;

2267
		if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2268 2269
						data & KVM_STEAL_VALID_BITS,
						sizeof(struct kvm_steal_time)))
2270 2271 2272 2273 2274 2275 2276 2277 2278 2279
			return 1;

		vcpu->arch.st.msr_val = data;

		if (!(data & KVM_MSR_ENABLED))
			break;

		kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);

		break;
2280 2281 2282 2283
	case MSR_KVM_PV_EOI_EN:
		if (kvm_lapic_enable_pv_eoi(vcpu, data))
			return 1;
		break;
2284

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2285 2286
	case MSR_IA32_MCG_CTL:
	case MSR_IA32_MCG_STATUS:
2287
	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
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2288
		return set_msr_mce(vcpu, msr, data);
2289

2290 2291 2292 2293 2294
	case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
	case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
		pr = true; /* fall through */
	case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
	case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2295
		if (kvm_pmu_is_valid_msr(vcpu, msr))
2296
			return kvm_pmu_set_msr(vcpu, msr_info);
2297 2298

		if (pr || data != 0)
2299 2300
			vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
				    "0x%x data 0x%llx\n", msr, data);
2301
		break;
2302 2303 2304 2305 2306
	case MSR_K7_CLK_CTL:
		/*
		 * Ignore all writes to this no longer documented MSR.
		 * Writes are only relevant for old K7 processors,
		 * all pre-dating SVM, but a recommended workaround from
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Guo Chao committed
2307
		 * AMD for these chips. It is possible to specify the
2308 2309 2310 2311
		 * affected processor models on the command line, hence
		 * the need to ignore the workaround.
		 */
		break;
2312
	case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2313 2314
	case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
	case HV_X64_MSR_CRASH_CTL:
2315
	case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2316 2317
		return kvm_hv_set_msr_common(vcpu, msr, data,
					     msr_info->host_initiated);
2318 2319 2320 2321
	case MSR_IA32_BBL_CR_CTL3:
		/* Drop writes to this legacy MSR -- see rdmsr
		 * counterpart for further detail.
		 */
2322
		vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n", msr, data);
2323
		break;
2324 2325 2326 2327 2328 2329 2330 2331 2332 2333
	case MSR_AMD64_OSVW_ID_LENGTH:
		if (!guest_cpuid_has_osvw(vcpu))
			return 1;
		vcpu->arch.osvw.length = data;
		break;
	case MSR_AMD64_OSVW_STATUS:
		if (!guest_cpuid_has_osvw(vcpu))
			return 1;
		vcpu->arch.osvw.status = data;
		break;
2334
	default:
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Ed Swierk committed
2335 2336
		if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
			return xen_hvm_config(vcpu, data);
2337
		if (kvm_pmu_is_valid_msr(vcpu, msr))
2338
			return kvm_pmu_set_msr(vcpu, msr_info);
2339
		if (!ignore_msrs) {
2340
			vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2341
				    msr, data);
2342 2343
			return 1;
		} else {
2344
			vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2345
				    msr, data);
2346 2347
			break;
		}
2348 2349 2350 2351 2352 2353 2354 2355 2356 2357 2358
	}
	return 0;
}
EXPORT_SYMBOL_GPL(kvm_set_msr_common);


/*
 * Reads an msr value (of 'msr_index') into 'pdata'.
 * Returns 0 on success, non-0 otherwise.
 * Assumes vcpu_load() was already called.
 */
2359
int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2360
{
2361
	return kvm_x86_ops->get_msr(vcpu, msr);
2362
}
2363
EXPORT_SYMBOL_GPL(kvm_get_msr);
2364

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2365
static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2366 2367
{
	u64 data;
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Huang Ying committed
2368 2369
	u64 mcg_cap = vcpu->arch.mcg_cap;
	unsigned bank_num = mcg_cap & 0xff;
2370 2371 2372 2373

	switch (msr) {
	case MSR_IA32_P5_MC_ADDR:
	case MSR_IA32_P5_MC_TYPE:
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2374 2375
		data = 0;
		break;
2376
	case MSR_IA32_MCG_CAP:
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2377 2378
		data = vcpu->arch.mcg_cap;
		break;
2379
	case MSR_IA32_MCG_CTL:
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2380 2381 2382 2383 2384 2385 2386 2387 2388
		if (!(mcg_cap & MCG_CTL_P))
			return 1;
		data = vcpu->arch.mcg_ctl;
		break;
	case MSR_IA32_MCG_STATUS:
		data = vcpu->arch.mcg_status;
		break;
	default:
		if (msr >= MSR_IA32_MC0_CTL &&
2389
		    msr < MSR_IA32_MCx_CTL(bank_num)) {
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2390 2391 2392 2393 2394 2395 2396 2397 2398 2399
			u32 offset = msr - MSR_IA32_MC0_CTL;
			data = vcpu->arch.mce_banks[offset];
			break;
		}
		return 1;
	}
	*pdata = data;
	return 0;
}

2400
int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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Huang Ying committed
2401
{
2402
	switch (msr_info->index) {
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2403
	case MSR_IA32_PLATFORM_ID:
2404
	case MSR_IA32_EBL_CR_POWERON:
2405 2406 2407 2408 2409
	case MSR_IA32_DEBUGCTLMSR:
	case MSR_IA32_LASTBRANCHFROMIP:
	case MSR_IA32_LASTBRANCHTOIP:
	case MSR_IA32_LASTINTFROMIP:
	case MSR_IA32_LASTINTTOIP:
2410
	case MSR_K8_SYSCFG:
2411 2412
	case MSR_K8_TSEG_ADDR:
	case MSR_K8_TSEG_MASK:
2413
	case MSR_K7_HWCR:
2414
	case MSR_VM_HSAVE_PA:
2415
	case MSR_K8_INT_PENDING_MSG:
2416
	case MSR_AMD64_NB_CFG:
2417
	case MSR_FAM10H_MMIO_CONF_BASE:
2418
	case MSR_AMD64_BU_CFG2:
2419
	case MSR_IA32_PERF_CTL:
2420
		msr_info->data = 0;
2421
		break;
2422 2423 2424 2425
	case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
	case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
	case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
	case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2426
		if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2427 2428
			return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
		msr_info->data = 0;
2429
		break;
2430
	case MSR_IA32_UCODE_REV:
2431
		msr_info->data = 0x100000000ULL;
2432
		break;
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Avi Kivity committed
2433 2434
	case MSR_MTRRcap:
	case 0x200 ... 0x2ff:
2435
		return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2436
	case 0xcd: /* fsb frequency */
2437
		msr_info->data = 3;
2438
		break;
2439 2440 2441 2442 2443 2444 2445 2446 2447 2448 2449 2450
		/*
		 * MSR_EBC_FREQUENCY_ID
		 * Conservative value valid for even the basic CPU models.
		 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
		 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
		 * and 266MHz for model 3, or 4. Set Core Clock
		 * Frequency to System Bus Frequency Ratio to 1 (bits
		 * 31:24) even though these are only valid for CPU
		 * models > 2, however guests may end up dividing or
		 * multiplying by zero otherwise.
		 */
	case MSR_EBC_FREQUENCY_ID:
2451
		msr_info->data = 1 << 24;
2452
		break;
2453
	case MSR_IA32_APICBASE:
2454
		msr_info->data = kvm_get_apic_base(vcpu);
2455
		break;
2456
	case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2457
		return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2458
		break;
2459
	case MSR_IA32_TSCDEADLINE:
2460
		msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2461
		break;
2462
	case MSR_IA32_TSC_ADJUST:
2463
		msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2464
		break;
2465
	case MSR_IA32_MISC_ENABLE:
2466
		msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2467
		break;
2468 2469 2470 2471
	case MSR_IA32_SMBASE:
		if (!msr_info->host_initiated)
			return 1;
		msr_info->data = vcpu->arch.smbase;
2472
		break;
2473 2474
	case MSR_IA32_PERF_STATUS:
		/* TSC increment by tick */
2475
		msr_info->data = 1000ULL;
2476
		/* CPU multiplier */
2477
		msr_info->data |= (((uint64_t)4ULL) << 40);
2478
		break;
2479
	case MSR_EFER:
2480
		msr_info->data = vcpu->arch.efer;
2481
		break;
2482
	case MSR_KVM_WALL_CLOCK:
2483
	case MSR_KVM_WALL_CLOCK_NEW:
2484
		msr_info->data = vcpu->kvm->arch.wall_clock;
2485 2486
		break;
	case MSR_KVM_SYSTEM_TIME:
2487
	case MSR_KVM_SYSTEM_TIME_NEW:
2488
		msr_info->data = vcpu->arch.time;
2489
		break;
2490
	case MSR_KVM_ASYNC_PF_EN:
2491
		msr_info->data = vcpu->arch.apf.msr_val;
2492
		break;
2493
	case MSR_KVM_STEAL_TIME:
2494
		msr_info->data = vcpu->arch.st.msr_val;
2495
		break;
2496
	case MSR_KVM_PV_EOI_EN:
2497
		msr_info->data = vcpu->arch.pv_eoi.msr_val;
2498
		break;
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2499 2500 2501 2502 2503
	case MSR_IA32_P5_MC_ADDR:
	case MSR_IA32_P5_MC_TYPE:
	case MSR_IA32_MCG_CAP:
	case MSR_IA32_MCG_CTL:
	case MSR_IA32_MCG_STATUS:
2504
	case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2505
		return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2506 2507 2508 2509 2510 2511 2512 2513 2514 2515
	case MSR_K7_CLK_CTL:
		/*
		 * Provide expected ramp-up count for K7. All other
		 * are set to zero, indicating minimum divisors for
		 * every field.
		 *
		 * This prevents guest kernels on AMD host with CPU
		 * type 6, model 8 and higher from exploding due to
		 * the rdmsr failing.
		 */
2516
		msr_info->data = 0x20000000;
2517
		break;
2518
	case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2519 2520
	case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
	case HV_X64_MSR_CRASH_CTL:
2521
	case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2522 2523
		return kvm_hv_get_msr_common(vcpu,
					     msr_info->index, &msr_info->data);
2524
		break;
2525 2526 2527 2528 2529 2530 2531 2532 2533 2534 2535
	case MSR_IA32_BBL_CR_CTL3:
		/* This legacy MSR exists but isn't fully documented in current
		 * silicon.  It is however accessed by winxp in very narrow
		 * scenarios where it sets bit #19, itself documented as
		 * a "reserved" bit.  Best effort attempt to source coherent
		 * read data here should the balance of the register be
		 * interpreted by the guest:
		 *
		 * L2 cache control register 3: 64GB range, 256KB size,
		 * enabled, latency 0x1, configured
		 */
2536
		msr_info->data = 0xbe702111;
2537
		break;
2538 2539 2540
	case MSR_AMD64_OSVW_ID_LENGTH:
		if (!guest_cpuid_has_osvw(vcpu))
			return 1;
2541
		msr_info->data = vcpu->arch.osvw.length;
2542 2543 2544 2545
		break;
	case MSR_AMD64_OSVW_STATUS:
		if (!guest_cpuid_has_osvw(vcpu))
			return 1;
2546
		msr_info->data = vcpu->arch.osvw.status;
2547
		break;
2548
	default:
2549
		if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2550
			return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2551
		if (!ignore_msrs) {
2552 2553
			vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
					       msr_info->index);
2554 2555
			return 1;
		} else {
2556 2557
			vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
			msr_info->data = 0;
2558 2559
		}
		break;
2560 2561 2562 2563 2564
	}
	return 0;
}
EXPORT_SYMBOL_GPL(kvm_get_msr_common);

2565 2566 2567 2568 2569 2570 2571 2572 2573 2574
/*
 * Read or write a bunch of msrs. All parameters are kernel addresses.
 *
 * @return number of msrs set successfully.
 */
static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
		    struct kvm_msr_entry *entries,
		    int (*do_msr)(struct kvm_vcpu *vcpu,
				  unsigned index, u64 *data))
{
2575
	int i, idx;
2576

2577
	idx = srcu_read_lock(&vcpu->kvm->srcu);
2578 2579 2580
	for (i = 0; i < msrs->nmsrs; ++i)
		if (do_msr(vcpu, entries[i].index, &entries[i].data))
			break;
2581
	srcu_read_unlock(&vcpu->kvm->srcu, idx);
2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592 2593 2594 2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609

	return i;
}

/*
 * Read or write a bunch of msrs. Parameters are user addresses.
 *
 * @return number of msrs set successfully.
 */
static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
		  int (*do_msr)(struct kvm_vcpu *vcpu,
				unsigned index, u64 *data),
		  int writeback)
{
	struct kvm_msrs msrs;
	struct kvm_msr_entry *entries;
	int r, n;
	unsigned size;

	r = -EFAULT;
	if (copy_from_user(&msrs, user_msrs, sizeof msrs))
		goto out;

	r = -E2BIG;
	if (msrs.nmsrs >= MAX_IO_MSRS)
		goto out;

	size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2610 2611 2612
	entries = memdup_user(user_msrs->entries, size);
	if (IS_ERR(entries)) {
		r = PTR_ERR(entries);
2613
		goto out;
2614
	}
2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626

	r = n = __msr_io(vcpu, &msrs, entries, do_msr);
	if (r < 0)
		goto out_free;

	r = -EFAULT;
	if (writeback && copy_to_user(user_msrs->entries, entries, size))
		goto out_free;

	r = n;

out_free:
2627
	kfree(entries);
2628 2629 2630 2631
out:
	return r;
}

2632
int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2633 2634 2635 2636 2637 2638 2639 2640
{
	int r;

	switch (ext) {
	case KVM_CAP_IRQCHIP:
	case KVM_CAP_HLT:
	case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
	case KVM_CAP_SET_TSS_ADDR:
2641
	case KVM_CAP_EXT_CPUID:
2642
	case KVM_CAP_EXT_EMUL_CPUID:
2643
	case KVM_CAP_CLOCKSOURCE:
Sheng Yang's avatar
Sheng Yang committed
2644
	case KVM_CAP_PIT:
2645
	case KVM_CAP_NOP_IO_DELAY:
2646
	case KVM_CAP_MP_STATE:
2647
	case KVM_CAP_SYNC_MMU:
2648
	case KVM_CAP_USER_NMI:
2649
	case KVM_CAP_REINJECT_CONTROL:
2650
	case KVM_CAP_IRQ_INJECT_STATUS:
Gregory Haskins's avatar
Gregory Haskins committed
2651
	case KVM_CAP_IOEVENTFD:
2652
	case KVM_CAP_IOEVENTFD_NO_LENGTH:
2653
	case KVM_CAP_PIT2:
2654
	case KVM_CAP_PIT_STATE2:
2655
	case KVM_CAP_SET_IDENTITY_MAP_ADDR:
Ed Swierk's avatar
Ed Swierk committed
2656
	case KVM_CAP_XEN_HVM:
2657
	case KVM_CAP_VCPU_EVENTS:
2658
	case KVM_CAP_HYPERV:
2659
	case KVM_CAP_HYPERV_VAPIC:
2660
	case KVM_CAP_HYPERV_SPIN:
2661
	case KVM_CAP_HYPERV_SYNIC:
2662
	case KVM_CAP_PCI_SEGMENT:
2663
	case KVM_CAP_DEBUGREGS:
2664
	case KVM_CAP_X86_ROBUST_SINGLESTEP:
2665
	case KVM_CAP_XSAVE:
2666
	case KVM_CAP_ASYNC_PF:
2667
	case KVM_CAP_GET_TSC_KHZ:
2668
	case KVM_CAP_KVMCLOCK_CTRL:
2669
	case KVM_CAP_READONLY_MEM:
2670
	case KVM_CAP_HYPERV_TIME:
2671
	case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2672
	case KVM_CAP_TSC_DEADLINE_TIMER:
2673 2674
	case KVM_CAP_ENABLE_CAP_VM:
	case KVM_CAP_DISABLE_QUIRKS:
2675
	case KVM_CAP_SET_BOOT_CPU_ID:
2676
 	case KVM_CAP_SPLIT_IRQCHIP:
2677
	case KVM_CAP_IMMEDIATE_EXIT:
2678 2679 2680 2681
#ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
	case KVM_CAP_ASSIGN_DEV_IRQ:
	case KVM_CAP_PCI_2_3:
#endif
2682 2683
		r = 1;
		break;
2684 2685 2686
	case KVM_CAP_ADJUST_CLOCK:
		r = KVM_CLOCK_TSC_STABLE;
		break;
2687 2688 2689 2690 2691 2692 2693 2694 2695 2696 2697
	case KVM_CAP_X86_SMM:
		/* SMBASE is usually relocated above 1M on modern chipsets,
		 * and SMM handlers might indeed rely on 4G segment limits,
		 * so do not report SMM to be available if real mode is
		 * emulated via vm86 mode.  Still, do not go to great lengths
		 * to avoid userspace's usage of the feature, because it is a
		 * fringe case that is not enabled except via specific settings
		 * of the module parameters.
		 */
		r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
		break;
2698 2699 2700
	case KVM_CAP_COALESCED_MMIO:
		r = KVM_COALESCED_MMIO_PAGE_OFFSET;
		break;
2701 2702 2703
	case KVM_CAP_VAPIC:
		r = !kvm_x86_ops->cpu_has_accelerated_tpr();
		break;
2704
	case KVM_CAP_NR_VCPUS:
2705 2706 2707
		r = KVM_SOFT_MAX_VCPUS;
		break;
	case KVM_CAP_MAX_VCPUS:
2708 2709
		r = KVM_MAX_VCPUS;
		break;
2710
	case KVM_CAP_NR_MEMSLOTS:
2711
		r = KVM_USER_MEM_SLOTS;
2712
		break;
2713 2714
	case KVM_CAP_PV_MMU:	/* obsolete */
		r = 0;
2715
		break;
2716
#ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2717
	case KVM_CAP_IOMMU:
2718
		r = iommu_present(&pci_bus_type);
2719
		break;
2720
#endif
Huang Ying's avatar
Huang Ying committed
2721 2722 2723
	case KVM_CAP_MCE:
		r = KVM_MAX_MCE_BANKS;
		break;
2724
	case KVM_CAP_XCRS:
2725
		r = boot_cpu_has(X86_FEATURE_XSAVE);
2726
		break;
2727 2728 2729
	case KVM_CAP_TSC_CONTROL:
		r = kvm_has_tsc_control;
		break;
2730 2731 2732
	case KVM_CAP_X2APIC_API:
		r = KVM_X2APIC_API_VALID_FLAGS;
		break;
2733 2734 2735 2736 2737 2738 2739 2740
	default:
		r = 0;
		break;
	}
	return r;

}

2741 2742 2743 2744 2745 2746 2747 2748 2749 2750 2751 2752 2753 2754 2755 2756
long kvm_arch_dev_ioctl(struct file *filp,
			unsigned int ioctl, unsigned long arg)
{
	void __user *argp = (void __user *)arg;
	long r;

	switch (ioctl) {
	case KVM_GET_MSR_INDEX_LIST: {
		struct kvm_msr_list __user *user_msr_list = argp;
		struct kvm_msr_list msr_list;
		unsigned n;

		r = -EFAULT;
		if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
			goto out;
		n = msr_list.nmsrs;
2757
		msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2758 2759 2760
		if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
			goto out;
		r = -E2BIG;
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Jan Kiszka committed
2761
		if (n < msr_list.nmsrs)
2762 2763 2764 2765 2766
			goto out;
		r = -EFAULT;
		if (copy_to_user(user_msr_list->indices, &msrs_to_save,
				 num_msrs_to_save * sizeof(u32)))
			goto out;
Jan Kiszka's avatar
Jan Kiszka committed
2767
		if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2768
				 &emulated_msrs,
2769
				 num_emulated_msrs * sizeof(u32)))
2770 2771 2772 2773
			goto out;
		r = 0;
		break;
	}
2774 2775
	case KVM_GET_SUPPORTED_CPUID:
	case KVM_GET_EMULATED_CPUID: {
2776 2777 2778 2779 2780 2781
		struct kvm_cpuid2 __user *cpuid_arg = argp;
		struct kvm_cpuid2 cpuid;

		r = -EFAULT;
		if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
			goto out;
2782 2783 2784

		r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
					    ioctl);
2785 2786 2787 2788 2789 2790 2791 2792 2793
		if (r)
			goto out;

		r = -EFAULT;
		if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
			goto out;
		r = 0;
		break;
	}
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Huang Ying committed
2794 2795
	case KVM_X86_GET_MCE_CAP_SUPPORTED: {
		r = -EFAULT;
2796 2797
		if (copy_to_user(argp, &kvm_mce_cap_supported,
				 sizeof(kvm_mce_cap_supported)))
Huang Ying's avatar
Huang Ying committed
2798 2799 2800 2801
			goto out;
		r = 0;
		break;
	}
2802 2803 2804 2805 2806 2807 2808
	default:
		r = -EINVAL;
	}
out:
	return r;
}

2809 2810 2811 2812 2813 2814 2815
static void wbinvd_ipi(void *garbage)
{
	wbinvd();
}

static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
{
2816
	return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2817 2818
}

2819 2820 2821 2822 2823
static inline void kvm_migrate_timers(struct kvm_vcpu *vcpu)
{
	set_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests);
}

2824 2825
void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
{
2826 2827 2828 2829 2830 2831 2832 2833 2834
	/* Address WBINVD may be executed by guest */
	if (need_emulate_wbinvd(vcpu)) {
		if (kvm_x86_ops->has_wbinvd_exit())
			cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
		else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
			smp_call_function_single(vcpu->cpu,
					wbinvd_ipi, NULL, 1);
	}

2835
	kvm_x86_ops->vcpu_load(vcpu, cpu);
2836

2837 2838 2839 2840
	/* Apply any externally detected TSC adjustments (due to suspend) */
	if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
		adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
		vcpu->arch.tsc_offset_adjustment = 0;
2841
		kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2842
	}
2843

2844
	if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2845
		s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2846
				rdtsc() - vcpu->arch.last_host_tsc;
Zachary Amsden's avatar
Zachary Amsden committed
2847 2848
		if (tsc_delta < 0)
			mark_tsc_unstable("KVM discovered backwards TSC");
2849

Zachary Amsden's avatar
Zachary Amsden committed
2850
		if (check_tsc_unstable()) {
2851
			u64 offset = kvm_compute_tsc_offset(vcpu,
2852
						vcpu->arch.last_guest_tsc);
2853
			kvm_vcpu_write_tsc_offset(vcpu, offset);
Zachary Amsden's avatar
Zachary Amsden committed
2854 2855
			vcpu->arch.tsc_catchup = 1;
		}
2856 2857
		if (kvm_lapic_hv_timer_in_use(vcpu) &&
				kvm_x86_ops->set_hv_timer(vcpu,
2858
					kvm_get_lapic_target_expiration_tsc(vcpu)))
2859
			kvm_lapic_switch_to_sw_timer(vcpu);
2860 2861 2862 2863 2864
		/*
		 * On a host with synchronized TSC, there is no need to update
		 * kvmclock on vcpu->cpu migration
		 */
		if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2865
			kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
Zachary Amsden's avatar
Zachary Amsden committed
2866 2867
		if (vcpu->cpu != cpu)
			kvm_migrate_timers(vcpu);
Zachary Amsden's avatar
Zachary Amsden committed
2868
		vcpu->cpu = cpu;
2869
	}
2870 2871

	kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2872 2873
}

2874 2875 2876 2877 2878 2879 2880
static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
{
	if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
		return;

	vcpu->arch.st.steal.preempted = 1;

2881
	kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
2882 2883 2884 2885 2886
			&vcpu->arch.st.steal.preempted,
			offsetof(struct kvm_steal_time, preempted),
			sizeof(vcpu->arch.st.steal.preempted));
}

2887 2888
void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
{
2889
	int idx;
2890 2891 2892 2893 2894 2895 2896 2897 2898
	/*
	 * Disable page faults because we're in atomic context here.
	 * kvm_write_guest_offset_cached() would call might_fault()
	 * that relies on pagefault_disable() to tell if there's a
	 * bug. NOTE: the write to guest memory may not go through if
	 * during postcopy live migration or if there's heavy guest
	 * paging.
	 */
	pagefault_disable();
2899 2900 2901 2902 2903
	/*
	 * kvm_memslots() will be called by
	 * kvm_write_guest_offset_cached() so take the srcu lock.
	 */
	idx = srcu_read_lock(&vcpu->kvm->srcu);
2904
	kvm_steal_time_set_preempted(vcpu);
2905
	srcu_read_unlock(&vcpu->kvm->srcu, idx);
2906
	pagefault_enable();
2907
	kvm_x86_ops->vcpu_put(vcpu);
2908
	kvm_put_guest_fpu(vcpu);
2909
	vcpu->arch.last_host_tsc = rdtsc();
2910 2911 2912 2913 2914
}

static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
				    struct kvm_lapic_state *s)
{
2915
	if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
2916 2917
		kvm_x86_ops->sync_pir_to_irr(vcpu);

2918
	return kvm_apic_get_state(vcpu, s);
2919 2920 2921 2922 2923
}

static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
				    struct kvm_lapic_state *s)
{
2924 2925 2926 2927 2928
	int r;

	r = kvm_apic_set_state(vcpu, s);
	if (r)
		return r;
2929
	update_cr8_intercept(vcpu);
2930 2931 2932 2933

	return 0;
}

2934 2935 2936 2937 2938 2939
static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
{
	return (!lapic_in_kernel(vcpu) ||
		kvm_apic_accept_pic_intr(vcpu));
}

2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953
/*
 * if userspace requested an interrupt window, check that the
 * interrupt window is open.
 *
 * No need to exit to userspace if we already have an interrupt queued.
 */
static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
{
	return kvm_arch_interrupt_allowed(vcpu) &&
		!kvm_cpu_has_interrupt(vcpu) &&
		!kvm_event_needs_reinjection(vcpu) &&
		kvm_cpu_accept_dm_intr(vcpu);
}

2954 2955 2956
static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
				    struct kvm_interrupt *irq)
{
2957
	if (irq->irq >= KVM_NR_INTERRUPTS)
2958
		return -EINVAL;
2959 2960 2961 2962 2963 2964 2965 2966 2967 2968 2969 2970

	if (!irqchip_in_kernel(vcpu->kvm)) {
		kvm_queue_interrupt(vcpu, irq->irq, false);
		kvm_make_request(KVM_REQ_EVENT, vcpu);
		return 0;
	}

	/*
	 * With in-kernel LAPIC, we only use this to inject EXTINT, so
	 * fail for in-kernel 8259.
	 */
	if (pic_in_kernel(vcpu->kvm))
2971 2972
		return -ENXIO;

2973 2974
	if (vcpu->arch.pending_external_vector != -1)
		return -EEXIST;
2975

2976
	vcpu->arch.pending_external_vector = irq->irq;
2977
	kvm_make_request(KVM_REQ_EVENT, vcpu);
2978 2979 2980
	return 0;
}

2981 2982 2983 2984 2985 2986 2987
static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
{
	kvm_inject_nmi(vcpu);

	return 0;
}

2988 2989
static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
{
2990 2991
	kvm_make_request(KVM_REQ_SMI, vcpu);

2992 2993 2994
	return 0;
}

2995 2996 2997 2998 2999 3000 3001 3002 3003
static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
					   struct kvm_tpr_access_ctl *tac)
{
	if (tac->flags)
		return -EINVAL;
	vcpu->arch.tpr_access_reporting = !!tac->enabled;
	return 0;
}

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3004 3005 3006 3007 3008 3009 3010
static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
					u64 mcg_cap)
{
	int r;
	unsigned bank_num = mcg_cap & 0xff, bank;

	r = -EINVAL;
3011
	if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
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3012
		goto out;
3013
	if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
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3014 3015 3016 3017 3018 3019 3020 3021 3022
		goto out;
	r = 0;
	vcpu->arch.mcg_cap = mcg_cap;
	/* Init IA32_MCG_CTL to all 1s */
	if (mcg_cap & MCG_CTL_P)
		vcpu->arch.mcg_ctl = ~(u64)0;
	/* Init IA32_MCi_CTL to all 1s */
	for (bank = 0; bank < bank_num; bank++)
		vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3023 3024 3025

	if (kvm_x86_ops->setup_mce)
		kvm_x86_ops->setup_mce(vcpu);
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3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044 3045 3046 3047 3048 3049 3050 3051 3052 3053 3054
out:
	return r;
}

static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
				      struct kvm_x86_mce *mce)
{
	u64 mcg_cap = vcpu->arch.mcg_cap;
	unsigned bank_num = mcg_cap & 0xff;
	u64 *banks = vcpu->arch.mce_banks;

	if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
		return -EINVAL;
	/*
	 * if IA32_MCG_CTL is not all 1s, the uncorrected error
	 * reporting is disabled
	 */
	if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
	    vcpu->arch.mcg_ctl != ~(u64)0)
		return 0;
	banks += 4 * mce->bank;
	/*
	 * if IA32_MCi_CTL is not all 1s, the uncorrected error
	 * reporting is disabled for the bank
	 */
	if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
		return 0;
	if (mce->status & MCI_STATUS_UC) {
		if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3055
		    !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3056
			kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
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3057 3058 3059 3060 3061 3062 3063 3064 3065 3066 3067 3068 3069 3070 3071 3072 3073 3074 3075 3076 3077
			return 0;
		}
		if (banks[1] & MCI_STATUS_VAL)
			mce->status |= MCI_STATUS_OVER;
		banks[2] = mce->addr;
		banks[3] = mce->misc;
		vcpu->arch.mcg_status = mce->mcg_status;
		banks[1] = mce->status;
		kvm_queue_exception(vcpu, MC_VECTOR);
	} else if (!(banks[1] & MCI_STATUS_VAL)
		   || !(banks[1] & MCI_STATUS_UC)) {
		if (banks[1] & MCI_STATUS_VAL)
			mce->status |= MCI_STATUS_OVER;
		banks[2] = mce->addr;
		banks[3] = mce->misc;
		banks[1] = mce->status;
	} else
		banks[1] |= MCI_STATUS_OVER;
	return 0;
}

3078 3079 3080
static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
					       struct kvm_vcpu_events *events)
{
Avi Kivity's avatar
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3081
	process_nmi(vcpu);
3082 3083 3084
	events->exception.injected =
		vcpu->arch.exception.pending &&
		!kvm_exception_is_soft(vcpu->arch.exception.nr);
3085 3086
	events->exception.nr = vcpu->arch.exception.nr;
	events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3087
	events->exception.pad = 0;
3088 3089
	events->exception.error_code = vcpu->arch.exception.error_code;

3090 3091
	events->interrupt.injected =
		vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
3092
	events->interrupt.nr = vcpu->arch.interrupt.nr;
3093
	events->interrupt.soft = 0;
3094
	events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3095 3096

	events->nmi.injected = vcpu->arch.nmi_injected;
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3097
	events->nmi.pending = vcpu->arch.nmi_pending != 0;
3098
	events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3099
	events->nmi.pad = 0;
3100

3101
	events->sipi_vector = 0; /* never valid when reporting to user space */
3102

3103 3104 3105 3106 3107 3108
	events->smi.smm = is_smm(vcpu);
	events->smi.pending = vcpu->arch.smi_pending;
	events->smi.smm_inside_nmi =
		!!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
	events->smi.latched_init = kvm_lapic_latched_init(vcpu);

3109
	events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3110 3111
			 | KVM_VCPUEVENT_VALID_SHADOW
			 | KVM_VCPUEVENT_VALID_SMM);
3112
	memset(&events->reserved, 0, sizeof(events->reserved));
3113 3114
}

3115 3116
static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);

3117 3118 3119
static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
					      struct kvm_vcpu_events *events)
{
3120
	if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3121
			      | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3122 3123
			      | KVM_VCPUEVENT_VALID_SHADOW
			      | KVM_VCPUEVENT_VALID_SMM))
3124 3125
		return -EINVAL;

3126 3127 3128 3129
	if (events->exception.injected &&
	    (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
		return -EINVAL;

3130 3131 3132 3133 3134 3135
	/* INITs are latched while in SMM */
	if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
	    (events->smi.smm || events->smi.pending) &&
	    vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
		return -EINVAL;

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3136
	process_nmi(vcpu);
3137 3138 3139 3140 3141 3142 3143 3144
	vcpu->arch.exception.pending = events->exception.injected;
	vcpu->arch.exception.nr = events->exception.nr;
	vcpu->arch.exception.has_error_code = events->exception.has_error_code;
	vcpu->arch.exception.error_code = events->exception.error_code;

	vcpu->arch.interrupt.pending = events->interrupt.injected;
	vcpu->arch.interrupt.nr = events->interrupt.nr;
	vcpu->arch.interrupt.soft = events->interrupt.soft;
3145 3146 3147
	if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
		kvm_x86_ops->set_interrupt_shadow(vcpu,
						  events->interrupt.shadow);
3148 3149

	vcpu->arch.nmi_injected = events->nmi.injected;
3150 3151
	if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
		vcpu->arch.nmi_pending = events->nmi.pending;
3152 3153
	kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);

3154
	if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3155
	    lapic_in_kernel(vcpu))
3156
		vcpu->arch.apic->sipi_vector = events->sipi_vector;
3157

3158
	if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3159
		u32 hflags = vcpu->arch.hflags;
3160
		if (events->smi.smm)
3161
			hflags |= HF_SMM_MASK;
3162
		else
3163 3164 3165
			hflags &= ~HF_SMM_MASK;
		kvm_set_hflags(vcpu, hflags);

3166 3167 3168 3169 3170
		vcpu->arch.smi_pending = events->smi.pending;
		if (events->smi.smm_inside_nmi)
			vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
		else
			vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3171
		if (lapic_in_kernel(vcpu)) {
3172 3173 3174 3175 3176 3177 3178
			if (events->smi.latched_init)
				set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
			else
				clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
		}
	}

3179 3180
	kvm_make_request(KVM_REQ_EVENT, vcpu);

3181 3182 3183
	return 0;
}

3184 3185 3186
static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
					     struct kvm_debugregs *dbgregs)
{
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3187 3188
	unsigned long val;

3189
	memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3190
	kvm_get_dr(vcpu, 6, &val);
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3191
	dbgregs->dr6 = val;
3192 3193
	dbgregs->dr7 = vcpu->arch.dr7;
	dbgregs->flags = 0;
3194
	memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3195 3196 3197 3198 3199 3200 3201 3202
}

static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
					    struct kvm_debugregs *dbgregs)
{
	if (dbgregs->flags)
		return -EINVAL;

3203 3204 3205 3206 3207
	if (dbgregs->dr6 & ~0xffffffffull)
		return -EINVAL;
	if (dbgregs->dr7 & ~0xffffffffull)
		return -EINVAL;

3208
	memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3209
	kvm_update_dr0123(vcpu);
3210
	vcpu->arch.dr6 = dbgregs->dr6;
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3211
	kvm_update_dr6(vcpu);
3212
	vcpu->arch.dr7 = dbgregs->dr7;
3213
	kvm_update_dr7(vcpu);
3214 3215 3216 3217

	return 0;
}

3218 3219 3220 3221
#define XSTATE_COMPACTION_ENABLED (1ULL << 63)

static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
{
3222
	struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3223
	u64 xstate_bv = xsave->header.xfeatures;
3224 3225 3226 3227 3228 3229 3230 3231 3232
	u64 valid;

	/*
	 * Copy legacy XSAVE area, to avoid complications with CPUID
	 * leaves 0 and 1 in the loop below.
	 */
	memcpy(dest, xsave, XSAVE_HDR_OFFSET);

	/* Set XSTATE_BV */
3233
	xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3234 3235 3236 3237 3238 3239
	*(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;

	/*
	 * Copy each region from the possibly compacted offset to the
	 * non-compacted offset.
	 */
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3240
	valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251 3252 3253 3254 3255 3256 3257 3258
	while (valid) {
		u64 feature = valid & -valid;
		int index = fls64(feature) - 1;
		void *src = get_xsave_addr(xsave, feature);

		if (src) {
			u32 size, offset, ecx, edx;
			cpuid_count(XSTATE_CPUID, index,
				    &size, &offset, &ecx, &edx);
			memcpy(dest + offset, src, size);
		}

		valid -= feature;
	}
}

static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
{
3259
	struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3260 3261 3262 3263 3264 3265 3266 3267 3268 3269
	u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
	u64 valid;

	/*
	 * Copy legacy XSAVE area, to avoid complications with CPUID
	 * leaves 0 and 1 in the loop below.
	 */
	memcpy(xsave, src, XSAVE_HDR_OFFSET);

	/* Set XSTATE_BV and possibly XCOMP_BV.  */
3270
	xsave->header.xfeatures = xstate_bv;
3271
	if (boot_cpu_has(X86_FEATURE_XSAVES))
3272
		xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3273 3274 3275 3276 3277

	/*
	 * Copy each region from the non-compacted offset to the
	 * possibly compacted offset.
	 */
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3278
	valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3279 3280 3281 3282 3283 3284 3285 3286 3287 3288
	while (valid) {
		u64 feature = valid & -valid;
		int index = fls64(feature) - 1;
		void *dest = get_xsave_addr(xsave, feature);

		if (dest) {
			u32 size, offset, ecx, edx;
			cpuid_count(XSTATE_CPUID, index,
				    &size, &offset, &ecx, &edx);
			memcpy(dest, src + offset, size);
3289
		}
3290 3291 3292 3293 3294

		valid -= feature;
	}
}

3295 3296 3297
static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
					 struct kvm_xsave *guest_xsave)
{
3298
	if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3299 3300
		memset(guest_xsave, 0, sizeof(struct kvm_xsave));
		fill_xsave((u8 *) guest_xsave->region, vcpu);
3301
	} else {
3302
		memcpy(guest_xsave->region,
3303
			&vcpu->arch.guest_fpu.state.fxsave,
3304
			sizeof(struct fxregs_state));
3305
		*(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
Dave Hansen's avatar
Dave Hansen committed
3306
			XFEATURE_MASK_FPSSE;
3307 3308 3309
	}
}

3310 3311
#define XSAVE_MXCSR_OFFSET 24

3312 3313 3314 3315 3316
static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
					struct kvm_xsave *guest_xsave)
{
	u64 xstate_bv =
		*(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3317
	u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3318

3319
	if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3320 3321 3322 3323 3324
		/*
		 * Here we allow setting states that are not present in
		 * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
		 * with old userspace.
		 */
3325 3326
		if (xstate_bv & ~kvm_supported_xcr0() ||
			mxcsr & ~mxcsr_feature_mask)
3327
			return -EINVAL;
3328
		load_xsave(vcpu, (u8 *)guest_xsave->region);
3329
	} else {
3330 3331
		if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
			mxcsr & ~mxcsr_feature_mask)
3332
			return -EINVAL;
3333
		memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3334
			guest_xsave->region, sizeof(struct fxregs_state));
3335 3336 3337 3338 3339 3340 3341
	}
	return 0;
}

static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
					struct kvm_xcrs *guest_xcrs)
{
3342
	if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3343 3344 3345 3346 3347 3348 3349 3350 3351 3352 3353 3354 3355 3356 3357
		guest_xcrs->nr_xcrs = 0;
		return;
	}

	guest_xcrs->nr_xcrs = 1;
	guest_xcrs->flags = 0;
	guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
	guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
}

static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
				       struct kvm_xcrs *guest_xcrs)
{
	int i, r = 0;

3358
	if (!boot_cpu_has(X86_FEATURE_XSAVE))
3359 3360 3361 3362 3363 3364 3365
		return -EINVAL;

	if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
		return -EINVAL;

	for (i = 0; i < guest_xcrs->nr_xcrs; i++)
		/* Only support XCR0 currently */
3366
		if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3367
			r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3368
				guest_xcrs->xcrs[i].value);
3369 3370 3371 3372 3373 3374 3375
			break;
		}
	if (r)
		r = -EINVAL;
	return r;
}

3376 3377 3378 3379 3380 3381 3382 3383
/*
 * kvm_set_guest_paused() indicates to the guest kernel that it has been
 * stopped by the hypervisor.  This function will be called from the host only.
 * EINVAL is returned when the host attempts to set the flag for a guest that
 * does not support pv clocks.
 */
static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
{
3384
	if (!vcpu->arch.pv_time_enabled)
3385
		return -EINVAL;
3386
	vcpu->arch.pvclock_set_guest_stopped_request = true;
3387 3388 3389 3390
	kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
	return 0;
}

3391 3392 3393 3394 3395 3396 3397 3398
static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
				     struct kvm_enable_cap *cap)
{
	if (cap->flags)
		return -EINVAL;

	switch (cap->cap) {
	case KVM_CAP_HYPERV_SYNIC:
3399 3400
		if (!irqchip_in_kernel(vcpu->kvm))
			return -EINVAL;
3401 3402 3403 3404 3405 3406
		return kvm_hv_activate_synic(vcpu);
	default:
		return -EINVAL;
	}
}

3407 3408 3409 3410 3411 3412
long kvm_arch_vcpu_ioctl(struct file *filp,
			 unsigned int ioctl, unsigned long arg)
{
	struct kvm_vcpu *vcpu = filp->private_data;
	void __user *argp = (void __user *)arg;
	int r;
3413 3414 3415 3416 3417 3418 3419 3420
	union {
		struct kvm_lapic_state *lapic;
		struct kvm_xsave *xsave;
		struct kvm_xcrs *xcrs;
		void *buffer;
	} u;

	u.buffer = NULL;
3421 3422
	switch (ioctl) {
	case KVM_GET_LAPIC: {
3423
		r = -EINVAL;
3424
		if (!lapic_in_kernel(vcpu))
3425
			goto out;
3426
		u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3427

3428
		r = -ENOMEM;
3429
		if (!u.lapic)
3430
			goto out;
3431
		r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3432 3433 3434
		if (r)
			goto out;
		r = -EFAULT;
3435
		if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3436 3437 3438 3439 3440
			goto out;
		r = 0;
		break;
	}
	case KVM_SET_LAPIC: {
3441
		r = -EINVAL;
3442
		if (!lapic_in_kernel(vcpu))
3443
			goto out;
3444
		u.lapic = memdup_user(argp, sizeof(*u.lapic));
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Guo Chao committed
3445 3446
		if (IS_ERR(u.lapic))
			return PTR_ERR(u.lapic);
3447

3448
		r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3449 3450
		break;
	}
3451 3452 3453 3454 3455 3456 3457 3458 3459
	case KVM_INTERRUPT: {
		struct kvm_interrupt irq;

		r = -EFAULT;
		if (copy_from_user(&irq, argp, sizeof irq))
			goto out;
		r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
		break;
	}
3460 3461 3462 3463
	case KVM_NMI: {
		r = kvm_vcpu_ioctl_nmi(vcpu);
		break;
	}
3464 3465 3466 3467
	case KVM_SMI: {
		r = kvm_vcpu_ioctl_smi(vcpu);
		break;
	}
3468 3469 3470 3471 3472 3473 3474 3475 3476 3477
	case KVM_SET_CPUID: {
		struct kvm_cpuid __user *cpuid_arg = argp;
		struct kvm_cpuid cpuid;

		r = -EFAULT;
		if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
			goto out;
		r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
		break;
	}
3478 3479 3480 3481 3482 3483 3484 3485
	case KVM_SET_CPUID2: {
		struct kvm_cpuid2 __user *cpuid_arg = argp;
		struct kvm_cpuid2 cpuid;

		r = -EFAULT;
		if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
			goto out;
		r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3486
					      cpuid_arg->entries);
3487 3488 3489 3490 3491 3492 3493 3494 3495 3496
		break;
	}
	case KVM_GET_CPUID2: {
		struct kvm_cpuid2 __user *cpuid_arg = argp;
		struct kvm_cpuid2 cpuid;

		r = -EFAULT;
		if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
			goto out;
		r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3497
					      cpuid_arg->entries);
3498 3499 3500 3501 3502 3503 3504 3505
		if (r)
			goto out;
		r = -EFAULT;
		if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
			goto out;
		r = 0;
		break;
	}
3506
	case KVM_GET_MSRS:
3507
		r = msr_io(vcpu, argp, do_get_msr, 1);
3508 3509 3510 3511
		break;
	case KVM_SET_MSRS:
		r = msr_io(vcpu, argp, do_set_msr, 0);
		break;
3512 3513 3514 3515 3516 3517 3518 3519 3520 3521 3522 3523 3524 3525 3526
	case KVM_TPR_ACCESS_REPORTING: {
		struct kvm_tpr_access_ctl tac;

		r = -EFAULT;
		if (copy_from_user(&tac, argp, sizeof tac))
			goto out;
		r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
		if (r)
			goto out;
		r = -EFAULT;
		if (copy_to_user(argp, &tac, sizeof tac))
			goto out;
		r = 0;
		break;
	};
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Avi Kivity committed
3527 3528
	case KVM_SET_VAPIC_ADDR: {
		struct kvm_vapic_addr va;
3529
		int idx;
Avi Kivity's avatar
Avi Kivity committed
3530 3531

		r = -EINVAL;
3532
		if (!lapic_in_kernel(vcpu))
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Avi Kivity committed
3533 3534 3535 3536
			goto out;
		r = -EFAULT;
		if (copy_from_user(&va, argp, sizeof va))
			goto out;
3537
		idx = srcu_read_lock(&vcpu->kvm->srcu);
3538
		r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3539
		srcu_read_unlock(&vcpu->kvm->srcu, idx);
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Avi Kivity committed
3540 3541
		break;
	}
Huang Ying's avatar
Huang Ying committed
3542 3543 3544 3545 3546 3547 3548 3549 3550 3551 3552 3553 3554 3555 3556 3557 3558 3559
	case KVM_X86_SETUP_MCE: {
		u64 mcg_cap;

		r = -EFAULT;
		if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
			goto out;
		r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
		break;
	}
	case KVM_X86_SET_MCE: {
		struct kvm_x86_mce mce;

		r = -EFAULT;
		if (copy_from_user(&mce, argp, sizeof mce))
			goto out;
		r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
		break;
	}
3560 3561 3562 3563 3564 3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580
	case KVM_GET_VCPU_EVENTS: {
		struct kvm_vcpu_events events;

		kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);

		r = -EFAULT;
		if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
			break;
		r = 0;
		break;
	}
	case KVM_SET_VCPU_EVENTS: {
		struct kvm_vcpu_events events;

		r = -EFAULT;
		if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
			break;

		r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
		break;
	}
3581 3582 3583 3584 3585 3586 3587 3588 3589 3590 3591 3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603
	case KVM_GET_DEBUGREGS: {
		struct kvm_debugregs dbgregs;

		kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);

		r = -EFAULT;
		if (copy_to_user(argp, &dbgregs,
				 sizeof(struct kvm_debugregs)))
			break;
		r = 0;
		break;
	}
	case KVM_SET_DEBUGREGS: {
		struct kvm_debugregs dbgregs;

		r = -EFAULT;
		if (copy_from_user(&dbgregs, argp,
				   sizeof(struct kvm_debugregs)))
			break;

		r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
		break;
	}
3604
	case KVM_GET_XSAVE: {
3605
		u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3606
		r = -ENOMEM;
3607
		if (!u.xsave)
3608 3609
			break;

3610
		kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3611 3612

		r = -EFAULT;
3613
		if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3614 3615 3616 3617 3618
			break;
		r = 0;
		break;
	}
	case KVM_SET_XSAVE: {
3619
		u.xsave = memdup_user(argp, sizeof(*u.xsave));
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Guo Chao committed
3620 3621
		if (IS_ERR(u.xsave))
			return PTR_ERR(u.xsave);
3622

3623
		r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3624 3625 3626
		break;
	}
	case KVM_GET_XCRS: {
3627
		u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3628
		r = -ENOMEM;
3629
		if (!u.xcrs)
3630 3631
			break;

3632
		kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3633 3634

		r = -EFAULT;
3635
		if (copy_to_user(argp, u.xcrs,
3636 3637 3638 3639 3640 3641
				 sizeof(struct kvm_xcrs)))
			break;
		r = 0;
		break;
	}
	case KVM_SET_XCRS: {
3642
		u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
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Guo Chao committed
3643 3644
		if (IS_ERR(u.xcrs))
			return PTR_ERR(u.xcrs);
3645

3646
		r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3647 3648
		break;
	}
3649 3650 3651 3652 3653 3654 3655 3656 3657
	case KVM_SET_TSC_KHZ: {
		u32 user_tsc_khz;

		r = -EINVAL;
		user_tsc_khz = (u32)arg;

		if (user_tsc_khz >= kvm_max_guest_tsc_khz)
			goto out;

3658 3659 3660
		if (user_tsc_khz == 0)
			user_tsc_khz = tsc_khz;

3661 3662
		if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
			r = 0;
3663 3664 3665 3666

		goto out;
	}
	case KVM_GET_TSC_KHZ: {
3667
		r = vcpu->arch.virtual_tsc_khz;
3668 3669
		goto out;
	}
3670 3671 3672 3673
	case KVM_KVMCLOCK_CTRL: {
		r = kvm_set_guest_paused(vcpu);
		goto out;
	}
3674 3675 3676 3677 3678 3679 3680 3681 3682
	case KVM_ENABLE_CAP: {
		struct kvm_enable_cap cap;

		r = -EFAULT;
		if (copy_from_user(&cap, argp, sizeof(cap)))
			goto out;
		r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
		break;
	}
3683 3684 3685 3686
	default:
		r = -EINVAL;
	}
out:
3687
	kfree(u.buffer);
3688 3689 3690
	return r;
}

3691 3692 3693 3694 3695
int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
{
	return VM_FAULT_SIGBUS;
}

3696 3697 3698 3699 3700
static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
{
	int ret;

	if (addr > (unsigned int)(-3 * PAGE_SIZE))
3701
		return -EINVAL;
3702 3703 3704 3705
	ret = kvm_x86_ops->set_tss_addr(kvm, addr);
	return ret;
}

3706 3707 3708 3709 3710 3711 3712
static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
					      u64 ident_addr)
{
	kvm->arch.ept_identity_map_addr = ident_addr;
	return 0;
}

3713 3714 3715 3716 3717 3718
static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
					  u32 kvm_nr_mmu_pages)
{
	if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
		return -EINVAL;

3719
	mutex_lock(&kvm->slots_lock);
3720 3721

	kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3722
	kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3723

3724
	mutex_unlock(&kvm->slots_lock);
3725 3726 3727 3728 3729
	return 0;
}

static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
{
3730
	return kvm->arch.n_max_mmu_pages;
3731 3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744 3745 3746 3747 3748 3749
}

static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
{
	int r;

	r = 0;
	switch (chip->chip_id) {
	case KVM_IRQCHIP_PIC_MASTER:
		memcpy(&chip->chip.pic,
			&pic_irqchip(kvm)->pics[0],
			sizeof(struct kvm_pic_state));
		break;
	case KVM_IRQCHIP_PIC_SLAVE:
		memcpy(&chip->chip.pic,
			&pic_irqchip(kvm)->pics[1],
			sizeof(struct kvm_pic_state));
		break;
	case KVM_IRQCHIP_IOAPIC:
3750
		r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3751 3752 3753 3754 3755 3756 3757 3758 3759 3760 3761 3762 3763 3764 3765
		break;
	default:
		r = -EINVAL;
		break;
	}
	return r;
}

static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
{
	int r;

	r = 0;
	switch (chip->chip_id) {
	case KVM_IRQCHIP_PIC_MASTER:
3766
		spin_lock(&pic_irqchip(kvm)->lock);
3767 3768 3769
		memcpy(&pic_irqchip(kvm)->pics[0],
			&chip->chip.pic,
			sizeof(struct kvm_pic_state));
3770
		spin_unlock(&pic_irqchip(kvm)->lock);
3771 3772
		break;
	case KVM_IRQCHIP_PIC_SLAVE:
3773
		spin_lock(&pic_irqchip(kvm)->lock);
3774 3775 3776
		memcpy(&pic_irqchip(kvm)->pics[1],
			&chip->chip.pic,
			sizeof(struct kvm_pic_state));
3777
		spin_unlock(&pic_irqchip(kvm)->lock);
3778 3779
		break;
	case KVM_IRQCHIP_IOAPIC:
3780
		r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3781 3782 3783 3784 3785 3786 3787 3788 3789
		break;
	default:
		r = -EINVAL;
		break;
	}
	kvm_pic_update_irq(pic_irqchip(kvm));
	return r;
}

3790 3791
static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
{
3792 3793 3794 3795 3796 3797 3798
	struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;

	BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));

	mutex_lock(&kps->lock);
	memcpy(ps, &kps->channels, sizeof(*ps));
	mutex_unlock(&kps->lock);
3799
	return 0;
3800 3801 3802 3803
}

static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
{
3804
	int i;
3805 3806 3807
	struct kvm_pit *pit = kvm->arch.vpit;

	mutex_lock(&pit->pit_state.lock);
3808
	memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
3809
	for (i = 0; i < 3; i++)
3810 3811
		kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
	mutex_unlock(&pit->pit_state.lock);
3812
	return 0;
3813 3814 3815 3816 3817 3818 3819 3820 3821
}

static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
{
	mutex_lock(&kvm->arch.vpit->pit_state.lock);
	memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
		sizeof(ps->channels));
	ps->flags = kvm->arch.vpit->pit_state.flags;
	mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3822
	memset(&ps->reserved, 0, sizeof(ps->reserved));
3823
	return 0;
3824 3825 3826 3827
}

static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
{
3828
	int start = 0;
3829
	int i;
3830
	u32 prev_legacy, cur_legacy;
3831 3832 3833 3834
	struct kvm_pit *pit = kvm->arch.vpit;

	mutex_lock(&pit->pit_state.lock);
	prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3835 3836 3837
	cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
	if (!prev_legacy && cur_legacy)
		start = 1;
3838 3839 3840
	memcpy(&pit->pit_state.channels, &ps->channels,
	       sizeof(pit->pit_state.channels));
	pit->pit_state.flags = ps->flags;
3841
	for (i = 0; i < 3; i++)
3842
		kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
3843
				   start && i == 0);
3844
	mutex_unlock(&pit->pit_state.lock);
3845
	return 0;
3846 3847
}

3848 3849 3850
static int kvm_vm_ioctl_reinject(struct kvm *kvm,
				 struct kvm_reinject_control *control)
{
3851 3852 3853
	struct kvm_pit *pit = kvm->arch.vpit;

	if (!pit)
3854
		return -ENXIO;
3855

3856 3857 3858 3859 3860 3861 3862
	/* pit->pit_state.lock was overloaded to prevent userspace from getting
	 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
	 * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
	 */
	mutex_lock(&pit->pit_state.lock);
	kvm_pit_set_reinject(pit, control->pit_reinject);
	mutex_unlock(&pit->pit_state.lock);
3863

3864 3865 3866
	return 0;
}

3867
/**
3868 3869 3870
 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
 * @kvm: kvm instance
 * @log: slot id and address to which we copy the log
3871
 *
3872 3873 3874 3875 3876 3877 3878 3879
 * Steps 1-4 below provide general overview of dirty page logging. See
 * kvm_get_dirty_log_protect() function description for additional details.
 *
 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
 * always flush the TLB (step 4) even if previous step failed  and the dirty
 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
 * writes will be marked dirty for next log read.
3880
 *
3881 3882
 *   1. Take a snapshot of the bit and clear it if needed.
 *   2. Write protect the corresponding page.
3883 3884
 *   3. Copy the snapshot to the userspace.
 *   4. Flush TLB's if needed.
3885
 */
3886
int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3887
{
3888
	bool is_dirty = false;
3889
	int r;
3890

3891
	mutex_lock(&kvm->slots_lock);
3892

3893 3894 3895 3896 3897 3898
	/*
	 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
	 */
	if (kvm_x86_ops->flush_log_dirty)
		kvm_x86_ops->flush_log_dirty(kvm);

3899
	r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3900 3901 3902 3903 3904

	/*
	 * All the TLBs can be flushed out of mmu lock, see the comments in
	 * kvm_mmu_slot_remove_write_access().
	 */
3905
	lockdep_assert_held(&kvm->slots_lock);
3906 3907 3908
	if (is_dirty)
		kvm_flush_remote_tlbs(kvm);

3909
	mutex_unlock(&kvm->slots_lock);
3910 3911 3912
	return r;
}

3913 3914
int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
			bool line_status)
3915 3916 3917 3918 3919
{
	if (!irqchip_in_kernel(kvm))
		return -ENXIO;

	irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3920 3921
					irq_event->irq, irq_event->level,
					line_status);
3922 3923 3924
	return 0;
}

3925 3926 3927 3928 3929 3930 3931 3932 3933 3934 3935 3936 3937
static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
				   struct kvm_enable_cap *cap)
{
	int r;

	if (cap->flags)
		return -EINVAL;

	switch (cap->cap) {
	case KVM_CAP_DISABLE_QUIRKS:
		kvm->arch.disabled_quirks = cap->args[0];
		r = 0;
		break;
3938 3939
	case KVM_CAP_SPLIT_IRQCHIP: {
		mutex_lock(&kvm->lock);
3940 3941 3942
		r = -EINVAL;
		if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
			goto split_irqchip_unlock;
3943 3944 3945
		r = -EEXIST;
		if (irqchip_in_kernel(kvm))
			goto split_irqchip_unlock;
3946
		if (kvm->created_vcpus)
3947 3948 3949 3950 3951 3952
			goto split_irqchip_unlock;
		r = kvm_setup_empty_irq_routing(kvm);
		if (r)
			goto split_irqchip_unlock;
		/* Pairs with irqchip_in_kernel. */
		smp_wmb();
3953
		kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
3954
		kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
3955 3956 3957 3958 3959
		r = 0;
split_irqchip_unlock:
		mutex_unlock(&kvm->lock);
		break;
	}
3960 3961 3962 3963 3964 3965 3966
	case KVM_CAP_X2APIC_API:
		r = -EINVAL;
		if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
			break;

		if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
			kvm->arch.x2apic_format = true;
3967 3968
		if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
			kvm->arch.x2apic_broadcast_quirk_disabled = true;
3969 3970 3971

		r = 0;
		break;
3972 3973 3974 3975 3976 3977 3978
	default:
		r = -EINVAL;
		break;
	}
	return r;
}

3979 3980 3981 3982 3983
long kvm_arch_vm_ioctl(struct file *filp,
		       unsigned int ioctl, unsigned long arg)
{
	struct kvm *kvm = filp->private_data;
	void __user *argp = (void __user *)arg;
3984
	int r = -ENOTTY;
3985 3986 3987 3988 3989 3990 3991
	/*
	 * This union makes it completely explicit to gcc-3.x
	 * that these two variables' stack usage should be
	 * combined, not added together.
	 */
	union {
		struct kvm_pit_state ps;
3992
		struct kvm_pit_state2 ps2;
3993
		struct kvm_pit_config pit_config;
3994
	} u;
3995 3996 3997 3998 3999

	switch (ioctl) {
	case KVM_SET_TSS_ADDR:
		r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
		break;
4000 4001 4002 4003 4004 4005 4006 4007 4008
	case KVM_SET_IDENTITY_MAP_ADDR: {
		u64 ident_addr;

		r = -EFAULT;
		if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
			goto out;
		r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
		break;
	}
4009 4010 4011 4012 4013 4014
	case KVM_SET_NR_MMU_PAGES:
		r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
		break;
	case KVM_GET_NR_MMU_PAGES:
		r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
		break;
4015 4016
	case KVM_CREATE_IRQCHIP: {
		mutex_lock(&kvm->lock);
4017

4018
		r = -EEXIST;
4019
		if (irqchip_in_kernel(kvm))
4020
			goto create_irqchip_unlock;
4021

4022
		r = -EINVAL;
4023
		if (kvm->created_vcpus)
4024
			goto create_irqchip_unlock;
4025 4026 4027

		r = kvm_pic_init(kvm);
		if (r)
4028
			goto create_irqchip_unlock;
4029 4030 4031 4032 4033 4034

		r = kvm_ioapic_init(kvm);
		if (r) {
			mutex_lock(&kvm->slots_lock);
			kvm_pic_destroy(kvm);
			mutex_unlock(&kvm->slots_lock);
4035
			goto create_irqchip_unlock;
4036 4037
		}

4038 4039
		r = kvm_setup_default_irq_routing(kvm);
		if (r) {
4040
			mutex_lock(&kvm->slots_lock);
4041
			mutex_lock(&kvm->irq_lock);
4042
			kvm_ioapic_destroy(kvm);
4043
			kvm_pic_destroy(kvm);
4044
			mutex_unlock(&kvm->irq_lock);
4045
			mutex_unlock(&kvm->slots_lock);
4046
			goto create_irqchip_unlock;
4047
		}
4048
		/* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4049
		smp_wmb();
4050
		kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4051 4052
	create_irqchip_unlock:
		mutex_unlock(&kvm->lock);
4053
		break;
4054
	}
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Sheng Yang committed
4055
	case KVM_CREATE_PIT:
4056 4057 4058 4059 4060 4061 4062 4063
		u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
		goto create_pit;
	case KVM_CREATE_PIT2:
		r = -EFAULT;
		if (copy_from_user(&u.pit_config, argp,
				   sizeof(struct kvm_pit_config)))
			goto out;
	create_pit:
4064
		mutex_lock(&kvm->lock);
Avi Kivity's avatar
Avi Kivity committed
4065 4066 4067
		r = -EEXIST;
		if (kvm->arch.vpit)
			goto create_pit_unlock;
Sheng Yang's avatar
Sheng Yang committed
4068
		r = -ENOMEM;
4069
		kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
Sheng Yang's avatar
Sheng Yang committed
4070 4071
		if (kvm->arch.vpit)
			r = 0;
Avi Kivity's avatar
Avi Kivity committed
4072
	create_pit_unlock:
4073
		mutex_unlock(&kvm->lock);
Sheng Yang's avatar
Sheng Yang committed
4074
		break;
4075 4076
	case KVM_GET_IRQCHIP: {
		/* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4077
		struct kvm_irqchip *chip;
4078

4079 4080 4081
		chip = memdup_user(argp, sizeof(*chip));
		if (IS_ERR(chip)) {
			r = PTR_ERR(chip);
4082
			goto out;
4083 4084
		}

4085
		r = -ENXIO;
4086
		if (!irqchip_kernel(kvm))
4087 4088
			goto get_irqchip_out;
		r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4089
		if (r)
4090
			goto get_irqchip_out;
4091
		r = -EFAULT;
4092 4093
		if (copy_to_user(argp, chip, sizeof *chip))
			goto get_irqchip_out;
4094
		r = 0;
4095 4096
	get_irqchip_out:
		kfree(chip);
4097 4098 4099 4100
		break;
	}
	case KVM_SET_IRQCHIP: {
		/* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4101
		struct kvm_irqchip *chip;
4102

4103 4104 4105
		chip = memdup_user(argp, sizeof(*chip));
		if (IS_ERR(chip)) {
			r = PTR_ERR(chip);
4106
			goto out;
4107 4108
		}

4109
		r = -ENXIO;
4110
		if (!irqchip_kernel(kvm))
4111 4112
			goto set_irqchip_out;
		r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4113
		if (r)
4114
			goto set_irqchip_out;
4115
		r = 0;
4116 4117
	set_irqchip_out:
		kfree(chip);
4118 4119
		break;
	}
4120 4121
	case KVM_GET_PIT: {
		r = -EFAULT;
4122
		if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4123 4124 4125 4126
			goto out;
		r = -ENXIO;
		if (!kvm->arch.vpit)
			goto out;
4127
		r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4128 4129 4130
		if (r)
			goto out;
		r = -EFAULT;
4131
		if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4132 4133 4134 4135 4136 4137
			goto out;
		r = 0;
		break;
	}
	case KVM_SET_PIT: {
		r = -EFAULT;
4138
		if (copy_from_user(&u.ps, argp, sizeof u.ps))
4139 4140 4141 4142
			goto out;
		r = -ENXIO;
		if (!kvm->arch.vpit)
			goto out;
4143
		r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4144 4145
		break;
	}
4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168
	case KVM_GET_PIT2: {
		r = -ENXIO;
		if (!kvm->arch.vpit)
			goto out;
		r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
		if (r)
			goto out;
		r = -EFAULT;
		if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
			goto out;
		r = 0;
		break;
	}
	case KVM_SET_PIT2: {
		r = -EFAULT;
		if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
			goto out;
		r = -ENXIO;
		if (!kvm->arch.vpit)
			goto out;
		r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
		break;
	}
4169 4170 4171 4172 4173 4174 4175 4176
	case KVM_REINJECT_CONTROL: {
		struct kvm_reinject_control control;
		r =  -EFAULT;
		if (copy_from_user(&control, argp, sizeof(control)))
			goto out;
		r = kvm_vm_ioctl_reinject(kvm, &control);
		break;
	}
4177 4178 4179
	case KVM_SET_BOOT_CPU_ID:
		r = 0;
		mutex_lock(&kvm->lock);
4180
		if (kvm->created_vcpus)
4181 4182 4183 4184 4185
			r = -EBUSY;
		else
			kvm->arch.bsp_vcpu_id = arg;
		mutex_unlock(&kvm->lock);
		break;
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Ed Swierk committed
4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196
	case KVM_XEN_HVM_CONFIG: {
		r = -EFAULT;
		if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
				   sizeof(struct kvm_xen_hvm_config)))
			goto out;
		r = -EINVAL;
		if (kvm->arch.xen_hvm_config.flags)
			goto out;
		r = 0;
		break;
	}
4197 4198 4199 4200 4201 4202 4203 4204 4205 4206 4207 4208 4209
	case KVM_SET_CLOCK: {
		struct kvm_clock_data user_ns;
		u64 now_ns;

		r = -EFAULT;
		if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
			goto out;

		r = -EINVAL;
		if (user_ns.flags)
			goto out;

		r = 0;
4210
		local_irq_disable();
4211 4212
		now_ns = __get_kvmclock_ns(kvm);
		kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4213
		local_irq_enable();
4214
		kvm_gen_update_masterclock(kvm);
4215 4216 4217 4218 4219 4220
		break;
	}
	case KVM_GET_CLOCK: {
		struct kvm_clock_data user_ns;
		u64 now_ns;

4221 4222
		local_irq_disable();
		now_ns = __get_kvmclock_ns(kvm);
4223
		user_ns.clock = now_ns;
4224 4225
		user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
		local_irq_enable();
4226
		memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4227 4228 4229 4230 4231 4232 4233

		r = -EFAULT;
		if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
			goto out;
		r = 0;
		break;
	}
4234 4235
	case KVM_ENABLE_CAP: {
		struct kvm_enable_cap cap;
4236

4237 4238 4239 4240 4241 4242
		r = -EFAULT;
		if (copy_from_user(&cap, argp, sizeof(cap)))
			goto out;
		r = kvm_vm_ioctl_enable_cap(kvm, &cap);
		break;
	}
4243
	default:
4244
		r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
4245 4246 4247 4248 4249
	}
out:
	return r;
}

4250
static void kvm_init_msr_list(void)
4251 4252 4253 4254
{
	u32 dummy[2];
	unsigned i, j;

4255
	for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4256 4257
		if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
			continue;
4258 4259 4260

		/*
		 * Even MSRs that are valid in the host may not be exposed
4261
		 * to the guests in some cases.
4262 4263 4264 4265 4266 4267
		 */
		switch (msrs_to_save[i]) {
		case MSR_IA32_BNDCFGS:
			if (!kvm_x86_ops->mpx_supported())
				continue;
			break;
4268 4269 4270 4271
		case MSR_TSC_AUX:
			if (!kvm_x86_ops->rdtscp_supported())
				continue;
			break;
4272 4273 4274 4275
		default:
			break;
		}

4276 4277 4278 4279 4280
		if (j < i)
			msrs_to_save[j] = msrs_to_save[i];
		j++;
	}
	num_msrs_to_save = j;
4281 4282 4283

	for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
		switch (emulated_msrs[i]) {
4284 4285 4286 4287
		case MSR_IA32_SMBASE:
			if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
				continue;
			break;
4288 4289 4290 4291 4292 4293 4294 4295 4296
		default:
			break;
		}

		if (j < i)
			emulated_msrs[j] = emulated_msrs[i];
		j++;
	}
	num_emulated_msrs = j;
4297 4298
}

4299 4300
static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
			   const void *v)
4301
{
4302 4303 4304 4305 4306
	int handled = 0;
	int n;

	do {
		n = min(len, 8);
4307
		if (!(lapic_in_kernel(vcpu) &&
4308 4309
		      !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
		    && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4310 4311 4312 4313 4314 4315
			break;
		handled += n;
		addr += n;
		len -= n;
		v += n;
	} while (len);
4316

4317
	return handled;
4318 4319
}

4320
static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4321
{
4322 4323 4324 4325 4326
	int handled = 0;
	int n;

	do {
		n = min(len, 8);
4327
		if (!(lapic_in_kernel(vcpu) &&
4328 4329 4330
		      !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
					 addr, n, v))
		    && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4331 4332 4333 4334 4335 4336 4337
			break;
		trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
		handled += n;
		addr += n;
		len -= n;
		v += n;
	} while (len);
4338

4339
	return handled;
4340 4341
}

4342 4343 4344 4345 4346 4347 4348 4349 4350 4351 4352 4353
static void kvm_set_segment(struct kvm_vcpu *vcpu,
			struct kvm_segment *var, int seg)
{
	kvm_x86_ops->set_segment(vcpu, var, seg);
}

void kvm_get_segment(struct kvm_vcpu *vcpu,
		     struct kvm_segment *var, int seg)
{
	kvm_x86_ops->get_segment(vcpu, var, seg);
}

4354 4355
gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
			   struct x86_exception *exception)
4356 4357 4358 4359 4360 4361 4362
{
	gpa_t t_gpa;

	BUG_ON(!mmu_is_nested(vcpu));

	/* NPT walks are always user-walks */
	access |= PFERR_USER_MASK;
4363
	t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4364 4365 4366 4367

	return t_gpa;
}

4368 4369
gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
			      struct x86_exception *exception)
4370 4371
{
	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4372
	return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4373 4374
}

4375 4376
 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
				struct x86_exception *exception)
4377 4378 4379
{
	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
	access |= PFERR_FETCH_MASK;
4380
	return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4381 4382
}

4383 4384
gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
			       struct x86_exception *exception)
4385 4386 4387
{
	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
	access |= PFERR_WRITE_MASK;
4388
	return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4389 4390 4391
}

/* uses this to access any guest's mapped memory without checking CPL */
4392 4393
gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
				struct x86_exception *exception)
4394
{
4395
	return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4396 4397 4398 4399
}

static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
				      struct kvm_vcpu *vcpu, u32 access,
4400
				      struct x86_exception *exception)
4401 4402
{
	void *data = val;
4403
	int r = X86EMUL_CONTINUE;
4404 4405

	while (bytes) {
4406
		gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4407
							    exception);
4408
		unsigned offset = addr & (PAGE_SIZE-1);
4409
		unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4410 4411
		int ret;

4412
		if (gpa == UNMAPPED_GVA)
4413
			return X86EMUL_PROPAGATE_FAULT;
4414 4415
		ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
					       offset, toread);
4416
		if (ret < 0) {
4417
			r = X86EMUL_IO_NEEDED;
4418 4419
			goto out;
		}
4420

4421 4422 4423
		bytes -= toread;
		data += toread;
		addr += toread;
4424
	}
4425 4426
out:
	return r;
4427
}
4428

4429
/* used for instruction fetching */
4430 4431
static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
				gva_t addr, void *val, unsigned int bytes,
4432
				struct x86_exception *exception)
4433
{
4434
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4435
	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4436 4437
	unsigned offset;
	int ret;
4438

4439 4440 4441 4442 4443 4444 4445 4446 4447
	/* Inline kvm_read_guest_virt_helper for speed.  */
	gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
						    exception);
	if (unlikely(gpa == UNMAPPED_GVA))
		return X86EMUL_PROPAGATE_FAULT;

	offset = addr & (PAGE_SIZE-1);
	if (WARN_ON(offset + bytes > PAGE_SIZE))
		bytes = (unsigned)PAGE_SIZE - offset;
4448 4449
	ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
				       offset, bytes);
4450 4451 4452 4453
	if (unlikely(ret < 0))
		return X86EMUL_IO_NEEDED;

	return X86EMUL_CONTINUE;
4454 4455
}

4456
int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4457
			       gva_t addr, void *val, unsigned int bytes,
4458
			       struct x86_exception *exception)
4459
{
4460
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4461
	u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4462

4463
	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4464
					  exception);
4465
}
4466
EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4467

4468 4469
static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
				      gva_t addr, void *val, unsigned int bytes,
4470
				      struct x86_exception *exception)
4471
{
4472
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4473
	return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4474 4475
}

4476 4477 4478 4479 4480 4481 4482 4483 4484
static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
		unsigned long addr, void *val, unsigned int bytes)
{
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
	int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);

	return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
}

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4485
int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4486
				       gva_t addr, void *val,
4487
				       unsigned int bytes,
4488
				       struct x86_exception *exception)
4489
{
4490
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4491 4492 4493 4494
	void *data = val;
	int r = X86EMUL_CONTINUE;

	while (bytes) {
4495 4496
		gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
							     PFERR_WRITE_MASK,
4497
							     exception);
4498 4499 4500 4501
		unsigned offset = addr & (PAGE_SIZE-1);
		unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
		int ret;

4502
		if (gpa == UNMAPPED_GVA)
4503
			return X86EMUL_PROPAGATE_FAULT;
4504
		ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4505
		if (ret < 0) {
4506
			r = X86EMUL_IO_NEEDED;
4507 4508 4509 4510 4511 4512 4513 4514 4515 4516
			goto out;
		}

		bytes -= towrite;
		data += towrite;
		addr += towrite;
	}
out:
	return r;
}
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4517
EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4518

4519 4520 4521 4522 4523 4524 4525 4526 4527 4528 4529 4530 4531 4532 4533
static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
			    gpa_t gpa, bool write)
{
	/* For APIC access vmexit */
	if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
		return 1;

	if (vcpu_match_mmio_gpa(vcpu, gpa)) {
		trace_vcpu_match_mmio(gva, gpa, write, true);
		return 1;
	}

	return 0;
}

4534 4535 4536 4537
static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
				gpa_t *gpa, struct x86_exception *exception,
				bool write)
{
4538 4539
	u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
		| (write ? PFERR_WRITE_MASK : 0);
4540

4541 4542 4543 4544 4545
	/*
	 * currently PKRU is only applied to ept enabled guest so
	 * there is no pkey in EPT page table for L1 guest or EPT
	 * shadow page table for L2 guest.
	 */
4546
	if (vcpu_match_mmio_gva(vcpu, gva)
4547
	    && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4548
				 vcpu->arch.access, 0, access)) {
4549 4550
		*gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
					(gva & (PAGE_SIZE - 1));
4551
		trace_vcpu_match_mmio(gva, *gpa, write, false);
4552 4553 4554
		return 1;
	}

4555 4556 4557 4558 4559
	*gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);

	if (*gpa == UNMAPPED_GVA)
		return -1;

4560
	return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
4561 4562
}

4563
int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4564
			const void *val, int bytes)
4565 4566 4567
{
	int ret;

4568
	ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4569
	if (ret < 0)
4570
		return 0;
4571
	kvm_page_track_write(vcpu, gpa, val, bytes);
4572 4573 4574
	return 1;
}

4575 4576 4577 4578 4579 4580 4581 4582 4583 4584 4585 4586 4587 4588 4589 4590
struct read_write_emulator_ops {
	int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
				  int bytes);
	int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
				  void *val, int bytes);
	int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
			       int bytes, void *val);
	int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
				    void *val, int bytes);
	bool write;
};

static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
{
	if (vcpu->mmio_read_completed) {
		trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
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4591
			       vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4592 4593 4594 4595 4596 4597 4598 4599 4600 4601
		vcpu->mmio_read_completed = 0;
		return 1;
	}

	return 0;
}

static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
			void *val, int bytes)
{
4602
	return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4603 4604 4605 4606 4607 4608 4609 4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622 4623 4624 4625 4626
}

static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
			 void *val, int bytes)
{
	return emulator_write_phys(vcpu, gpa, val, bytes);
}

static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
{
	trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
	return vcpu_mmio_write(vcpu, gpa, bytes, val);
}

static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
			  void *val, int bytes)
{
	trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
	return X86EMUL_IO_NEEDED;
}

static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
			   void *val, int bytes)
{
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4627 4628
	struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];

4629
	memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4630 4631 4632
	return X86EMUL_CONTINUE;
}

4633
static const struct read_write_emulator_ops read_emultor = {
4634 4635 4636 4637 4638 4639
	.read_write_prepare = read_prepare,
	.read_write_emulate = read_emulate,
	.read_write_mmio = vcpu_mmio_read,
	.read_write_exit_mmio = read_exit_mmio,
};

4640
static const struct read_write_emulator_ops write_emultor = {
4641 4642 4643 4644 4645 4646
	.read_write_emulate = write_emulate,
	.read_write_mmio = write_mmio,
	.read_write_exit_mmio = write_exit_mmio,
	.write = true,
};

4647 4648 4649 4650
static int emulator_read_write_onepage(unsigned long addr, void *val,
				       unsigned int bytes,
				       struct x86_exception *exception,
				       struct kvm_vcpu *vcpu,
4651
				       const struct read_write_emulator_ops *ops)
4652
{
4653 4654
	gpa_t gpa;
	int handled, ret;
4655
	bool write = ops->write;
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4656
	struct kvm_mmio_fragment *frag;
4657 4658 4659 4660 4661 4662 4663 4664 4665 4666 4667 4668 4669 4670 4671 4672
	struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;

	/*
	 * If the exit was due to a NPF we may already have a GPA.
	 * If the GPA is present, use it to avoid the GVA to GPA table walk.
	 * Note, this cannot be used on string operations since string
	 * operation using rep will only have the initial GPA from the NPF
	 * occurred.
	 */
	if (vcpu->arch.gpa_available &&
	    emulator_can_use_gpa(ctxt) &&
	    vcpu_is_mmio_gpa(vcpu, addr, exception->address, write) &&
	    (addr & ~PAGE_MASK) == (exception->address & ~PAGE_MASK)) {
		gpa = exception->address;
		goto mmio;
	}
4673

4674
	ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4675

4676
	if (ret < 0)
4677 4678 4679
		return X86EMUL_PROPAGATE_FAULT;

	/* For APIC access vmexit */
4680
	if (ret)
4681 4682
		goto mmio;

4683
	if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4684 4685 4686 4687 4688 4689
		return X86EMUL_CONTINUE;

mmio:
	/*
	 * Is this MMIO handled locally?
	 */
4690
	handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4691
	if (handled == bytes)
4692 4693
		return X86EMUL_CONTINUE;

4694 4695 4696 4697
	gpa += handled;
	bytes -= handled;
	val += handled;

4698 4699 4700 4701 4702
	WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
	frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
	frag->gpa = gpa;
	frag->data = val;
	frag->len = bytes;
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4703
	return X86EMUL_CONTINUE;
4704 4705
}

4706 4707
static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
			unsigned long addr,
4708 4709
			void *val, unsigned int bytes,
			struct x86_exception *exception,
4710
			const struct read_write_emulator_ops *ops)
4711
{
4712
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
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4713 4714 4715 4716 4717 4718 4719 4720
	gpa_t gpa;
	int rc;

	if (ops->read_write_prepare &&
		  ops->read_write_prepare(vcpu, val, bytes))
		return X86EMUL_CONTINUE;

	vcpu->mmio_nr_fragments = 0;
4721

4722 4723
	/* Crossing a page boundary? */
	if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
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4724
		int now;
4725 4726

		now = -addr & ~PAGE_MASK;
4727 4728 4729
		rc = emulator_read_write_onepage(addr, val, now, exception,
						 vcpu, ops);

4730 4731 4732
		if (rc != X86EMUL_CONTINUE)
			return rc;
		addr += now;
4733 4734
		if (ctxt->mode != X86EMUL_MODE_PROT64)
			addr = (u32)addr;
4735 4736 4737
		val += now;
		bytes -= now;
	}
4738

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4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751
	rc = emulator_read_write_onepage(addr, val, bytes, exception,
					 vcpu, ops);
	if (rc != X86EMUL_CONTINUE)
		return rc;

	if (!vcpu->mmio_nr_fragments)
		return rc;

	gpa = vcpu->mmio_fragments[0].gpa;

	vcpu->mmio_needed = 1;
	vcpu->mmio_cur_fragment = 0;

4752
	vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
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4753 4754 4755 4756 4757
	vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
	vcpu->run->exit_reason = KVM_EXIT_MMIO;
	vcpu->run->mmio.phys_addr = gpa;

	return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4758 4759 4760 4761 4762 4763 4764 4765 4766 4767 4768 4769
}

static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
				  unsigned long addr,
				  void *val,
				  unsigned int bytes,
				  struct x86_exception *exception)
{
	return emulator_read_write(ctxt, addr, val, bytes,
				   exception, &read_emultor);
}

4770
static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4771 4772 4773 4774 4775 4776 4777
			    unsigned long addr,
			    const void *val,
			    unsigned int bytes,
			    struct x86_exception *exception)
{
	return emulator_read_write(ctxt, addr, (void *)val, bytes,
				   exception, &write_emultor);
4778 4779
}

4780 4781 4782 4783 4784 4785 4786
#define CMPXCHG_TYPE(t, ptr, old, new) \
	(cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))

#ifdef CONFIG_X86_64
#  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
#else
#  define CMPXCHG64(ptr, old, new) \
4787
	(cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4788 4789
#endif

4790 4791
static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
				     unsigned long addr,
4792 4793 4794
				     const void *old,
				     const void *new,
				     unsigned int bytes,
4795
				     struct x86_exception *exception)
4796
{
4797
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4798 4799 4800 4801
	gpa_t gpa;
	struct page *page;
	char *kaddr;
	bool exchanged;
4802

4803 4804 4805
	/* guests cmpxchg8b have to be emulated atomically */
	if (bytes > 8 || (bytes & (bytes - 1)))
		goto emul_write;
4806

4807
	gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4808

4809 4810 4811
	if (gpa == UNMAPPED_GVA ||
	    (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
		goto emul_write;
4812

4813 4814
	if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
		goto emul_write;
4815

4816
	page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4817
	if (is_error_page(page))
4818
		goto emul_write;
4819

4820
	kaddr = kmap_atomic(page);
4821 4822 4823 4824 4825 4826 4827 4828 4829 4830 4831 4832 4833 4834 4835 4836
	kaddr += offset_in_page(gpa);
	switch (bytes) {
	case 1:
		exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
		break;
	case 2:
		exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
		break;
	case 4:
		exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
		break;
	case 8:
		exchanged = CMPXCHG64(kaddr, old, new);
		break;
	default:
		BUG();
4837
	}
4838
	kunmap_atomic(kaddr);
4839 4840 4841 4842 4843
	kvm_release_page_dirty(page);

	if (!exchanged)
		return X86EMUL_CMPXCHG_FAILED;

4844
	kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4845
	kvm_page_track_write(vcpu, gpa, new, bytes);
4846 4847

	return X86EMUL_CONTINUE;
4848

4849
emul_write:
4850
	printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4851

4852
	return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4853 4854
}

4855 4856 4857 4858 4859 4860
static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
{
	/* TODO: String I/O for in kernel device */
	int r;

	if (vcpu->arch.pio.in)
4861
		r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4862 4863
				    vcpu->arch.pio.size, pd);
	else
4864
		r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4865 4866 4867 4868 4869
				     vcpu->arch.pio.port, vcpu->arch.pio.size,
				     pd);
	return r;
}

4870 4871 4872
static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
			       unsigned short port, void *val,
			       unsigned int count, bool in)
4873 4874
{
	vcpu->arch.pio.port = port;
4875
	vcpu->arch.pio.in = in;
4876
	vcpu->arch.pio.count  = count;
4877 4878 4879
	vcpu->arch.pio.size = size;

	if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4880
		vcpu->arch.pio.count = 0;
4881 4882 4883 4884
		return 1;
	}

	vcpu->run->exit_reason = KVM_EXIT_IO;
4885
	vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4886 4887 4888 4889 4890 4891 4892 4893
	vcpu->run->io.size = size;
	vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
	vcpu->run->io.count = count;
	vcpu->run->io.port = port;

	return 0;
}

4894 4895 4896
static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
				    int size, unsigned short port, void *val,
				    unsigned int count)
4897
{
4898
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4899
	int ret;
4900

4901 4902
	if (vcpu->arch.pio.count)
		goto data_avail;
4903

4904 4905 4906 4907
	ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
	if (ret) {
data_avail:
		memcpy(val, vcpu->arch.pio_data, size * count);
4908
		trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4909
		vcpu->arch.pio.count = 0;
4910 4911 4912 4913 4914 4915
		return 1;
	}

	return 0;
}

4916 4917 4918 4919 4920 4921 4922
static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
				     int size, unsigned short port,
				     const void *val, unsigned int count)
{
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);

	memcpy(vcpu->arch.pio_data, val, size * count);
4923
	trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4924 4925 4926
	return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
}

4927 4928 4929 4930 4931
static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
{
	return kvm_x86_ops->get_segment_base(vcpu, seg);
}

4932
static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4933
{
4934
	kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4935 4936
}

4937
static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4938 4939 4940 4941 4942
{
	if (!need_emulate_wbinvd(vcpu))
		return X86EMUL_CONTINUE;

	if (kvm_x86_ops->has_wbinvd_exit()) {
4943 4944 4945
		int cpu = get_cpu();

		cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4946 4947
		smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
				wbinvd_ipi, NULL, 1);
4948
		put_cpu();
4949
		cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4950 4951
	} else
		wbinvd();
4952 4953
	return X86EMUL_CONTINUE;
}
4954 4955 4956

int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
{
4957 4958
	kvm_emulate_wbinvd_noskip(vcpu);
	return kvm_skip_emulated_instruction(vcpu);
4959
}
4960 4961
EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);

4962 4963


4964 4965
static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
{
4966
	kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4967 4968
}

4969 4970
static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
			   unsigned long *dest)
4971
{
4972
	return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4973 4974
}

4975 4976
static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
			   unsigned long value)
4977
{
4978

4979
	return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4980 4981
}

4982
static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4983
{
4984
	return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4985 4986
}

4987
static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4988
{
4989
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4990 4991 4992 4993 4994 4995 4996 4997 4998 4999
	unsigned long value;

	switch (cr) {
	case 0:
		value = kvm_read_cr0(vcpu);
		break;
	case 2:
		value = vcpu->arch.cr2;
		break;
	case 3:
5000
		value = kvm_read_cr3(vcpu);
5001 5002 5003 5004 5005 5006 5007 5008
		break;
	case 4:
		value = kvm_read_cr4(vcpu);
		break;
	case 8:
		value = kvm_get_cr8(vcpu);
		break;
	default:
5009
		kvm_err("%s: unexpected cr %u\n", __func__, cr);
5010 5011 5012 5013 5014 5015
		return 0;
	}

	return value;
}

5016
static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5017
{
5018
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5019 5020
	int res = 0;

5021 5022
	switch (cr) {
	case 0:
5023
		res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5024 5025 5026 5027 5028
		break;
	case 2:
		vcpu->arch.cr2 = val;
		break;
	case 3:
5029
		res = kvm_set_cr3(vcpu, val);
5030 5031
		break;
	case 4:
5032
		res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5033 5034
		break;
	case 8:
Andre Przywara's avatar
Andre Przywara committed
5035
		res = kvm_set_cr8(vcpu, val);
5036 5037
		break;
	default:
5038
		kvm_err("%s: unexpected cr %u\n", __func__, cr);
5039
		res = -1;
5040
	}
5041 5042

	return res;
5043 5044
}

5045
static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5046
{
5047
	return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5048 5049
}

5050
static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5051
{
5052
	kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5053 5054
}

5055
static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5056
{
5057
	kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5058 5059
}

5060 5061 5062 5063 5064 5065 5066 5067 5068 5069
static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
{
	kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
}

static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
{
	kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
}

5070 5071
static unsigned long emulator_get_cached_segment_base(
	struct x86_emulate_ctxt *ctxt, int seg)
5072
{
5073
	return get_segment_base(emul_to_vcpu(ctxt), seg);
5074 5075
}

5076 5077 5078
static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
				 struct desc_struct *desc, u32 *base3,
				 int seg)
5079 5080 5081
{
	struct kvm_segment var;

5082
	kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5083
	*selector = var.selector;
5084

5085 5086
	if (var.unusable) {
		memset(desc, 0, sizeof(*desc));
5087
		return false;
5088
	}
5089 5090 5091 5092 5093

	if (var.g)
		var.limit >>= 12;
	set_desc_limit(desc, var.limit);
	set_desc_base(desc, (unsigned long)var.base);
5094 5095 5096 5097
#ifdef CONFIG_X86_64
	if (base3)
		*base3 = var.base >> 32;
#endif
5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108 5109
	desc->type = var.type;
	desc->s = var.s;
	desc->dpl = var.dpl;
	desc->p = var.present;
	desc->avl = var.avl;
	desc->l = var.l;
	desc->d = var.db;
	desc->g = var.g;

	return true;
}

5110 5111 5112
static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
				 struct desc_struct *desc, u32 base3,
				 int seg)
5113
{
5114
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5115 5116
	struct kvm_segment var;

5117
	var.selector = selector;
5118
	var.base = get_desc_base(desc);
5119 5120 5121
#ifdef CONFIG_X86_64
	var.base |= ((u64)base3) << 32;
#endif
5122 5123 5124 5125 5126 5127 5128 5129 5130 5131 5132 5133 5134 5135 5136 5137 5138 5139
	var.limit = get_desc_limit(desc);
	if (desc->g)
		var.limit = (var.limit << 12) | 0xfff;
	var.type = desc->type;
	var.dpl = desc->dpl;
	var.db = desc->d;
	var.s = desc->s;
	var.l = desc->l;
	var.g = desc->g;
	var.avl = desc->avl;
	var.present = desc->p;
	var.unusable = !var.present;
	var.padding = 0;

	kvm_set_segment(vcpu, &var, seg);
	return;
}

5140 5141 5142
static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
			    u32 msr_index, u64 *pdata)
{
5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153
	struct msr_data msr;
	int r;

	msr.index = msr_index;
	msr.host_initiated = false;
	r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
	if (r)
		return r;

	*pdata = msr.data;
	return 0;
5154 5155 5156 5157 5158
}

static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
			    u32 msr_index, u64 data)
{
5159 5160 5161 5162 5163 5164
	struct msr_data msr;

	msr.data = data;
	msr.index = msr_index;
	msr.host_initiated = false;
	return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5165 5166
}

5167 5168 5169 5170 5171 5172 5173 5174 5175 5176 5177 5178 5179 5180
static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
{
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);

	return vcpu->arch.smbase;
}

static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
{
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);

	vcpu->arch.smbase = smbase;
}

5181 5182 5183
static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
			      u32 pmc)
{
5184
	return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5185 5186
}

5187 5188 5189
static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
			     u32 pmc, u64 *pdata)
{
5190
	return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5191 5192
}

5193 5194 5195 5196 5197
static void emulator_halt(struct x86_emulate_ctxt *ctxt)
{
	emul_to_vcpu(ctxt)->arch.halt_request = 1;
}

5198 5199 5200
static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
{
	preempt_disable();
5201
	kvm_load_guest_fpu(emul_to_vcpu(ctxt));
5202 5203 5204 5205 5206 5207 5208
}

static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
{
	preempt_enable();
}

5209
static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5210
			      struct x86_instruction_info *info,
5211 5212
			      enum x86_intercept_stage stage)
{
5213
	return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5214 5215
}

5216
static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5217 5218
			       u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
{
5219
	kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
5220 5221
}

5222 5223 5224 5225 5226 5227 5228 5229 5230 5231
static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
{
	return kvm_register_read(emul_to_vcpu(ctxt), reg);
}

static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
{
	kvm_register_write(emul_to_vcpu(ctxt), reg, val);
}

5232 5233 5234 5235 5236
static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
{
	kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
}

5237
static const struct x86_emulate_ops emulate_ops = {
5238 5239
	.read_gpr            = emulator_read_gpr,
	.write_gpr           = emulator_write_gpr,
5240
	.read_std            = kvm_read_guest_virt_system,
5241
	.write_std           = kvm_write_guest_virt_system,
5242
	.read_phys           = kvm_read_guest_phys_system,
5243
	.fetch               = kvm_fetch_guest_virt,
5244 5245 5246
	.read_emulated       = emulator_read_emulated,
	.write_emulated      = emulator_write_emulated,
	.cmpxchg_emulated    = emulator_cmpxchg_emulated,
5247
	.invlpg              = emulator_invlpg,
5248 5249
	.pio_in_emulated     = emulator_pio_in_emulated,
	.pio_out_emulated    = emulator_pio_out_emulated,
5250 5251
	.get_segment         = emulator_get_segment,
	.set_segment         = emulator_set_segment,
5252
	.get_cached_segment_base = emulator_get_cached_segment_base,
5253
	.get_gdt             = emulator_get_gdt,
5254
	.get_idt	     = emulator_get_idt,
5255 5256
	.set_gdt             = emulator_set_gdt,
	.set_idt	     = emulator_set_idt,
5257 5258
	.get_cr              = emulator_get_cr,
	.set_cr              = emulator_set_cr,
5259
	.cpl                 = emulator_get_cpl,
5260 5261
	.get_dr              = emulator_get_dr,
	.set_dr              = emulator_set_dr,
5262 5263
	.get_smbase          = emulator_get_smbase,
	.set_smbase          = emulator_set_smbase,
5264 5265
	.set_msr             = emulator_set_msr,
	.get_msr             = emulator_get_msr,
5266
	.check_pmc	     = emulator_check_pmc,
5267
	.read_pmc            = emulator_read_pmc,
5268
	.halt                = emulator_halt,
5269
	.wbinvd              = emulator_wbinvd,
5270
	.fix_hypercall       = emulator_fix_hypercall,
5271 5272
	.get_fpu             = emulator_get_fpu,
	.put_fpu             = emulator_put_fpu,
5273
	.intercept           = emulator_intercept,
5274
	.get_cpuid           = emulator_get_cpuid,
5275
	.set_nmi_mask        = emulator_set_nmi_mask,
5276 5277
};

5278 5279
static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
{
5280
	u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5281 5282 5283 5284 5285 5286 5287
	/*
	 * an sti; sti; sequence only disable interrupts for the first
	 * instruction. So, if the last instruction, be it emulated or
	 * not, left the system with the INT_STI flag enabled, it
	 * means that the last instruction is an sti. We should not
	 * leave the flag on in this case. The same goes for mov ss
	 */
5288 5289
	if (int_shadow & mask)
		mask = 0;
5290
	if (unlikely(int_shadow || mask)) {
5291
		kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5292 5293 5294
		if (!mask)
			kvm_make_request(KVM_REQ_EVENT, vcpu);
	}
5295 5296
}

5297
static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5298 5299
{
	struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5300
	if (ctxt->exception.vector == PF_VECTOR)
5301 5302 5303
		return kvm_propagate_fault(vcpu, &ctxt->exception);

	if (ctxt->exception.error_code_valid)
5304 5305
		kvm_queue_exception_e(vcpu, ctxt->exception.vector,
				      ctxt->exception.error_code);
5306
	else
5307
		kvm_queue_exception(vcpu, ctxt->exception.vector);
5308
	return false;
5309 5310
}

5311 5312
static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
{
5313
	struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5314 5315 5316 5317
	int cs_db, cs_l;

	kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);

5318 5319 5320 5321
	ctxt->eflags = kvm_get_rflags(vcpu);
	ctxt->eip = kvm_rip_read(vcpu);
	ctxt->mode = (!is_protmode(vcpu))		? X86EMUL_MODE_REAL :
		     (ctxt->eflags & X86_EFLAGS_VM)	? X86EMUL_MODE_VM86 :
5322
		     (cs_l && is_long_mode(vcpu))	? X86EMUL_MODE_PROT64 :
5323 5324
		     cs_db				? X86EMUL_MODE_PROT32 :
							  X86EMUL_MODE_PROT16;
5325
	BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5326 5327
	BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
	BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5328
	ctxt->emul_flags = vcpu->arch.hflags;
5329

5330
	init_decode_cache(ctxt);
5331
	vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5332 5333
}

5334
int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5335
{
5336
	struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5337 5338 5339 5340
	int ret;

	init_emulate_ctxt(vcpu);

5341 5342 5343
	ctxt->op_bytes = 2;
	ctxt->ad_bytes = 2;
	ctxt->_eip = ctxt->eip + inc_eip;
5344
	ret = emulate_int_real(ctxt, irq);
5345 5346 5347 5348

	if (ret != X86EMUL_CONTINUE)
		return EMULATE_FAIL;

5349
	ctxt->eip = ctxt->_eip;
5350 5351
	kvm_rip_write(vcpu, ctxt->eip);
	kvm_set_rflags(vcpu, ctxt->eflags);
5352 5353

	if (irq == NMI_VECTOR)
Avi Kivity's avatar
Avi Kivity committed
5354
		vcpu->arch.nmi_pending = 0;
5355 5356 5357 5358 5359 5360 5361
	else
		vcpu->arch.interrupt.pending = false;

	return EMULATE_DONE;
}
EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);

5362 5363
static int handle_emulation_failure(struct kvm_vcpu *vcpu)
{
5364 5365
	int r = EMULATE_DONE;

5366 5367
	++vcpu->stat.insn_emulation_fail;
	trace_kvm_emulate_insn_failed(vcpu);
5368
	if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5369 5370 5371 5372 5373
		vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
		vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
		vcpu->run->internal.ndata = 0;
		r = EMULATE_FAIL;
	}
5374
	kvm_queue_exception(vcpu, UD_VECTOR);
5375 5376

	return r;
5377 5378
}

5379
static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5380 5381
				  bool write_fault_to_shadow_pgtable,
				  int emulation_type)
5382
{
5383
	gpa_t gpa = cr2;
5384
	kvm_pfn_t pfn;
5385

5386 5387 5388
	if (emulation_type & EMULTYPE_NO_REEXECUTE)
		return false;

5389 5390 5391 5392 5393 5394
	if (!vcpu->arch.mmu.direct_map) {
		/*
		 * Write permission should be allowed since only
		 * write access need to be emulated.
		 */
		gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5395

5396 5397 5398 5399 5400 5401 5402
		/*
		 * If the mapping is invalid in guest, let cpu retry
		 * it to generate fault.
		 */
		if (gpa == UNMAPPED_GVA)
			return true;
	}
5403

5404 5405 5406 5407 5408 5409 5410
	/*
	 * Do not retry the unhandleable instruction if it faults on the
	 * readonly host memory, otherwise it will goto a infinite loop:
	 * retry instruction -> write #PF -> emulation fail -> retry
	 * instruction -> ...
	 */
	pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430 5431

	/*
	 * If the instruction failed on the error pfn, it can not be fixed,
	 * report the error to userspace.
	 */
	if (is_error_noslot_pfn(pfn))
		return false;

	kvm_release_pfn_clean(pfn);

	/* The instructions are well-emulated on direct mmu. */
	if (vcpu->arch.mmu.direct_map) {
		unsigned int indirect_shadow_pages;

		spin_lock(&vcpu->kvm->mmu_lock);
		indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
		spin_unlock(&vcpu->kvm->mmu_lock);

		if (indirect_shadow_pages)
			kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));

5432
		return true;
5433
	}
5434

5435 5436 5437 5438 5439 5440
	/*
	 * if emulation was due to access to shadowed page table
	 * and it failed try to unshadow page and re-enter the
	 * guest to let CPU execute the instruction.
	 */
	kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5441 5442 5443 5444 5445 5446 5447

	/*
	 * If the access faults on its page table, it can not
	 * be fixed by unprotecting shadow page and it should
	 * be reported to userspace.
	 */
	return !write_fault_to_shadow_pgtable;
5448 5449
}

5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477 5478 5479 5480 5481 5482 5483 5484 5485 5486 5487 5488
static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
			      unsigned long cr2,  int emulation_type)
{
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
	unsigned long last_retry_eip, last_retry_addr, gpa = cr2;

	last_retry_eip = vcpu->arch.last_retry_eip;
	last_retry_addr = vcpu->arch.last_retry_addr;

	/*
	 * If the emulation is caused by #PF and it is non-page_table
	 * writing instruction, it means the VM-EXIT is caused by shadow
	 * page protected, we can zap the shadow page and retry this
	 * instruction directly.
	 *
	 * Note: if the guest uses a non-page-table modifying instruction
	 * on the PDE that points to the instruction, then we will unmap
	 * the instruction and go to an infinite loop. So, we cache the
	 * last retried eip and the last fault address, if we meet the eip
	 * and the address again, we can break out of the potential infinite
	 * loop.
	 */
	vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;

	if (!(emulation_type & EMULTYPE_RETRY))
		return false;

	if (x86_page_table_writing_insn(ctxt))
		return false;

	if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
		return false;

	vcpu->arch.last_retry_eip = ctxt->eip;
	vcpu->arch.last_retry_addr = cr2;

	if (!vcpu->arch.mmu.direct_map)
		gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);

5489
	kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5490 5491 5492 5493

	return true;
}

5494 5495 5496
static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
static int complete_emulated_pio(struct kvm_vcpu *vcpu);

5497
static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5498
{
5499
	if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5500 5501 5502
		/* This is a good place to trace that we are exiting SMM.  */
		trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);

5503 5504
		/* Process a latched INIT or SMI, if any.  */
		kvm_make_request(KVM_REQ_EVENT, vcpu);
5505
	}
5506 5507

	kvm_mmu_reset_context(vcpu);
5508 5509 5510 5511 5512 5513
}

static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
{
	unsigned changed = vcpu->arch.hflags ^ emul_flags;

5514
	vcpu->arch.hflags = emul_flags;
5515 5516 5517

	if (changed & HF_SMM_MASK)
		kvm_smm_changed(vcpu);
5518 5519
}

5520 5521 5522 5523 5524 5525 5526 5527 5528 5529 5530 5531 5532 5533 5534
static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
				unsigned long *db)
{
	u32 dr6 = 0;
	int i;
	u32 enable, rwlen;

	enable = dr7;
	rwlen = dr7 >> 16;
	for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
		if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
			dr6 |= (1 << i);
	return dr6;
}

5535
static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5536 5537 5538 5539
{
	struct kvm_run *kvm_run = vcpu->run;

	/*
5540 5541
	 * rflags is the old, "raw" value of the flags.  The new value has
	 * not been saved yet.
5542 5543 5544 5545 5546 5547 5548
	 *
	 * This is correct even for TF set by the guest, because "the
	 * processor will not generate this exception after the instruction
	 * that sets the TF flag".
	 */
	if (unlikely(rflags & X86_EFLAGS_TF)) {
		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5549 5550
			kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
						  DR6_RTM;
5551 5552 5553 5554 5555 5556 5557 5558 5559 5560 5561
			kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
			kvm_run->debug.arch.exception = DB_VECTOR;
			kvm_run->exit_reason = KVM_EXIT_DEBUG;
			*r = EMULATE_USER_EXIT;
		} else {
			/*
			 * "Certain debug exceptions may clear bit 0-3.  The
			 * remaining contents of the DR6 register are never
			 * cleared by the processor".
			 */
			vcpu->arch.dr6 &= ~15;
5562
			vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5563 5564 5565 5566 5567
			kvm_queue_exception(vcpu, DB_VECTOR);
		}
	}
}

5568 5569 5570 5571 5572 5573 5574 5575 5576 5577 5578
int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
{
	unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
	int r = EMULATE_DONE;

	kvm_x86_ops->skip_emulated_instruction(vcpu);
	kvm_vcpu_check_singlestep(vcpu, rflags, &r);
	return r == EMULATE_DONE;
}
EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);

5579 5580 5581 5582
static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
{
	if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
	    (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5583 5584 5585
		struct kvm_run *kvm_run = vcpu->run;
		unsigned long eip = kvm_get_linear_rip(vcpu);
		u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5586 5587 5588 5589
					   vcpu->arch.guest_debug_dr7,
					   vcpu->arch.eff_db);

		if (dr6 != 0) {
5590
			kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5591
			kvm_run->debug.arch.pc = eip;
5592 5593 5594 5595 5596 5597 5598
			kvm_run->debug.arch.exception = DB_VECTOR;
			kvm_run->exit_reason = KVM_EXIT_DEBUG;
			*r = EMULATE_USER_EXIT;
			return true;
		}
	}

5599 5600
	if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
	    !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5601 5602
		unsigned long eip = kvm_get_linear_rip(vcpu);
		u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5603 5604 5605 5606 5607
					   vcpu->arch.dr7,
					   vcpu->arch.db);

		if (dr6 != 0) {
			vcpu->arch.dr6 &= ~15;
5608
			vcpu->arch.dr6 |= dr6 | DR6_RTM;
5609 5610 5611 5612 5613 5614 5615 5616 5617
			kvm_queue_exception(vcpu, DB_VECTOR);
			*r = EMULATE_DONE;
			return true;
		}
	}

	return false;
}

5618 5619
int x86_emulate_instruction(struct kvm_vcpu *vcpu,
			    unsigned long cr2,
5620 5621 5622
			    int emulation_type,
			    void *insn,
			    int insn_len)
5623
{
5624
	int r;
5625
	struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5626
	bool writeback = true;
5627
	bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5628

5629 5630 5631 5632 5633
	/*
	 * Clear write_fault_to_shadow_pgtable here to ensure it is
	 * never reused.
	 */
	vcpu->arch.write_fault_to_shadow_pgtable = false;
5634
	kvm_clear_exception_queue(vcpu);
5635

5636
	if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5637
		init_emulate_ctxt(vcpu);
5638 5639 5640 5641 5642 5643 5644 5645 5646 5647

		/*
		 * We will reenter on the same instruction since
		 * we do not set complete_userspace_io.  This does not
		 * handle watchpoints yet, those would be handled in
		 * the emulate_ops.
		 */
		if (kvm_vcpu_check_breakpoint(vcpu, &r))
			return r;

5648 5649
		ctxt->interruptibility = 0;
		ctxt->have_exception = false;
5650
		ctxt->exception.vector = -1;
5651
		ctxt->perm_ok = false;
5652

5653
		ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5654

5655
		r = x86_decode_insn(ctxt, insn, insn_len);
5656

5657
		trace_kvm_emulate_insn_start(vcpu);
5658
		++vcpu->stat.insn_emulation;
5659
		if (r != EMULATION_OK)  {
5660 5661
			if (emulation_type & EMULTYPE_TRAP_UD)
				return EMULATE_FAIL;
5662 5663
			if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
						emulation_type))
5664
				return EMULATE_DONE;
5665 5666 5667
			if (emulation_type & EMULTYPE_SKIP)
				return EMULATE_FAIL;
			return handle_emulation_failure(vcpu);
5668 5669 5670
		}
	}

5671
	if (emulation_type & EMULTYPE_SKIP) {
5672
		kvm_rip_write(vcpu, ctxt->_eip);
5673 5674
		if (ctxt->eflags & X86_EFLAGS_RF)
			kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5675 5676 5677
		return EMULATE_DONE;
	}

5678 5679 5680
	if (retry_instruction(ctxt, cr2, emulation_type))
		return EMULATE_DONE;

5681
	/* this is needed for vmware backdoor interface to work since it
5682
	   changes registers values  during IO operation */
5683 5684
	if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
		vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5685
		emulator_invalidate_register_cache(ctxt);
5686
	}
5687

5688
restart:
5689 5690 5691
	/* Save the faulting GPA (cr2) in the address field */
	ctxt->exception.address = cr2;

5692
	r = x86_emulate_insn(ctxt);
5693

5694 5695 5696
	if (r == EMULATION_INTERCEPTED)
		return EMULATE_DONE;

5697
	if (r == EMULATION_FAILED) {
5698 5699
		if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
					emulation_type))
5700 5701
			return EMULATE_DONE;

5702
		return handle_emulation_failure(vcpu);
5703 5704
	}

5705
	if (ctxt->have_exception) {
5706
		r = EMULATE_DONE;
5707 5708
		if (inject_emulated_exception(vcpu))
			return r;
5709
	} else if (vcpu->arch.pio.count) {
5710 5711
		if (!vcpu->arch.pio.in) {
			/* FIXME: return into emulator if single-stepping.  */
5712
			vcpu->arch.pio.count = 0;
5713
		} else {
5714
			writeback = false;
5715 5716
			vcpu->arch.complete_userspace_io = complete_emulated_pio;
		}
5717
		r = EMULATE_USER_EXIT;
5718 5719 5720
	} else if (vcpu->mmio_needed) {
		if (!vcpu->mmio_is_write)
			writeback = false;
5721
		r = EMULATE_USER_EXIT;
5722
		vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5723
	} else if (r == EMULATION_RESTART)
5724
		goto restart;
5725 5726
	else
		r = EMULATE_DONE;
5727

5728
	if (writeback) {
5729
		unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5730
		toggle_interruptibility(vcpu, ctxt->interruptibility);
5731
		vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5732 5733
		if (vcpu->arch.hflags != ctxt->emul_flags)
			kvm_set_hflags(vcpu, ctxt->emul_flags);
5734
		kvm_rip_write(vcpu, ctxt->eip);
5735
		if (r == EMULATE_DONE)
5736
			kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5737 5738 5739
		if (!ctxt->have_exception ||
		    exception_type(ctxt->exception.vector) == EXCPT_TRAP)
			__kvm_set_rflags(vcpu, ctxt->eflags);
5740 5741 5742 5743 5744 5745 5746 5747 5748

		/*
		 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
		 * do nothing, and it will be requested again as soon as
		 * the shadow expires.  But we still need to check here,
		 * because POPF has no interrupt shadow.
		 */
		if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
			kvm_make_request(KVM_REQ_EVENT, vcpu);
5749 5750
	} else
		vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5751 5752

	return r;
5753
}
5754
EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5755

5756
int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5757
{
5758
	unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5759 5760
	int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
					    size, port, &val, 1);
5761
	/* do not return to emulator after return from userspace */
5762
	vcpu->arch.pio.count = 0;
5763 5764
	return ret;
}
5765
EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5766

5767 5768 5769 5770 5771 5772 5773 5774 5775 5776 5777 5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809
static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
{
	unsigned long val;

	/* We should only ever be called with arch.pio.count equal to 1 */
	BUG_ON(vcpu->arch.pio.count != 1);

	/* For size less than 4 we merge, else we zero extend */
	val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
					: 0;

	/*
	 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
	 * the copy and tracing
	 */
	emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
				 vcpu->arch.pio.port, &val, 1);
	kvm_register_write(vcpu, VCPU_REGS_RAX, val);

	return 1;
}

int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size, unsigned short port)
{
	unsigned long val;
	int ret;

	/* For size less than 4 we merge, else we zero extend */
	val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;

	ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
				       &val, 1);
	if (ret) {
		kvm_register_write(vcpu, VCPU_REGS_RAX, val);
		return ret;
	}

	vcpu->arch.complete_userspace_io = complete_fast_pio_in;

	return 0;
}
EXPORT_SYMBOL_GPL(kvm_fast_pio_in);

5810
static int kvmclock_cpu_down_prep(unsigned int cpu)
5811
{
5812
	__this_cpu_write(cpu_tsc_khz, 0);
5813
	return 0;
5814 5815 5816
}

static void tsc_khz_changed(void *data)
5817
{
5818 5819 5820 5821 5822 5823 5824 5825 5826
	struct cpufreq_freqs *freq = data;
	unsigned long khz = 0;

	if (data)
		khz = freq->new;
	else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
		khz = cpufreq_quick_get(raw_smp_processor_id());
	if (!khz)
		khz = tsc_khz;
5827
	__this_cpu_write(cpu_tsc_khz, khz);
5828 5829 5830 5831 5832 5833 5834 5835 5836 5837
}

static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
				     void *data)
{
	struct cpufreq_freqs *freq = data;
	struct kvm *kvm;
	struct kvm_vcpu *vcpu;
	int i, send_ipi = 0;

5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876
	/*
	 * We allow guests to temporarily run on slowing clocks,
	 * provided we notify them after, or to run on accelerating
	 * clocks, provided we notify them before.  Thus time never
	 * goes backwards.
	 *
	 * However, we have a problem.  We can't atomically update
	 * the frequency of a given CPU from this function; it is
	 * merely a notifier, which can be called from any CPU.
	 * Changing the TSC frequency at arbitrary points in time
	 * requires a recomputation of local variables related to
	 * the TSC for each VCPU.  We must flag these local variables
	 * to be updated and be sure the update takes place with the
	 * new frequency before any guests proceed.
	 *
	 * Unfortunately, the combination of hotplug CPU and frequency
	 * change creates an intractable locking scenario; the order
	 * of when these callouts happen is undefined with respect to
	 * CPU hotplug, and they can race with each other.  As such,
	 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
	 * undefined; you can actually have a CPU frequency change take
	 * place in between the computation of X and the setting of the
	 * variable.  To protect against this problem, all updates of
	 * the per_cpu tsc_khz variable are done in an interrupt
	 * protected IPI, and all callers wishing to update the value
	 * must wait for a synchronous IPI to complete (which is trivial
	 * if the caller is on the CPU already).  This establishes the
	 * necessary total order on variable updates.
	 *
	 * Note that because a guest time update may take place
	 * anytime after the setting of the VCPU's request bit, the
	 * correct TSC value must be set before the request.  However,
	 * to ensure the update actually makes it to any guest which
	 * starts running in hardware virtualization between the set
	 * and the acquisition of the spinlock, we must also ping the
	 * CPU after setting the request bit.
	 *
	 */

5877 5878 5879 5880
	if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
		return 0;
	if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
		return 0;
5881 5882

	smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5883

5884
	spin_lock(&kvm_lock);
5885
	list_for_each_entry(kvm, &vm_list, vm_list) {
5886
		kvm_for_each_vcpu(i, vcpu, kvm) {
5887 5888
			if (vcpu->cpu != freq->cpu)
				continue;
Zachary Amsden's avatar
Zachary Amsden committed
5889
			kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5890
			if (vcpu->cpu != smp_processor_id())
5891
				send_ipi = 1;
5892 5893
		}
	}
5894
	spin_unlock(&kvm_lock);
5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908

	if (freq->old < freq->new && send_ipi) {
		/*
		 * We upscale the frequency.  Must make the guest
		 * doesn't see old kvmclock values while running with
		 * the new frequency, otherwise we risk the guest sees
		 * time go backwards.
		 *
		 * In case we update the frequency for another cpu
		 * (which might be in guest context) send an interrupt
		 * to kick the cpu out of guest context.  Next time
		 * guest context is entered kvmclock will be updated,
		 * so the guest will not see stale values.
		 */
5909
		smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5910 5911 5912 5913 5914
	}
	return 0;
}

static struct notifier_block kvmclock_cpufreq_notifier_block = {
5915 5916 5917
	.notifier_call  = kvmclock_cpufreq_notifier
};

5918
static int kvmclock_cpu_online(unsigned int cpu)
5919
{
5920 5921
	tsc_khz_changed(NULL);
	return 0;
5922 5923
}

5924 5925
static void kvm_timer_init(void)
{
Zachary Amsden's avatar
Zachary Amsden committed
5926
	max_tsc_khz = tsc_khz;
5927

5928
	if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
Zachary Amsden's avatar
Zachary Amsden committed
5929 5930
#ifdef CONFIG_CPU_FREQ
		struct cpufreq_policy policy;
5931 5932
		int cpu;

Zachary Amsden's avatar
Zachary Amsden committed
5933
		memset(&policy, 0, sizeof(policy));
5934 5935
		cpu = get_cpu();
		cpufreq_get_policy(&policy, cpu);
Zachary Amsden's avatar
Zachary Amsden committed
5936 5937
		if (policy.cpuinfo.max_freq)
			max_tsc_khz = policy.cpuinfo.max_freq;
5938
		put_cpu();
Zachary Amsden's avatar
Zachary Amsden committed
5939
#endif
5940 5941 5942
		cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
					  CPUFREQ_TRANSITION_NOTIFIER);
	}
Zachary Amsden's avatar
Zachary Amsden committed
5943
	pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5944

5945
	cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
5946
			  kvmclock_cpu_online, kvmclock_cpu_down_prep);
5947 5948
}

5949 5950
static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);

5951
int kvm_is_in_guest(void)
5952
{
5953
	return __this_cpu_read(current_vcpu) != NULL;
5954 5955 5956 5957 5958
}

static int kvm_is_user_mode(void)
{
	int user_mode = 3;
5959

5960 5961
	if (__this_cpu_read(current_vcpu))
		user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5962

5963 5964 5965 5966 5967 5968
	return user_mode != 0;
}

static unsigned long kvm_get_guest_ip(void)
{
	unsigned long ip = 0;
5969

5970 5971
	if (__this_cpu_read(current_vcpu))
		ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5972

5973 5974 5975 5976 5977 5978 5979 5980 5981 5982 5983
	return ip;
}

static struct perf_guest_info_callbacks kvm_guest_cbs = {
	.is_in_guest		= kvm_is_in_guest,
	.is_user_mode		= kvm_is_user_mode,
	.get_guest_ip		= kvm_get_guest_ip,
};

void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
{
5984
	__this_cpu_write(current_vcpu, vcpu);
5985 5986 5987 5988 5989
}
EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);

void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
{
5990
	__this_cpu_write(current_vcpu, NULL);
5991 5992 5993
}
EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);

5994 5995 5996 5997 5998 5999 6000 6001 6002
static void kvm_set_mmio_spte_mask(void)
{
	u64 mask;
	int maxphyaddr = boot_cpu_data.x86_phys_bits;

	/*
	 * Set the reserved bits and the present bit of an paging-structure
	 * entry to generate page fault with PFER.RSV = 1.
	 */
6003
	 /* Mask the reserved physical address bits. */
6004
	mask = rsvd_bits(maxphyaddr, 51);
6005 6006

	/* Set the present bit. */
6007 6008 6009 6010 6011 6012 6013 6014 6015 6016 6017 6018 6019 6020
	mask |= 1ull;

#ifdef CONFIG_X86_64
	/*
	 * If reserved bit is not supported, clear the present bit to disable
	 * mmio page fault.
	 */
	if (maxphyaddr == 52)
		mask &= ~1ull;
#endif

	kvm_mmu_set_mmio_spte_mask(mask);
}

6021 6022 6023
#ifdef CONFIG_X86_64
static void pvclock_gtod_update_fn(struct work_struct *work)
{
6024 6025 6026 6027 6028
	struct kvm *kvm;

	struct kvm_vcpu *vcpu;
	int i;

6029
	spin_lock(&kvm_lock);
6030 6031
	list_for_each_entry(kvm, &vm_list, vm_list)
		kvm_for_each_vcpu(i, vcpu, kvm)
6032
			kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6033
	atomic_set(&kvm_guest_has_master_clock, 0);
6034
	spin_unlock(&kvm_lock);
6035 6036 6037 6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049 6050 6051 6052 6053 6054 6055 6056 6057 6058 6059 6060 6061 6062 6063 6064
}

static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);

/*
 * Notification about pvclock gtod data update.
 */
static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
			       void *priv)
{
	struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
	struct timekeeper *tk = priv;

	update_pvclock_gtod(tk);

	/* disable master clock if host does not trust, or does not
	 * use, TSC clocksource
	 */
	if (gtod->clock.vclock_mode != VCLOCK_TSC &&
	    atomic_read(&kvm_guest_has_master_clock) != 0)
		queue_work(system_long_wq, &pvclock_gtod_work);

	return 0;
}

static struct notifier_block pvclock_gtod_notifier = {
	.notifier_call = pvclock_gtod_notify,
};
#endif

6065
int kvm_arch_init(void *opaque)
6066
{
6067
	int r;
Mathias Krause's avatar
Mathias Krause committed
6068
	struct kvm_x86_ops *ops = opaque;
6069 6070 6071

	if (kvm_x86_ops) {
		printk(KERN_ERR "kvm: already loaded the other module\n");
6072 6073
		r = -EEXIST;
		goto out;
6074 6075 6076 6077
	}

	if (!ops->cpu_has_kvm_support()) {
		printk(KERN_ERR "kvm: no hardware support\n");
6078 6079
		r = -EOPNOTSUPP;
		goto out;
6080 6081 6082
	}
	if (ops->disabled_by_bios()) {
		printk(KERN_ERR "kvm: disabled by bios\n");
6083 6084
		r = -EOPNOTSUPP;
		goto out;
6085 6086
	}

6087 6088 6089 6090 6091 6092 6093
	r = -ENOMEM;
	shared_msrs = alloc_percpu(struct kvm_shared_msrs);
	if (!shared_msrs) {
		printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
		goto out;
	}

6094 6095
	r = kvm_mmu_module_init();
	if (r)
6096
		goto out_free_percpu;
6097

6098
	kvm_set_mmio_spte_mask();
6099

6100
	kvm_x86_ops = ops;
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Paolo Bonzini committed
6101

Sheng Yang's avatar
Sheng Yang committed
6102
	kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6103
			PT_DIRTY_MASK, PT64_NX_MASK, 0,
6104
			PT_PRESENT_MASK, 0);
6105
	kvm_timer_init();
6106

6107 6108
	perf_register_guest_info_callbacks(&kvm_guest_cbs);

6109
	if (boot_cpu_has(X86_FEATURE_XSAVE))
6110 6111
		host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);

6112
	kvm_lapic_init();
6113 6114 6115 6116
#ifdef CONFIG_X86_64
	pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
#endif

6117
	return 0;
6118

6119 6120
out_free_percpu:
	free_percpu(shared_msrs);
6121 6122
out:
	return r;
6123
}
6124

6125 6126
void kvm_arch_exit(void)
{
6127
	kvm_lapic_exit();
6128 6129
	perf_unregister_guest_info_callbacks(&kvm_guest_cbs);

6130 6131 6132
	if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
		cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
					    CPUFREQ_TRANSITION_NOTIFIER);
6133
	cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6134 6135 6136
#ifdef CONFIG_X86_64
	pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
#endif
6137
	kvm_x86_ops = NULL;
6138
	kvm_mmu_module_exit();
6139
	free_percpu(shared_msrs);
6140
}
6141

6142
int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6143 6144
{
	++vcpu->stat.halt_exits;
6145
	if (lapic_in_kernel(vcpu)) {
6146
		vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6147 6148 6149 6150 6151 6152
		return 1;
	} else {
		vcpu->run->exit_reason = KVM_EXIT_HLT;
		return 0;
	}
}
6153 6154 6155 6156
EXPORT_SYMBOL_GPL(kvm_vcpu_halt);

int kvm_emulate_halt(struct kvm_vcpu *vcpu)
{
6157 6158 6159 6160 6161 6162
	int ret = kvm_skip_emulated_instruction(vcpu);
	/*
	 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
	 * KVM_EXIT_DEBUG here.
	 */
	return kvm_vcpu_halt(vcpu) && ret;
6163
}
6164 6165
EXPORT_SYMBOL_GPL(kvm_emulate_halt);

6166
#ifdef CONFIG_X86_64
6167 6168 6169 6170 6171
static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
			        unsigned long clock_type)
{
	struct kvm_clock_pairing clock_pairing;
	struct timespec ts;
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Paolo Bonzini committed
6172
	u64 cycle;
6173 6174 6175 6176 6177 6178 6179 6180 6181 6182 6183 6184 6185 6186 6187 6188 6189 6190 6191 6192
	int ret;

	if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
		return -KVM_EOPNOTSUPP;

	if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
		return -KVM_EOPNOTSUPP;

	clock_pairing.sec = ts.tv_sec;
	clock_pairing.nsec = ts.tv_nsec;
	clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
	clock_pairing.flags = 0;

	ret = 0;
	if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
			    sizeof(struct kvm_clock_pairing)))
		ret = -KVM_EFAULT;

	return ret;
}
6193
#endif
6194

6195 6196 6197 6198 6199 6200 6201
/*
 * kvm_pv_kick_cpu_op:  Kick a vcpu.
 *
 * @apicid - apicid of vcpu to be kicked.
 */
static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
{
6202
	struct kvm_lapic_irq lapic_irq;
6203

6204 6205 6206
	lapic_irq.shorthand = 0;
	lapic_irq.dest_mode = 0;
	lapic_irq.dest_id = apicid;
6207
	lapic_irq.msi_redir_hint = false;
6208

6209
	lapic_irq.delivery_mode = APIC_DM_REMRD;
6210
	kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6211 6212
}

6213 6214 6215 6216 6217 6218
void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
{
	vcpu->arch.apicv_active = false;
	kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
}

6219 6220 6221
int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
{
	unsigned long nr, a0, a1, a2, a3, ret;
6222
	int op_64_bit, r;
6223

6224
	r = kvm_skip_emulated_instruction(vcpu);
6225

6226 6227 6228
	if (kvm_hv_hypercall_enabled(vcpu->kvm))
		return kvm_hv_hypercall(vcpu);

6229 6230 6231 6232 6233
	nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
	a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
	a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
	a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
	a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6234

6235
	trace_kvm_hypercall(nr, a0, a1, a2, a3);
Feng (Eric) Liu's avatar
Feng (Eric) Liu committed
6236

6237 6238
	op_64_bit = is_64_bit_mode(vcpu);
	if (!op_64_bit) {
6239 6240 6241 6242 6243 6244 6245
		nr &= 0xFFFFFFFF;
		a0 &= 0xFFFFFFFF;
		a1 &= 0xFFFFFFFF;
		a2 &= 0xFFFFFFFF;
		a3 &= 0xFFFFFFFF;
	}

6246 6247 6248 6249 6250
	if (kvm_x86_ops->get_cpl(vcpu) != 0) {
		ret = -KVM_EPERM;
		goto out;
	}

6251
	switch (nr) {
Avi Kivity's avatar
Avi Kivity committed
6252 6253 6254
	case KVM_HC_VAPIC_POLL_IRQ:
		ret = 0;
		break;
6255 6256 6257 6258
	case KVM_HC_KICK_CPU:
		kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
		ret = 0;
		break;
6259
#ifdef CONFIG_X86_64
6260 6261 6262
	case KVM_HC_CLOCK_PAIRING:
		ret = kvm_pv_clock_pairing(vcpu, a0, a1);
		break;
6263
#endif
6264 6265 6266 6267
	default:
		ret = -KVM_ENOSYS;
		break;
	}
6268
out:
6269 6270
	if (!op_64_bit)
		ret = (u32)ret;
6271
	kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6272
	++vcpu->stat.hypercalls;
6273
	return r;
6274 6275 6276
}
EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);

6277
static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6278
{
6279
	struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6280
	char instruction[3];
6281
	unsigned long rip = kvm_rip_read(vcpu);
6282 6283 6284

	kvm_x86_ops->patch_hypercall(vcpu, instruction);

6285 6286
	return emulator_write_emulated(ctxt, rip, instruction, 3,
		&ctxt->exception);
6287 6288
}

6289
static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6290
{
6291 6292
	return vcpu->run->request_interrupt_window &&
		likely(!pic_in_kernel(vcpu->kvm));
6293 6294
}

6295
static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6296
{
6297 6298
	struct kvm_run *kvm_run = vcpu->run;

6299
	kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6300
	kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6301
	kvm_run->cr8 = kvm_get_cr8(vcpu);
6302
	kvm_run->apic_base = kvm_get_apic_base(vcpu);
6303 6304
	kvm_run->ready_for_interrupt_injection =
		pic_in_kernel(vcpu->kvm) ||
6305
		kvm_vcpu_ready_for_interrupt_injection(vcpu);
6306 6307
}

6308 6309 6310 6311 6312 6313 6314
static void update_cr8_intercept(struct kvm_vcpu *vcpu)
{
	int max_irr, tpr;

	if (!kvm_x86_ops->update_cr8_intercept)
		return;

6315
	if (!lapic_in_kernel(vcpu))
6316 6317
		return;

6318 6319 6320
	if (vcpu->arch.apicv_active)
		return;

6321 6322 6323 6324
	if (!vcpu->arch.apic->vapic_addr)
		max_irr = kvm_lapic_find_highest_irr(vcpu);
	else
		max_irr = -1;
6325 6326 6327 6328 6329 6330 6331 6332 6333

	if (max_irr != -1)
		max_irr >>= 4;

	tpr = kvm_lapic_get_cr8(vcpu);

	kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
}

6334
static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6335
{
6336 6337
	int r;

6338
	/* try to reinject previous events if any */
6339
	if (vcpu->arch.exception.pending) {
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Avi Kivity committed
6340 6341 6342
		trace_kvm_inj_exception(vcpu->arch.exception.nr,
					vcpu->arch.exception.has_error_code,
					vcpu->arch.exception.error_code);
6343 6344 6345 6346 6347

		if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
			__kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
					     X86_EFLAGS_RF);

6348 6349 6350 6351 6352 6353
		if (vcpu->arch.exception.nr == DB_VECTOR &&
		    (vcpu->arch.dr7 & DR7_GD)) {
			vcpu->arch.dr7 &= ~DR7_GD;
			kvm_update_dr7(vcpu);
		}

6354 6355
		kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
					  vcpu->arch.exception.has_error_code,
6356 6357
					  vcpu->arch.exception.error_code,
					  vcpu->arch.exception.reinject);
6358
		return 0;
6359 6360
	}

6361 6362
	if (vcpu->arch.nmi_injected) {
		kvm_x86_ops->set_nmi(vcpu);
6363
		return 0;
6364 6365 6366
	}

	if (vcpu->arch.interrupt.pending) {
6367
		kvm_x86_ops->set_irq(vcpu);
6368 6369 6370 6371 6372 6373 6374
		return 0;
	}

	if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
		r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
		if (r != 0)
			return r;
6375 6376 6377
	}

	/* try to inject new event if pending */
6378 6379
	if (vcpu->arch.smi_pending && !is_smm(vcpu)) {
		vcpu->arch.smi_pending = false;
6380
		enter_smm(vcpu);
6381
	} else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6382 6383 6384
		--vcpu->arch.nmi_pending;
		vcpu->arch.nmi_injected = true;
		kvm_x86_ops->set_nmi(vcpu);
6385
	} else if (kvm_cpu_has_injectable_intr(vcpu)) {
6386 6387 6388 6389 6390 6391 6392 6393 6394 6395 6396 6397
		/*
		 * Because interrupts can be injected asynchronously, we are
		 * calling check_nested_events again here to avoid a race condition.
		 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
		 * proposal and current concerns.  Perhaps we should be setting
		 * KVM_REQ_EVENT only on certain events and not unconditionally?
		 */
		if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
			r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
			if (r != 0)
				return r;
		}
6398
		if (kvm_x86_ops->interrupt_allowed(vcpu)) {
6399 6400 6401
			kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
					    false);
			kvm_x86_ops->set_irq(vcpu);
6402 6403
		}
	}
6404

6405
	return 0;
6406 6407
}

Avi Kivity's avatar
Avi Kivity committed
6408 6409 6410 6411 6412 6413 6414 6415 6416 6417 6418 6419 6420 6421 6422 6423 6424
static void process_nmi(struct kvm_vcpu *vcpu)
{
	unsigned limit = 2;

	/*
	 * x86 is limited to one NMI running, and one NMI pending after it.
	 * If an NMI is already in progress, limit further NMIs to just one.
	 * Otherwise, allow two (and we'll inject the first one immediately).
	 */
	if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
		limit = 1;

	vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
	vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
	kvm_make_request(KVM_REQ_EVENT, vcpu);
}

6425 6426 6427
#define put_smstate(type, buf, offset, val)			  \
	*(type *)((buf) + (offset) - 0x7e00) = val

6428
static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
6429 6430 6431 6432 6433 6434 6435 6436 6437 6438 6439 6440 6441
{
	u32 flags = 0;
	flags |= seg->g       << 23;
	flags |= seg->db      << 22;
	flags |= seg->l       << 21;
	flags |= seg->avl     << 20;
	flags |= seg->present << 15;
	flags |= seg->dpl     << 13;
	flags |= seg->s       << 12;
	flags |= seg->type    << 8;
	return flags;
}

6442
static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
6443 6444 6445 6446 6447 6448 6449 6450 6451 6452 6453 6454 6455 6456
{
	struct kvm_segment seg;
	int offset;

	kvm_get_segment(vcpu, &seg, n);
	put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);

	if (n < 3)
		offset = 0x7f84 + n * 12;
	else
		offset = 0x7f2c + (n - 3) * 12;

	put_smstate(u32, buf, offset + 8, seg.base);
	put_smstate(u32, buf, offset + 4, seg.limit);
6457
	put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
6458 6459
}

6460
#ifdef CONFIG_X86_64
6461
static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
6462 6463 6464 6465 6466 6467 6468 6469
{
	struct kvm_segment seg;
	int offset;
	u16 flags;

	kvm_get_segment(vcpu, &seg, n);
	offset = 0x7e00 + n * 16;

6470
	flags = enter_smm_get_segment_flags(&seg) >> 8;
6471 6472 6473 6474 6475
	put_smstate(u16, buf, offset, seg.selector);
	put_smstate(u16, buf, offset + 2, flags);
	put_smstate(u32, buf, offset + 4, seg.limit);
	put_smstate(u64, buf, offset + 8, seg.base);
}
6476
#endif
6477

6478
static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
6479 6480 6481 6482 6483 6484 6485 6486 6487 6488 6489 6490 6491 6492 6493 6494 6495 6496 6497 6498 6499 6500 6501
{
	struct desc_ptr dt;
	struct kvm_segment seg;
	unsigned long val;
	int i;

	put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
	put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
	put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
	put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));

	for (i = 0; i < 8; i++)
		put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));

	kvm_get_dr(vcpu, 6, &val);
	put_smstate(u32, buf, 0x7fcc, (u32)val);
	kvm_get_dr(vcpu, 7, &val);
	put_smstate(u32, buf, 0x7fc8, (u32)val);

	kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
	put_smstate(u32, buf, 0x7fc4, seg.selector);
	put_smstate(u32, buf, 0x7f64, seg.base);
	put_smstate(u32, buf, 0x7f60, seg.limit);
6502
	put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
6503 6504 6505 6506 6507

	kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
	put_smstate(u32, buf, 0x7fc0, seg.selector);
	put_smstate(u32, buf, 0x7f80, seg.base);
	put_smstate(u32, buf, 0x7f7c, seg.limit);
6508
	put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
6509 6510 6511 6512 6513 6514 6515 6516 6517 6518

	kvm_x86_ops->get_gdt(vcpu, &dt);
	put_smstate(u32, buf, 0x7f74, dt.address);
	put_smstate(u32, buf, 0x7f70, dt.size);

	kvm_x86_ops->get_idt(vcpu, &dt);
	put_smstate(u32, buf, 0x7f58, dt.address);
	put_smstate(u32, buf, 0x7f54, dt.size);

	for (i = 0; i < 6; i++)
6519
		enter_smm_save_seg_32(vcpu, buf, i);
6520 6521 6522 6523 6524 6525 6526 6527

	put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));

	/* revision id */
	put_smstate(u32, buf, 0x7efc, 0x00020000);
	put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
}

6528
static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6529 6530 6531 6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546 6547 6548 6549 6550 6551 6552 6553 6554 6555 6556 6557 6558 6559
{
#ifdef CONFIG_X86_64
	struct desc_ptr dt;
	struct kvm_segment seg;
	unsigned long val;
	int i;

	for (i = 0; i < 16; i++)
		put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));

	put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
	put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));

	kvm_get_dr(vcpu, 6, &val);
	put_smstate(u64, buf, 0x7f68, val);
	kvm_get_dr(vcpu, 7, &val);
	put_smstate(u64, buf, 0x7f60, val);

	put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
	put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
	put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));

	put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);

	/* revision id */
	put_smstate(u32, buf, 0x7efc, 0x00020064);

	put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);

	kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
	put_smstate(u16, buf, 0x7e90, seg.selector);
6560
	put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
6561 6562 6563 6564 6565 6566 6567 6568 6569
	put_smstate(u32, buf, 0x7e94, seg.limit);
	put_smstate(u64, buf, 0x7e98, seg.base);

	kvm_x86_ops->get_idt(vcpu, &dt);
	put_smstate(u32, buf, 0x7e84, dt.size);
	put_smstate(u64, buf, 0x7e88, dt.address);

	kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
	put_smstate(u16, buf, 0x7e70, seg.selector);
6570
	put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
6571 6572 6573 6574 6575 6576 6577 6578
	put_smstate(u32, buf, 0x7e74, seg.limit);
	put_smstate(u64, buf, 0x7e78, seg.base);

	kvm_x86_ops->get_gdt(vcpu, &dt);
	put_smstate(u32, buf, 0x7e64, dt.size);
	put_smstate(u64, buf, 0x7e68, dt.address);

	for (i = 0; i < 6; i++)
6579
		enter_smm_save_seg_64(vcpu, buf, i);
6580 6581 6582 6583 6584
#else
	WARN_ON_ONCE(1);
#endif
}

6585
static void enter_smm(struct kvm_vcpu *vcpu)
6586
{
6587
	struct kvm_segment cs, ds;
6588
	struct desc_ptr dt;
6589 6590 6591 6592 6593 6594 6595
	char buf[512];
	u32 cr0;

	trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
	vcpu->arch.hflags |= HF_SMM_MASK;
	memset(buf, 0, 512);
	if (guest_cpuid_has_longmode(vcpu))
6596
		enter_smm_save_state_64(vcpu, buf);
6597
	else
6598
		enter_smm_save_state_32(vcpu, buf);
6599

6600
	kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6601 6602 6603 6604 6605 6606 6607 6608 6609 6610 6611 6612 6613 6614 6615

	if (kvm_x86_ops->get_nmi_mask(vcpu))
		vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
	else
		kvm_x86_ops->set_nmi_mask(vcpu, true);

	kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
	kvm_rip_write(vcpu, 0x8000);

	cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
	kvm_x86_ops->set_cr0(vcpu, cr0);
	vcpu->arch.cr0 = cr0;

	kvm_x86_ops->set_cr4(vcpu, 0);

6616 6617 6618 6619
	/* Undocumented: IDT limit is set to zero on entry to SMM.  */
	dt.address = dt.size = 0;
	kvm_x86_ops->set_idt(vcpu, &dt);

6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650 6651
	__kvm_set_dr(vcpu, 7, DR7_FIXED_1);

	cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
	cs.base = vcpu->arch.smbase;

	ds.selector = 0;
	ds.base = 0;

	cs.limit    = ds.limit = 0xffffffff;
	cs.type     = ds.type = 0x3;
	cs.dpl      = ds.dpl = 0;
	cs.db       = ds.db = 0;
	cs.s        = ds.s = 1;
	cs.l        = ds.l = 0;
	cs.g        = ds.g = 1;
	cs.avl      = ds.avl = 0;
	cs.present  = ds.present = 1;
	cs.unusable = ds.unusable = 0;
	cs.padding  = ds.padding = 0;

	kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
	kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
	kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
	kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
	kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
	kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);

	if (guest_cpuid_has_longmode(vcpu))
		kvm_x86_ops->set_efer(vcpu, 0);

	kvm_update_cpuid(vcpu);
	kvm_mmu_reset_context(vcpu);
6652 6653
}

6654
static void process_smi(struct kvm_vcpu *vcpu)
6655 6656 6657 6658 6659
{
	vcpu->arch.smi_pending = true;
	kvm_make_request(KVM_REQ_EVENT, vcpu);
}

6660 6661 6662 6663 6664
void kvm_make_scan_ioapic_request(struct kvm *kvm)
{
	kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
}

6665
static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6666
{
6667 6668
	u64 eoi_exit_bitmap[4];

6669 6670
	if (!kvm_apic_hw_enabled(vcpu->arch.apic))
		return;
6671

6672
	bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
6673

6674
	if (irqchip_split(vcpu->kvm))
6675
		kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
6676
	else {
6677
		if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
6678
			kvm_x86_ops->sync_pir_to_irr(vcpu);
6679
		kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
6680
	}
6681 6682 6683
	bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
		  vcpu_to_synic(vcpu)->vec_bitmap, 256);
	kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
6684 6685
}

6686 6687 6688 6689 6690 6691
static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
{
	++vcpu->stat.tlb_flush;
	kvm_x86_ops->tlb_flush(vcpu);
}

6692 6693
void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
{
6694 6695
	struct page *page = NULL;

6696
	if (!lapic_in_kernel(vcpu))
6697 6698
		return;

6699 6700 6701
	if (!kvm_x86_ops->set_apic_access_page_addr)
		return;

6702
	page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6703 6704
	if (is_error_page(page))
		return;
6705 6706 6707 6708 6709 6710 6711
	kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));

	/*
	 * Do not pin apic access page in memory, the MMU notifier
	 * will call us again if it is migrated or swapped out.
	 */
	put_page(page);
6712 6713 6714
}
EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);

6715 6716 6717
void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
					   unsigned long address)
{
6718 6719 6720 6721 6722 6723
	/*
	 * The physical address of apic access page is stored in the VMCS.
	 * Update it when it becomes invalid.
	 */
	if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
		kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6724 6725
}

6726
/*
6727
 * Returns 1 to let vcpu_run() continue the guest execution loop without
6728 6729 6730
 * exiting to the userspace.  Otherwise, the value will be returned to the
 * userspace.
 */
6731
static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6732 6733
{
	int r;
6734 6735 6736 6737
	bool req_int_win =
		dm_request_for_irq_injection(vcpu) &&
		kvm_cpu_accept_dm_intr(vcpu);

6738
	bool req_immediate_exit = false;
6739

6740
	if (vcpu->requests) {
6741
		if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6742
			kvm_mmu_unload(vcpu);
6743
		if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
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Marcelo Tosatti committed
6744
			__kvm_migrate_timers(vcpu);
6745 6746
		if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
			kvm_gen_update_masterclock(vcpu->kvm);
6747 6748
		if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
			kvm_gen_kvmclock_update(vcpu);
6749 6750
		if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
			r = kvm_guest_time_update(vcpu);
6751 6752 6753
			if (unlikely(r))
				goto out;
		}
6754
		if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6755
			kvm_mmu_sync_roots(vcpu);
6756
		if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6757
			kvm_vcpu_flush_tlb(vcpu);
6758
		if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6759
			vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
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6760 6761 6762
			r = 0;
			goto out;
		}
6763
		if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6764
			vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6765 6766 6767
			r = 0;
			goto out;
		}
6768 6769 6770 6771 6772 6773
		if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
			/* Page is swapped out. Do synthetic halt */
			vcpu->arch.apf.halted = true;
			r = 1;
			goto out;
		}
6774 6775
		if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
			record_steal_time(vcpu);
6776 6777
		if (kvm_check_request(KVM_REQ_SMI, vcpu))
			process_smi(vcpu);
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6778 6779
		if (kvm_check_request(KVM_REQ_NMI, vcpu))
			process_nmi(vcpu);
6780
		if (kvm_check_request(KVM_REQ_PMU, vcpu))
6781
			kvm_pmu_handle_event(vcpu);
6782
		if (kvm_check_request(KVM_REQ_PMI, vcpu))
6783
			kvm_pmu_deliver_pmi(vcpu);
6784 6785 6786
		if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
			BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
			if (test_bit(vcpu->arch.pending_ioapic_eoi,
6787
				     vcpu->arch.ioapic_handled_vectors)) {
6788 6789 6790 6791 6792 6793 6794
				vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
				vcpu->run->eoi.vector =
						vcpu->arch.pending_ioapic_eoi;
				r = 0;
				goto out;
			}
		}
6795 6796
		if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
			vcpu_scan_ioapic(vcpu);
6797 6798
		if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
			kvm_vcpu_reload_apic_access_page(vcpu);
6799 6800 6801 6802 6803 6804
		if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
			vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
			vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
			r = 0;
			goto out;
		}
6805 6806 6807 6808 6809 6810
		if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
			vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
			vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
			r = 0;
			goto out;
		}
6811 6812 6813 6814 6815 6816
		if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
			vcpu->run->exit_reason = KVM_EXIT_HYPERV;
			vcpu->run->hyperv = vcpu->arch.hyperv.exit;
			r = 0;
			goto out;
		}
6817 6818 6819 6820 6821 6822

		/*
		 * KVM_REQ_HV_STIMER has to be processed after
		 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
		 * depend on the guest clock being up-to-date
		 */
6823 6824
		if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
			kvm_hv_process_stimers(vcpu);
6825
	}
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6826

6827
	if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6828
		++vcpu->stat.req_event;
6829 6830 6831 6832 6833 6834
		kvm_apic_accept_events(vcpu);
		if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
			r = 1;
			goto out;
		}

6835 6836
		if (inject_pending_event(vcpu, req_int_win) != 0)
			req_immediate_exit = true;
6837
		else {
6838 6839 6840 6841 6842 6843 6844 6845 6846 6847 6848
			/* Enable NMI/IRQ window open exits if needed.
			 *
			 * SMIs have two cases: 1) they can be nested, and
			 * then there is nothing to do here because RSM will
			 * cause a vmexit anyway; 2) or the SMI can be pending
			 * because inject_pending_event has completed the
			 * injection of an IRQ or NMI from the previous vmexit,
			 * and then we request an immediate exit to inject the SMI.
			 */
			if (vcpu->arch.smi_pending && !is_smm(vcpu))
				req_immediate_exit = true;
6849 6850 6851 6852 6853
			if (vcpu->arch.nmi_pending)
				kvm_x86_ops->enable_nmi_window(vcpu);
			if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
				kvm_x86_ops->enable_irq_window(vcpu);
		}
6854 6855 6856 6857 6858 6859 6860

		if (kvm_lapic_enabled(vcpu)) {
			update_cr8_intercept(vcpu);
			kvm_lapic_sync_to_vapic(vcpu);
		}
	}

6861 6862
	r = kvm_mmu_reload(vcpu);
	if (unlikely(r)) {
6863
		goto cancel_injection;
6864 6865
	}

6866 6867 6868
	preempt_disable();

	kvm_x86_ops->prepare_guest_switch(vcpu);
6869
	kvm_load_guest_fpu(vcpu);
6870 6871 6872 6873 6874 6875 6876

	/*
	 * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
	 * IPI are then delayed after guest entry, which ensures that they
	 * result in virtual interrupt delivery.
	 */
	local_irq_disable();
6877 6878
	vcpu->mode = IN_GUEST_MODE;

6879 6880
	srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);

6881
	/*
6882 6883 6884 6885 6886 6887 6888 6889 6890 6891
	 * 1) We should set ->mode before checking ->requests.  Please see
	 * the comment in kvm_make_all_cpus_request.
	 *
	 * 2) For APICv, we should set ->mode before checking PIR.ON.  This
	 * pairs with the memory barrier implicit in pi_test_and_set_on
	 * (see vmx_deliver_posted_interrupt).
	 *
	 * 3) This also orders the write to mode from any reads to the page
	 * tables done while the VCPU is running.  Please see the comment
	 * in kvm_flush_remote_tlbs.
6892
	 */
6893
	smp_mb__after_srcu_read_unlock();
6894

6895 6896 6897 6898 6899 6900 6901 6902
	/*
	 * This handles the case where a posted interrupt was
	 * notified with kvm_vcpu_kick.
	 */
	if (kvm_lapic_enabled(vcpu)) {
		if (kvm_x86_ops->sync_pir_to_irr && vcpu->arch.apicv_active)
			kvm_x86_ops->sync_pir_to_irr(vcpu);
	}
6903

6904
	if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
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6905
	    || need_resched() || signal_pending(current)) {
6906
		vcpu->mode = OUTSIDE_GUEST_MODE;
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6907
		smp_wmb();
6908 6909
		local_irq_enable();
		preempt_enable();
6910
		vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6911
		r = 1;
6912
		goto cancel_injection;
6913 6914
	}

6915 6916
	kvm_load_guest_xcr0(vcpu);

6917 6918
	if (req_immediate_exit) {
		kvm_make_request(KVM_REQ_EVENT, vcpu);
6919
		smp_send_reschedule(vcpu->cpu);
6920
	}
6921

6922 6923
	trace_kvm_entry(vcpu->vcpu_id);
	wait_lapic_expire(vcpu);
6924
	guest_enter_irqoff();
6925

6926 6927 6928 6929 6930 6931
	if (unlikely(vcpu->arch.switch_db_regs)) {
		set_debugreg(0, 7);
		set_debugreg(vcpu->arch.eff_db[0], 0);
		set_debugreg(vcpu->arch.eff_db[1], 1);
		set_debugreg(vcpu->arch.eff_db[2], 2);
		set_debugreg(vcpu->arch.eff_db[3], 3);
6932
		set_debugreg(vcpu->arch.dr6, 6);
6933
		vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6934
	}
6935

6936
	kvm_x86_ops->run(vcpu);
6937

6938 6939 6940 6941 6942 6943 6944 6945 6946
	/*
	 * Do this here before restoring debug registers on the host.  And
	 * since we do this before handling the vmexit, a DR access vmexit
	 * can (a) read the correct value of the debug registers, (b) set
	 * KVM_DEBUGREG_WONT_EXIT again.
	 */
	if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
		WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
		kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6947 6948 6949 6950
		kvm_update_dr0123(vcpu);
		kvm_update_dr6(vcpu);
		kvm_update_dr7(vcpu);
		vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6951 6952
	}

6953 6954 6955 6956 6957 6958 6959
	/*
	 * If the guest has used debug registers, at least dr7
	 * will be disabled while returning to the host.
	 * If we don't have active breakpoints in the host, we don't
	 * care about the messed up debug address registers. But if
	 * we have some of them active, restore the old state.
	 */
6960
	if (hw_breakpoint_active())
6961
		hw_breakpoint_restore();
6962

6963
	vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
6964

6965
	vcpu->mode = OUTSIDE_GUEST_MODE;
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6966
	smp_wmb();
6967

6968 6969
	kvm_put_guest_xcr0(vcpu);

6970
	kvm_x86_ops->handle_external_intr(vcpu);
6971 6972 6973

	++vcpu->stat.exits;

6974
	guest_exit_irqoff();
6975

6976
	local_irq_enable();
6977 6978
	preempt_enable();

6979
	vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6980

6981 6982 6983 6984
	/*
	 * Profile KVM exit RIPs:
	 */
	if (unlikely(prof_on == KVM_PROFILING)) {
6985 6986
		unsigned long rip = kvm_rip_read(vcpu);
		profile_hit(KVM_PROFILING, (void *)rip);
6987 6988
	}

6989 6990
	if (unlikely(vcpu->arch.tsc_always_catchup))
		kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6991

6992 6993
	if (vcpu->arch.apic_attention)
		kvm_lapic_sync_from_vapic(vcpu);
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6994

6995
	r = kvm_x86_ops->handle_exit(vcpu);
6996 6997 6998 6999
	return r;

cancel_injection:
	kvm_x86_ops->cancel_injection(vcpu);
7000 7001
	if (unlikely(vcpu->arch.apic_attention))
		kvm_lapic_sync_from_vapic(vcpu);
7002 7003 7004
out:
	return r;
}
7005

7006 7007
static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
{
7008 7009
	if (!kvm_arch_vcpu_runnable(vcpu) &&
	    (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7010 7011 7012
		srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
		kvm_vcpu_block(vcpu);
		vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7013 7014 7015 7016

		if (kvm_x86_ops->post_block)
			kvm_x86_ops->post_block(vcpu);

7017 7018 7019
		if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
			return 1;
	}
7020 7021 7022 7023 7024 7025 7026 7027 7028 7029 7030 7031 7032 7033 7034 7035 7036 7037

	kvm_apic_accept_events(vcpu);
	switch(vcpu->arch.mp_state) {
	case KVM_MP_STATE_HALTED:
		vcpu->arch.pv.pv_unhalted = false;
		vcpu->arch.mp_state =
			KVM_MP_STATE_RUNNABLE;
	case KVM_MP_STATE_RUNNABLE:
		vcpu->arch.apf.halted = false;
		break;
	case KVM_MP_STATE_INIT_RECEIVED:
		break;
	default:
		return -EINTR;
		break;
	}
	return 1;
}
7038

7039 7040
static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
{
7041 7042 7043
	if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
		kvm_x86_ops->check_nested_events(vcpu, false);

7044 7045 7046 7047
	return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
		!vcpu->arch.apf.halted);
}

7048
static int vcpu_run(struct kvm_vcpu *vcpu)
7049 7050
{
	int r;
7051
	struct kvm *kvm = vcpu->kvm;
7052

7053
	vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7054

7055
	for (;;) {
7056
		if (kvm_vcpu_running(vcpu)) {
7057
			r = vcpu_enter_guest(vcpu);
7058
		} else {
7059
			r = vcpu_block(kvm, vcpu);
7060 7061
		}

7062 7063 7064 7065 7066 7067 7068
		if (r <= 0)
			break;

		clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
		if (kvm_cpu_has_pending_timer(vcpu))
			kvm_inject_pending_timer_irqs(vcpu);

7069 7070
		if (dm_request_for_irq_injection(vcpu) &&
			kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7071 7072
			r = 0;
			vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7073
			++vcpu->stat.request_irq_exits;
7074
			break;
7075
		}
7076 7077 7078

		kvm_check_async_pf_completion(vcpu);

7079 7080
		if (signal_pending(current)) {
			r = -EINTR;
7081
			vcpu->run->exit_reason = KVM_EXIT_INTR;
7082
			++vcpu->stat.signal_exits;
7083
			break;
7084 7085
		}
		if (need_resched()) {
7086
			srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7087
			cond_resched();
7088
			vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7089
		}
7090 7091
	}

7092
	srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7093 7094 7095 7096

	return r;
}

7097 7098 7099 7100 7101 7102 7103 7104 7105 7106 7107 7108 7109 7110 7111 7112 7113 7114
static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
{
	int r;
	vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
	r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
	srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
	if (r != EMULATE_DONE)
		return 0;
	return 1;
}

static int complete_emulated_pio(struct kvm_vcpu *vcpu)
{
	BUG_ON(!vcpu->arch.pio.count);

	return complete_emulated_io(vcpu);
}

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7115 7116 7117 7118 7119
/*
 * Implements the following, as a state machine:
 *
 * read:
 *   for each fragment
7120 7121 7122 7123
 *     for each mmio piece in the fragment
 *       write gpa, len
 *       exit
 *       copy data
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7124 7125 7126 7127
 *   execute insn
 *
 * write:
 *   for each fragment
7128 7129 7130 7131
 *     for each mmio piece in the fragment
 *       write gpa, len
 *       copy data
 *       exit
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7132
 */
7133
static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7134 7135
{
	struct kvm_run *run = vcpu->run;
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7136
	struct kvm_mmio_fragment *frag;
7137
	unsigned len;
7138

7139
	BUG_ON(!vcpu->mmio_needed);
7140

7141
	/* Complete previous fragment */
7142 7143
	frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
	len = min(8u, frag->len);
7144
	if (!vcpu->mmio_is_write)
7145 7146 7147 7148 7149 7150 7151 7152 7153 7154 7155 7156 7157
		memcpy(frag->data, run->mmio.data, len);

	if (frag->len <= 8) {
		/* Switch to the next fragment. */
		frag++;
		vcpu->mmio_cur_fragment++;
	} else {
		/* Go forward to the next mmio piece. */
		frag->data += len;
		frag->gpa += len;
		frag->len -= len;
	}

7158
	if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7159
		vcpu->mmio_needed = 0;
7160 7161

		/* FIXME: return into emulator if single-stepping.  */
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Avi Kivity committed
7162
		if (vcpu->mmio_is_write)
7163 7164 7165 7166
			return 1;
		vcpu->mmio_read_completed = 1;
		return complete_emulated_io(vcpu);
	}
7167

7168 7169 7170
	run->exit_reason = KVM_EXIT_MMIO;
	run->mmio.phys_addr = frag->gpa;
	if (vcpu->mmio_is_write)
7171 7172
		memcpy(run->mmio.data, frag->data, min(8u, frag->len));
	run->mmio.len = min(8u, frag->len);
7173 7174 7175
	run->mmio.is_write = vcpu->mmio_is_write;
	vcpu->arch.complete_userspace_io = complete_emulated_mmio;
	return 0;
7176 7177
}

7178

7179 7180
int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
{
7181
	struct fpu *fpu = &current->thread.fpu;
7182 7183 7184
	int r;
	sigset_t sigsaved;

7185
	fpu__activate_curr(fpu);
7186

7187 7188 7189
	if (vcpu->sigset_active)
		sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);

7190
	if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7191
		kvm_vcpu_block(vcpu);
7192
		kvm_apic_accept_events(vcpu);
7193
		clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
7194 7195
		r = -EAGAIN;
		goto out;
7196 7197 7198
	}

	/* re-sync apic's tpr */
7199
	if (!lapic_in_kernel(vcpu)) {
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7200 7201 7202 7203 7204
		if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
			r = -EINVAL;
			goto out;
		}
	}
7205

7206 7207 7208 7209 7210 7211 7212 7213
	if (unlikely(vcpu->arch.complete_userspace_io)) {
		int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
		vcpu->arch.complete_userspace_io = NULL;
		r = cui(vcpu);
		if (r <= 0)
			goto out;
	} else
		WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7214

7215 7216 7217 7218
	if (kvm_run->immediate_exit)
		r = -EINTR;
	else
		r = vcpu_run(vcpu);
7219 7220

out:
7221
	post_kvm_run_save(vcpu);
7222 7223 7224 7225 7226 7227 7228 7229
	if (vcpu->sigset_active)
		sigprocmask(SIG_SETMASK, &sigsaved, NULL);

	return r;
}

int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
7230 7231 7232 7233
	if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
		/*
		 * We are here if userspace calls get_regs() in the middle of
		 * instruction emulation. Registers state needs to be copied
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7234
		 * back from emulation context to vcpu. Userspace shouldn't do
7235 7236 7237
		 * that usually, but some bad designed PV devices (vmware
		 * backdoor interface) need this to work
		 */
7238
		emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7239 7240
		vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
	}
7241 7242 7243 7244 7245 7246 7247 7248
	regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
	regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
	regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
	regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
	regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
	regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
	regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
	regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7249
#ifdef CONFIG_X86_64
7250 7251 7252 7253 7254 7255 7256 7257
	regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
	regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
	regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
	regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
	regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
	regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
	regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
	regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7258 7259
#endif

7260
	regs->rip = kvm_rip_read(vcpu);
7261
	regs->rflags = kvm_get_rflags(vcpu);
7262 7263 7264 7265 7266 7267

	return 0;
}

int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
7268 7269 7270
	vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
	vcpu->arch.emulate_regs_need_sync_to_vcpu = false;

7271 7272 7273 7274 7275 7276 7277 7278
	kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
	kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
	kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
	kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
	kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
	kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
	kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
	kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7279
#ifdef CONFIG_X86_64
7280 7281 7282 7283 7284 7285 7286 7287
	kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
	kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
	kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
	kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
	kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
	kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
	kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
	kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7288 7289
#endif

7290
	kvm_rip_write(vcpu, regs->rip);
7291
	kvm_set_rflags(vcpu, regs->rflags);
7292

7293 7294
	vcpu->arch.exception.pending = false;

7295 7296
	kvm_make_request(KVM_REQ_EVENT, vcpu);

7297 7298 7299 7300 7301 7302 7303
	return 0;
}

void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
{
	struct kvm_segment cs;

7304
	kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7305 7306 7307 7308 7309 7310 7311 7312
	*db = cs.db;
	*l = cs.l;
}
EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);

int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
				  struct kvm_sregs *sregs)
{
7313
	struct desc_ptr dt;
7314

7315 7316 7317 7318 7319 7320
	kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
	kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
	kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
	kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
	kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
	kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7321

7322 7323
	kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
	kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7324 7325

	kvm_x86_ops->get_idt(vcpu, &dt);
7326 7327
	sregs->idt.limit = dt.size;
	sregs->idt.base = dt.address;
7328
	kvm_x86_ops->get_gdt(vcpu, &dt);
7329 7330
	sregs->gdt.limit = dt.size;
	sregs->gdt.base = dt.address;
7331

7332
	sregs->cr0 = kvm_read_cr0(vcpu);
7333
	sregs->cr2 = vcpu->arch.cr2;
7334
	sregs->cr3 = kvm_read_cr3(vcpu);
7335
	sregs->cr4 = kvm_read_cr4(vcpu);
7336
	sregs->cr8 = kvm_get_cr8(vcpu);
7337
	sregs->efer = vcpu->arch.efer;
7338 7339
	sregs->apic_base = kvm_get_apic_base(vcpu);

7340
	memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
7341

7342
	if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
7343 7344
		set_bit(vcpu->arch.interrupt.nr,
			(unsigned long *)sregs->interrupt_bitmap);
7345

7346 7347 7348
	return 0;
}

7349 7350 7351
int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
				    struct kvm_mp_state *mp_state)
{
7352
	kvm_apic_accept_events(vcpu);
7353 7354 7355 7356 7357 7358
	if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
					vcpu->arch.pv.pv_unhalted)
		mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
	else
		mp_state->mp_state = vcpu->arch.mp_state;

7359 7360 7361 7362 7363 7364
	return 0;
}

int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
				    struct kvm_mp_state *mp_state)
{
7365
	if (!lapic_in_kernel(vcpu) &&
7366 7367 7368
	    mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
		return -EINVAL;

7369 7370 7371 7372 7373 7374
	/* INITs are latched while in SMM */
	if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
	    (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
	     mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
		return -EINVAL;

7375 7376 7377 7378 7379
	if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
		vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
		set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
	} else
		vcpu->arch.mp_state = mp_state->mp_state;
7380
	kvm_make_request(KVM_REQ_EVENT, vcpu);
7381 7382 7383
	return 0;
}

7384 7385
int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
		    int reason, bool has_error_code, u32 error_code)
7386
{
7387
	struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
7388
	int ret;
7389

7390
	init_emulate_ctxt(vcpu);
7391

7392
	ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
7393
				   has_error_code, error_code);
7394 7395

	if (ret)
7396
		return EMULATE_FAIL;
7397

7398 7399
	kvm_rip_write(vcpu, ctxt->eip);
	kvm_set_rflags(vcpu, ctxt->eflags);
7400
	kvm_make_request(KVM_REQ_EVENT, vcpu);
7401
	return EMULATE_DONE;
7402 7403 7404
}
EXPORT_SYMBOL_GPL(kvm_task_switch);

7405 7406 7407
int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
				  struct kvm_sregs *sregs)
{
7408
	struct msr_data apic_base_msr;
7409
	int mmu_reset_needed = 0;
7410
	int pending_vec, max_bits, idx;
7411
	struct desc_ptr dt;
7412

7413 7414 7415
	if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
		return -EINVAL;

7416 7417
	dt.size = sregs->idt.limit;
	dt.address = sregs->idt.base;
7418
	kvm_x86_ops->set_idt(vcpu, &dt);
7419 7420
	dt.size = sregs->gdt.limit;
	dt.address = sregs->gdt.base;
7421 7422
	kvm_x86_ops->set_gdt(vcpu, &dt);

7423
	vcpu->arch.cr2 = sregs->cr2;
7424
	mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
7425
	vcpu->arch.cr3 = sregs->cr3;
7426
	__set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
7427

7428
	kvm_set_cr8(vcpu, sregs->cr8);
7429

7430
	mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
7431
	kvm_x86_ops->set_efer(vcpu, sregs->efer);
7432 7433 7434
	apic_base_msr.data = sregs->apic_base;
	apic_base_msr.host_initiated = true;
	kvm_set_apic_base(vcpu, &apic_base_msr);
7435

7436
	mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
7437
	kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
7438
	vcpu->arch.cr0 = sregs->cr0;
7439

7440
	mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
7441
	kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
7442
	if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
7443
		kvm_update_cpuid(vcpu);
7444 7445

	idx = srcu_read_lock(&vcpu->kvm->srcu);
7446
	if (!is_long_mode(vcpu) && is_pae(vcpu)) {
7447
		load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
7448 7449
		mmu_reset_needed = 1;
	}
7450
	srcu_read_unlock(&vcpu->kvm->srcu, idx);
7451 7452 7453 7454

	if (mmu_reset_needed)
		kvm_mmu_reset_context(vcpu);

7455
	max_bits = KVM_NR_INTERRUPTS;
7456 7457 7458
	pending_vec = find_first_bit(
		(const unsigned long *)sregs->interrupt_bitmap, max_bits);
	if (pending_vec < max_bits) {
7459
		kvm_queue_interrupt(vcpu, pending_vec, false);
7460
		pr_debug("Set back pending irq %d\n", pending_vec);
7461 7462
	}

7463 7464 7465 7466 7467 7468
	kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
	kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
	kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
	kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
	kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
	kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7469

7470 7471
	kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
	kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7472

7473 7474
	update_cr8_intercept(vcpu);

7475
	/* Older userspace won't unhalt the vcpu on reset. */
7476
	if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
7477
	    sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
7478
	    !is_protmode(vcpu))
7479 7480
		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;

7481 7482
	kvm_make_request(KVM_REQ_EVENT, vcpu);

7483 7484 7485
	return 0;
}

Jan Kiszka's avatar
Jan Kiszka committed
7486 7487
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
					struct kvm_guest_debug *dbg)
7488
{
7489
	unsigned long rflags;
7490
	int i, r;
7491

7492 7493 7494
	if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
		r = -EBUSY;
		if (vcpu->arch.exception.pending)
7495
			goto out;
7496 7497 7498 7499 7500 7501
		if (dbg->control & KVM_GUESTDBG_INJECT_DB)
			kvm_queue_exception(vcpu, DB_VECTOR);
		else
			kvm_queue_exception(vcpu, BP_VECTOR);
	}

7502 7503 7504 7505 7506
	/*
	 * Read rflags as long as potentially injected trace flags are still
	 * filtered out.
	 */
	rflags = kvm_get_rflags(vcpu);
7507 7508 7509 7510 7511 7512

	vcpu->guest_debug = dbg->control;
	if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
		vcpu->guest_debug = 0;

	if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
7513 7514
		for (i = 0; i < KVM_NR_DB_REGS; ++i)
			vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
7515
		vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
7516 7517 7518 7519
	} else {
		for (i = 0; i < KVM_NR_DB_REGS; i++)
			vcpu->arch.eff_db[i] = vcpu->arch.db[i];
	}
7520
	kvm_update_dr7(vcpu);
7521

Jan Kiszka's avatar
Jan Kiszka committed
7522 7523 7524
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
		vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
			get_segment_base(vcpu, VCPU_SREG_CS);
7525

7526 7527 7528 7529 7530
	/*
	 * Trigger an rflags update that will inject or remove the trace
	 * flags.
	 */
	kvm_set_rflags(vcpu, rflags);
7531

7532
	kvm_x86_ops->update_bp_intercept(vcpu);
7533

7534
	r = 0;
Jan Kiszka's avatar
Jan Kiszka committed
7535

7536
out:
7537 7538 7539 7540

	return r;
}

7541 7542 7543 7544 7545 7546 7547 7548
/*
 * Translate a guest virtual address to a guest physical address.
 */
int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
				    struct kvm_translation *tr)
{
	unsigned long vaddr = tr->linear_address;
	gpa_t gpa;
7549
	int idx;
7550

7551
	idx = srcu_read_lock(&vcpu->kvm->srcu);
7552
	gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
7553
	srcu_read_unlock(&vcpu->kvm->srcu, idx);
7554 7555 7556 7557 7558 7559 7560 7561
	tr->physical_address = gpa;
	tr->valid = gpa != UNMAPPED_GVA;
	tr->writeable = 1;
	tr->usermode = 0;

	return 0;
}

7562 7563
int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
7564
	struct fxregs_state *fxsave =
7565
			&vcpu->arch.guest_fpu.state.fxsave;
7566 7567 7568 7569 7570 7571 7572 7573 7574 7575 7576 7577 7578 7579 7580

	memcpy(fpu->fpr, fxsave->st_space, 128);
	fpu->fcw = fxsave->cwd;
	fpu->fsw = fxsave->swd;
	fpu->ftwx = fxsave->twd;
	fpu->last_opcode = fxsave->fop;
	fpu->last_ip = fxsave->rip;
	fpu->last_dp = fxsave->rdp;
	memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);

	return 0;
}

int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
{
7581
	struct fxregs_state *fxsave =
7582
			&vcpu->arch.guest_fpu.state.fxsave;
7583 7584 7585 7586 7587 7588 7589 7590 7591 7592 7593 7594 7595

	memcpy(fxsave->st_space, fpu->fpr, 128);
	fxsave->cwd = fpu->fcw;
	fxsave->swd = fpu->fsw;
	fxsave->twd = fpu->ftwx;
	fxsave->fop = fpu->last_opcode;
	fxsave->rip = fpu->last_ip;
	fxsave->rdp = fpu->last_dp;
	memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);

	return 0;
}

7596
static void fx_init(struct kvm_vcpu *vcpu)
7597
{
7598
	fpstate_init(&vcpu->arch.guest_fpu.state);
7599
	if (boot_cpu_has(X86_FEATURE_XSAVES))
7600
		vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7601
			host_xcr0 | XSTATE_COMPACTION_ENABLED;
7602

7603 7604 7605
	/*
	 * Ensure guest xcr0 is valid for loading
	 */
Dave Hansen's avatar
Dave Hansen committed
7606
	vcpu->arch.xcr0 = XFEATURE_MASK_FP;
7607

7608
	vcpu->arch.cr0 |= X86_CR0_ET;
7609 7610 7611 7612
}

void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
{
7613
	if (vcpu->guest_fpu_loaded)
7614 7615
		return;

7616 7617 7618 7619 7620
	/*
	 * Restore all possible states in the guest,
	 * and assume host would use all available bits.
	 * Guest xcr0 would be loaded later.
	 */
7621
	vcpu->guest_fpu_loaded = 1;
7622
	__kernel_fpu_begin();
7623
	__copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7624
	trace_kvm_fpu(1);
7625 7626 7627 7628
}

void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
{
7629
	if (!vcpu->guest_fpu_loaded)
7630 7631 7632
		return;

	vcpu->guest_fpu_loaded = 0;
7633
	copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7634
	__kernel_fpu_end();
Avi Kivity's avatar
Avi Kivity committed
7635
	++vcpu->stat.fpu_reload;
7636
	trace_kvm_fpu(0);
7637
}
7638 7639 7640

void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
{
7641 7642
	void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;

7643
	kvmclock_reset(vcpu);
7644

7645
	kvm_x86_ops->vcpu_free(vcpu);
7646
	free_cpumask_var(wbinvd_dirty_mask);
7647 7648 7649 7650 7651
}

struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
						unsigned int id)
{
7652 7653
	struct kvm_vcpu *vcpu;

7654 7655 7656 7657
	if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
		printk_once(KERN_WARNING
		"kvm: SMP vm created on host with unstable TSC; "
		"guest TSC will not be reliable\n");
7658 7659 7660 7661

	vcpu = kvm_x86_ops->vcpu_create(kvm, id);

	return vcpu;
7662
}
7663

7664 7665 7666
int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
{
	int r;
7667

7668
	kvm_vcpu_mtrr_init(vcpu);
7669 7670 7671
	r = vcpu_load(vcpu);
	if (r)
		return r;
7672
	kvm_vcpu_reset(vcpu, false);
7673
	kvm_mmu_setup(vcpu);
7674
	vcpu_put(vcpu);
7675
	return r;
7676 7677
}

7678
void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7679
{
7680
	struct msr_data msr;
7681
	struct kvm *kvm = vcpu->kvm;
7682

7683 7684
	if (vcpu_load(vcpu))
		return;
7685 7686 7687 7688
	msr.data = 0x0;
	msr.index = MSR_IA32_TSC;
	msr.host_initiated = true;
	kvm_write_tsc(vcpu, &msr);
7689 7690
	vcpu_put(vcpu);

7691 7692 7693
	if (!kvmclock_periodic_sync)
		return;

7694 7695
	schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
					KVMCLOCK_SYNC_PERIOD);
7696 7697
}

7698
void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7699
{
7700
	int r;
7701 7702
	vcpu->arch.apf.msr_val = 0;

7703 7704
	r = vcpu_load(vcpu);
	BUG_ON(r);
7705 7706 7707 7708 7709 7710
	kvm_mmu_unload(vcpu);
	vcpu_put(vcpu);

	kvm_x86_ops->vcpu_free(vcpu);
}

7711
void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7712
{
7713 7714
	vcpu->arch.hflags = 0;

7715
	vcpu->arch.smi_pending = 0;
Avi Kivity's avatar
Avi Kivity committed
7716 7717
	atomic_set(&vcpu->arch.nmi_queued, 0);
	vcpu->arch.nmi_pending = 0;
7718
	vcpu->arch.nmi_injected = false;
7719 7720
	kvm_clear_interrupt_queue(vcpu);
	kvm_clear_exception_queue(vcpu);
7721

7722
	memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7723
	kvm_update_dr0123(vcpu);
7724
	vcpu->arch.dr6 = DR6_INIT;
Jan Kiszka's avatar
Jan Kiszka committed
7725
	kvm_update_dr6(vcpu);
7726
	vcpu->arch.dr7 = DR7_FIXED_1;
7727
	kvm_update_dr7(vcpu);
7728

7729 7730
	vcpu->arch.cr2 = 0;

7731
	kvm_make_request(KVM_REQ_EVENT, vcpu);
7732
	vcpu->arch.apf.msr_val = 0;
7733
	vcpu->arch.st.msr_val = 0;
7734

7735 7736
	kvmclock_reset(vcpu);

7737 7738 7739
	kvm_clear_async_pf_completion_queue(vcpu);
	kvm_async_pf_hash_reset(vcpu);
	vcpu->arch.apf.halted = false;
7740

7741
	if (!init_event) {
7742
		kvm_pmu_reset(vcpu);
7743 7744
		vcpu->arch.smbase = 0x30000;
	}
7745

7746 7747 7748 7749
	memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
	vcpu->arch.regs_avail = ~0;
	vcpu->arch.regs_dirty = ~0;

7750
	kvm_x86_ops->vcpu_reset(vcpu, init_event);
7751 7752
}

7753
void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7754 7755 7756 7757 7758 7759 7760 7761
{
	struct kvm_segment cs;

	kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
	cs.selector = vector << 8;
	cs.base = vector << 12;
	kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
	kvm_rip_write(vcpu, 0);
7762 7763
}

7764
int kvm_arch_hardware_enable(void)
7765
{
7766 7767 7768
	struct kvm *kvm;
	struct kvm_vcpu *vcpu;
	int i;
7769 7770 7771 7772
	int ret;
	u64 local_tsc;
	u64 max_tsc = 0;
	bool stable, backwards_tsc = false;
7773 7774

	kvm_shared_msr_cpu_online();
7775
	ret = kvm_x86_ops->hardware_enable();
7776 7777 7778
	if (ret != 0)
		return ret;

7779
	local_tsc = rdtsc();
7780 7781 7782 7783
	stable = !check_tsc_unstable();
	list_for_each_entry(kvm, &vm_list, vm_list) {
		kvm_for_each_vcpu(i, vcpu, kvm) {
			if (!stable && vcpu->cpu == smp_processor_id())
7784
				kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7785 7786 7787 7788 7789 7790 7791 7792 7793 7794 7795 7796 7797 7798 7799 7800
			if (stable && vcpu->arch.last_host_tsc > local_tsc) {
				backwards_tsc = true;
				if (vcpu->arch.last_host_tsc > max_tsc)
					max_tsc = vcpu->arch.last_host_tsc;
			}
		}
	}

	/*
	 * Sometimes, even reliable TSCs go backwards.  This happens on
	 * platforms that reset TSC during suspend or hibernate actions, but
	 * maintain synchronization.  We must compensate.  Fortunately, we can
	 * detect that condition here, which happens early in CPU bringup,
	 * before any KVM threads can be running.  Unfortunately, we can't
	 * bring the TSCs fully up to date with real time, as we aren't yet far
	 * enough into CPU bringup that we know how much real time has actually
7801
	 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7802 7803 7804 7805 7806 7807 7808 7809 7810 7811 7812 7813 7814 7815 7816 7817 7818 7819 7820 7821 7822 7823 7824 7825
	 * variables that haven't been updated yet.
	 *
	 * So we simply find the maximum observed TSC above, then record the
	 * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
	 * the adjustment will be applied.  Note that we accumulate
	 * adjustments, in case multiple suspend cycles happen before some VCPU
	 * gets a chance to run again.  In the event that no KVM threads get a
	 * chance to run, we will miss the entire elapsed period, as we'll have
	 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
	 * loose cycle time.  This isn't too big a deal, since the loss will be
	 * uniform across all VCPUs (not to mention the scenario is extremely
	 * unlikely). It is possible that a second hibernate recovery happens
	 * much faster than a first, causing the observed TSC here to be
	 * smaller; this would require additional padding adjustment, which is
	 * why we set last_host_tsc to the local tsc observed here.
	 *
	 * N.B. - this code below runs only on platforms with reliable TSC,
	 * as that is the only way backwards_tsc is set above.  Also note
	 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
	 * have the same delta_cyc adjustment applied if backwards_tsc
	 * is detected.  Note further, this adjustment is only done once,
	 * as we reset last_host_tsc on all VCPUs to stop this from being
	 * called multiple times (one for each physical CPU bringup).
	 *
Guo Chao's avatar
Guo Chao committed
7826
	 * Platforms with unreliable TSCs don't have to deal with this, they
7827 7828 7829 7830 7831 7832
	 * will be compensated by the logic in vcpu_load, which sets the TSC to
	 * catchup mode.  This will catchup all VCPUs to real time, but cannot
	 * guarantee that they stay in perfect synchronization.
	 */
	if (backwards_tsc) {
		u64 delta_cyc = max_tsc - local_tsc;
7833
		backwards_tsc_observed = true;
7834 7835 7836 7837
		list_for_each_entry(kvm, &vm_list, vm_list) {
			kvm_for_each_vcpu(i, vcpu, kvm) {
				vcpu->arch.tsc_offset_adjustment += delta_cyc;
				vcpu->arch.last_host_tsc = local_tsc;
7838
				kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7839 7840 7841 7842 7843 7844 7845 7846 7847 7848 7849 7850 7851 7852
			}

			/*
			 * We have to disable TSC offset matching.. if you were
			 * booting a VM while issuing an S4 host suspend....
			 * you may have some problem.  Solving this issue is
			 * left as an exercise to the reader.
			 */
			kvm->arch.last_tsc_nsec = 0;
			kvm->arch.last_tsc_write = 0;
		}

	}
	return 0;
7853 7854
}

7855
void kvm_arch_hardware_disable(void)
7856
{
7857 7858
	kvm_x86_ops->hardware_disable();
	drop_user_return_notifiers();
7859 7860 7861 7862
}

int kvm_arch_hardware_setup(void)
{
7863 7864 7865 7866 7867 7868
	int r;

	r = kvm_x86_ops->hardware_setup();
	if (r != 0)
		return r;

7869 7870 7871 7872 7873 7874 7875 7876 7877 7878 7879
	if (kvm_has_tsc_control) {
		/*
		 * Make sure the user can only configure tsc_khz values that
		 * fit into a signed integer.
		 * A min value is not calculated needed because it will always
		 * be 1 on all machines.
		 */
		u64 max = min(0x7fffffffULL,
			      __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
		kvm_max_guest_tsc_khz = max;

7880
		kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
7881
	}
7882

7883 7884
	kvm_init_msr_list();
	return 0;
7885 7886 7887 7888 7889 7890 7891 7892 7893 7894
}

void kvm_arch_hardware_unsetup(void)
{
	kvm_x86_ops->hardware_unsetup();
}

void kvm_arch_check_processor_compat(void *rtn)
{
	kvm_x86_ops->check_processor_compatibility(rtn);
7895 7896 7897 7898 7899 7900 7901 7902 7903 7904 7905
}

bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
{
	return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
}
EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);

bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
{
	return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7906 7907
}

7908
struct static_key kvm_no_apic_vcpu __read_mostly;
7909
EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
7910

7911 7912 7913 7914 7915 7916 7917 7918 7919
int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
{
	struct page *page;
	struct kvm *kvm;
	int r;

	BUG_ON(vcpu->kvm == NULL);
	kvm = vcpu->kvm;

7920
	vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv();
7921
	vcpu->arch.pv.pv_unhalted = false;
7922
	vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7923
	if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7924
		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7925
	else
7926
		vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7927 7928 7929 7930 7931 7932

	page = alloc_page(GFP_KERNEL | __GFP_ZERO);
	if (!page) {
		r = -ENOMEM;
		goto fail;
	}
7933
	vcpu->arch.pio_data = page_address(page);
7934

7935
	kvm_set_tsc_khz(vcpu, max_tsc_khz);
Zachary Amsden's avatar
Zachary Amsden committed
7936

7937 7938 7939 7940 7941 7942 7943 7944
	r = kvm_mmu_create(vcpu);
	if (r < 0)
		goto fail_free_pio_data;

	if (irqchip_in_kernel(kvm)) {
		r = kvm_create_lapic(vcpu);
		if (r < 0)
			goto fail_mmu_destroy;
7945 7946
	} else
		static_key_slow_inc(&kvm_no_apic_vcpu);
7947

Huang Ying's avatar
Huang Ying committed
7948 7949 7950 7951
	vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
				       GFP_KERNEL);
	if (!vcpu->arch.mce_banks) {
		r = -ENOMEM;
7952
		goto fail_free_lapic;
Huang Ying's avatar
Huang Ying committed
7953 7954 7955
	}
	vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;

7956 7957
	if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
		r = -ENOMEM;
7958
		goto fail_free_mce_banks;
7959
	}
7960

7961
	fx_init(vcpu);
7962

7963
	vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7964
	vcpu->arch.pv_time_enabled = false;
7965 7966

	vcpu->arch.guest_supported_xcr0 = 0;
7967
	vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7968

7969 7970
	vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);

7971 7972
	vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;

7973
	kvm_async_pf_hash_reset(vcpu);
7974
	kvm_pmu_init(vcpu);
7975

7976 7977
	vcpu->arch.pending_external_vector = -1;

7978 7979
	kvm_hv_vcpu_init(vcpu);

7980
	return 0;
7981

7982 7983
fail_free_mce_banks:
	kfree(vcpu->arch.mce_banks);
7984 7985
fail_free_lapic:
	kvm_free_lapic(vcpu);
7986 7987 7988
fail_mmu_destroy:
	kvm_mmu_destroy(vcpu);
fail_free_pio_data:
7989
	free_page((unsigned long)vcpu->arch.pio_data);
7990 7991 7992 7993 7994 7995
fail:
	return r;
}

void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
{
7996 7997
	int idx;

7998
	kvm_hv_vcpu_uninit(vcpu);
7999
	kvm_pmu_destroy(vcpu);
8000
	kfree(vcpu->arch.mce_banks);
8001
	kvm_free_lapic(vcpu);
8002
	idx = srcu_read_lock(&vcpu->kvm->srcu);
8003
	kvm_mmu_destroy(vcpu);
8004
	srcu_read_unlock(&vcpu->kvm->srcu, idx);
8005
	free_page((unsigned long)vcpu->arch.pio_data);
8006
	if (!lapic_in_kernel(vcpu))
8007
		static_key_slow_dec(&kvm_no_apic_vcpu);
8008
}
8009

Radim Krčmář's avatar
Radim Krčmář committed
8010 8011
void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
{
8012
	kvm_x86_ops->sched_in(vcpu, cpu);
Radim Krčmář's avatar
Radim Krčmář committed
8013 8014
}

8015
int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8016
{
8017 8018 8019
	if (type)
		return -EINVAL;

8020
	INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8021
	INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8022
	INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
Ben-Ami Yassour's avatar
Ben-Ami Yassour committed
8023
	INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8024
	atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8025

8026 8027
	/* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
	set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8028 8029 8030
	/* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
	set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
		&kvm->arch.irq_sources_bitmap);
8031

8032
	raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8033
	mutex_init(&kvm->arch.apic_map_lock);
8034
	mutex_init(&kvm->arch.hyperv.hv_lock);
8035 8036
	spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);

8037
	kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8038
	pvclock_update_vm_gtod_copy(kvm);
8039

8040
	INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8041
	INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8042

8043
	kvm_page_track_init(kvm);
8044
	kvm_mmu_init_vm(kvm);
8045

8046 8047 8048
	if (kvm_x86_ops->vm_init)
		return kvm_x86_ops->vm_init(kvm);

8049
	return 0;
8050 8051 8052 8053
}

static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
{
8054 8055 8056
	int r;
	r = vcpu_load(vcpu);
	BUG_ON(r);
8057 8058 8059 8060 8061 8062 8063
	kvm_mmu_unload(vcpu);
	vcpu_put(vcpu);
}

static void kvm_free_vcpus(struct kvm *kvm)
{
	unsigned int i;
8064
	struct kvm_vcpu *vcpu;
8065 8066 8067 8068

	/*
	 * Unpin any mmu pages first.
	 */
8069 8070
	kvm_for_each_vcpu(i, vcpu, kvm) {
		kvm_clear_async_pf_completion_queue(vcpu);
8071
		kvm_unload_vcpu_mmu(vcpu);
8072
	}
8073 8074 8075 8076 8077 8078
	kvm_for_each_vcpu(i, vcpu, kvm)
		kvm_arch_vcpu_free(vcpu);

	mutex_lock(&kvm->lock);
	for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
		kvm->vcpus[i] = NULL;
8079

8080 8081
	atomic_set(&kvm->online_vcpus, 0);
	mutex_unlock(&kvm->lock);
8082 8083
}

8084 8085
void kvm_arch_sync_events(struct kvm *kvm)
{
8086
	cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8087
	cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8088
	kvm_free_all_assigned_devices(kvm);
8089
	kvm_free_pit(kvm);
8090 8091
}

8092
int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8093 8094
{
	int i, r;
8095
	unsigned long hva;
8096 8097
	struct kvm_memslots *slots = kvm_memslots(kvm);
	struct kvm_memory_slot *slot, old;
8098 8099

	/* Called with kvm->slots_lock held.  */
8100 8101
	if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
		return -EINVAL;
8102

8103 8104
	slot = id_to_memslot(slots, id);
	if (size) {
8105
		if (slot->npages)
8106 8107 8108 8109 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 8120 8121 8122 8123
			return -EEXIST;

		/*
		 * MAP_SHARED to prevent internal slot pages from being moved
		 * by fork()/COW.
		 */
		hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
			      MAP_SHARED | MAP_ANONYMOUS, 0);
		if (IS_ERR((void *)hva))
			return PTR_ERR((void *)hva);
	} else {
		if (!slot->npages)
			return 0;

		hva = 0;
	}

	old = *slot;
8124
	for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8125
		struct kvm_userspace_memory_region m;
8126

8127 8128 8129
		m.slot = id | (i << 16);
		m.flags = 0;
		m.guest_phys_addr = gpa;
8130
		m.userspace_addr = hva;
8131
		m.memory_size = size;
8132 8133 8134 8135 8136
		r = __kvm_set_memory_region(kvm, &m);
		if (r < 0)
			return r;
	}

8137 8138 8139 8140 8141
	if (!size) {
		r = vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
		WARN_ON(r < 0);
	}

8142 8143 8144 8145
	return 0;
}
EXPORT_SYMBOL_GPL(__x86_set_memory_region);

8146
int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8147 8148 8149 8150
{
	int r;

	mutex_lock(&kvm->slots_lock);
8151
	r = __x86_set_memory_region(kvm, id, gpa, size);
8152 8153 8154 8155 8156 8157
	mutex_unlock(&kvm->slots_lock);

	return r;
}
EXPORT_SYMBOL_GPL(x86_set_memory_region);

8158 8159
void kvm_arch_destroy_vm(struct kvm *kvm)
{
8160 8161 8162 8163 8164 8165
	if (current->mm == kvm->mm) {
		/*
		 * Free memory regions allocated on behalf of userspace,
		 * unless the the memory map has changed due to process exit
		 * or fd copying.
		 */
8166 8167 8168
		x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
		x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
		x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8169
	}
8170 8171
	if (kvm_x86_ops->vm_destroy)
		kvm_x86_ops->vm_destroy(kvm);
8172
	kvm_iommu_unmap_guest(kvm);
8173 8174
	kvm_pic_destroy(kvm);
	kvm_ioapic_destroy(kvm);
8175
	kvm_free_vcpus(kvm);
8176
	kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8177
	kvm_mmu_uninit_vm(kvm);
8178
	kvm_page_track_cleanup(kvm);
8179
}
8180

8181
void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8182 8183 8184 8185
			   struct kvm_memory_slot *dont)
{
	int i;

8186 8187
	for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
		if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
Thomas Huth's avatar
Thomas Huth committed
8188
			kvfree(free->arch.rmap[i]);
8189
			free->arch.rmap[i] = NULL;
8190
		}
8191 8192 8193 8194 8195
		if (i == 0)
			continue;

		if (!dont || free->arch.lpage_info[i - 1] !=
			     dont->arch.lpage_info[i - 1]) {
Thomas Huth's avatar
Thomas Huth committed
8196
			kvfree(free->arch.lpage_info[i - 1]);
8197
			free->arch.lpage_info[i - 1] = NULL;
8198 8199
		}
	}
8200 8201

	kvm_page_track_free_memslot(free, dont);
8202 8203
}

8204 8205
int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
			    unsigned long npages)
8206 8207 8208
{
	int i;

8209
	for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8210
		struct kvm_lpage_info *linfo;
8211 8212
		unsigned long ugfn;
		int lpages;
8213
		int level = i + 1;
8214 8215 8216 8217

		lpages = gfn_to_index(slot->base_gfn + npages - 1,
				      slot->base_gfn, level) + 1;

8218 8219 8220
		slot->arch.rmap[i] =
			kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
		if (!slot->arch.rmap[i])
8221
			goto out_free;
8222 8223
		if (i == 0)
			continue;
8224

8225 8226
		linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
		if (!linfo)
8227 8228
			goto out_free;

8229 8230
		slot->arch.lpage_info[i - 1] = linfo;

8231
		if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
8232
			linfo[0].disallow_lpage = 1;
8233
		if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
8234
			linfo[lpages - 1].disallow_lpage = 1;
8235 8236 8237 8238 8239 8240 8241 8242 8243 8244 8245
		ugfn = slot->userspace_addr >> PAGE_SHIFT;
		/*
		 * If the gfn and userspace address are not aligned wrt each
		 * other, or if explicitly asked to, disable large page
		 * support for this slot
		 */
		if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
		    !kvm_largepages_enabled()) {
			unsigned long j;

			for (j = 0; j < lpages; ++j)
8246
				linfo[j].disallow_lpage = 1;
8247 8248 8249
		}
	}

8250 8251 8252
	if (kvm_page_track_create_memslot(slot, npages))
		goto out_free;

8253 8254 8255
	return 0;

out_free:
8256
	for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
Thomas Huth's avatar
Thomas Huth committed
8257
		kvfree(slot->arch.rmap[i]);
8258 8259 8260 8261
		slot->arch.rmap[i] = NULL;
		if (i == 0)
			continue;

Thomas Huth's avatar
Thomas Huth committed
8262
		kvfree(slot->arch.lpage_info[i - 1]);
8263
		slot->arch.lpage_info[i - 1] = NULL;
8264 8265 8266 8267
	}
	return -ENOMEM;
}

8268
void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
8269
{
8270 8271 8272 8273
	/*
	 * memslots->generation has been incremented.
	 * mmio generation may have reached its maximum value.
	 */
8274
	kvm_mmu_invalidate_mmio_sptes(kvm, slots);
8275 8276
}

8277 8278
int kvm_arch_prepare_memory_region(struct kvm *kvm,
				struct kvm_memory_slot *memslot,
8279
				const struct kvm_userspace_memory_region *mem,
8280
				enum kvm_mr_change change)
8281
{
8282 8283 8284
	return 0;
}

8285 8286 8287 8288 8289 8290 8291 8292 8293 8294 8295 8296 8297 8298 8299 8300 8301 8302 8303 8304 8305 8306 8307 8308 8309 8310 8311 8312 8313 8314 8315 8316 8317 8318 8319 8320 8321 8322 8323 8324 8325 8326 8327 8328 8329 8330 8331 8332 8333 8334
static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
				     struct kvm_memory_slot *new)
{
	/* Still write protect RO slot */
	if (new->flags & KVM_MEM_READONLY) {
		kvm_mmu_slot_remove_write_access(kvm, new);
		return;
	}

	/*
	 * Call kvm_x86_ops dirty logging hooks when they are valid.
	 *
	 * kvm_x86_ops->slot_disable_log_dirty is called when:
	 *
	 *  - KVM_MR_CREATE with dirty logging is disabled
	 *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
	 *
	 * The reason is, in case of PML, we need to set D-bit for any slots
	 * with dirty logging disabled in order to eliminate unnecessary GPA
	 * logging in PML buffer (and potential PML buffer full VMEXT). This
	 * guarantees leaving PML enabled during guest's lifetime won't have
	 * any additonal overhead from PML when guest is running with dirty
	 * logging disabled for memory slots.
	 *
	 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
	 * to dirty logging mode.
	 *
	 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
	 *
	 * In case of write protect:
	 *
	 * Write protect all pages for dirty logging.
	 *
	 * All the sptes including the large sptes which point to this
	 * slot are set to readonly. We can not create any new large
	 * spte on this slot until the end of the logging.
	 *
	 * See the comments in fast_page_fault().
	 */
	if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
		if (kvm_x86_ops->slot_enable_log_dirty)
			kvm_x86_ops->slot_enable_log_dirty(kvm, new);
		else
			kvm_mmu_slot_remove_write_access(kvm, new);
	} else {
		if (kvm_x86_ops->slot_disable_log_dirty)
			kvm_x86_ops->slot_disable_log_dirty(kvm, new);
	}
}

8335
void kvm_arch_commit_memory_region(struct kvm *kvm,
8336
				const struct kvm_userspace_memory_region *mem,
8337
				const struct kvm_memory_slot *old,
8338
				const struct kvm_memory_slot *new,
8339
				enum kvm_mr_change change)
8340
{
8341
	int nr_mmu_pages = 0;
8342

8343 8344 8345 8346
	if (!kvm->arch.n_requested_mmu_pages)
		nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);

	if (nr_mmu_pages)
8347
		kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
8348

8349 8350 8351 8352 8353 8354 8355 8356 8357 8358 8359 8360 8361 8362 8363 8364 8365
	/*
	 * Dirty logging tracks sptes in 4k granularity, meaning that large
	 * sptes have to be split.  If live migration is successful, the guest
	 * in the source machine will be destroyed and large sptes will be
	 * created in the destination. However, if the guest continues to run
	 * in the source machine (for example if live migration fails), small
	 * sptes will remain around and cause bad performance.
	 *
	 * Scan sptes if dirty logging has been stopped, dropping those
	 * which can be collapsed into a single large-page spte.  Later
	 * page faults will create the large-page sptes.
	 */
	if ((change != KVM_MR_DELETE) &&
		(old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
		!(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
		kvm_mmu_zap_collapsible_sptes(kvm, new);

8366
	/*
8367
	 * Set up write protection and/or dirty logging for the new slot.
8368
	 *
8369 8370 8371 8372
	 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
	 * been zapped so no dirty logging staff is needed for old slot. For
	 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
	 * new and it's also covered when dealing with the new slot.
8373 8374
	 *
	 * FIXME: const-ify all uses of struct kvm_memory_slot.
8375
	 */
8376
	if (change != KVM_MR_DELETE)
8377
		kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
8378
}
8379

8380
void kvm_arch_flush_shadow_all(struct kvm *kvm)
8381
{
8382
	kvm_mmu_invalidate_zap_all_pages(kvm);
8383 8384
}

8385 8386 8387
void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
				   struct kvm_memory_slot *slot)
{
8388
	kvm_page_track_flush_slot(kvm, slot);
8389 8390
}

8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402 8403 8404
static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
{
	if (!list_empty_careful(&vcpu->async_pf.done))
		return true;

	if (kvm_apic_has_events(vcpu))
		return true;

	if (vcpu->arch.pv.pv_unhalted)
		return true;

	if (atomic_read(&vcpu->arch.nmi_queued))
		return true;

8405 8406 8407
	if (test_bit(KVM_REQ_SMI, &vcpu->requests))
		return true;

8408 8409 8410 8411
	if (kvm_arch_interrupt_allowed(vcpu) &&
	    kvm_cpu_has_interrupt(vcpu))
		return true;

8412 8413 8414
	if (kvm_hv_has_stimer_pending(vcpu))
		return true;

8415 8416 8417
	return false;
}

8418 8419
int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
{
8420
	return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
8421
}
8422

8423
int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
8424
{
8425
	return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
8426
}
8427 8428 8429 8430 8431

int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
{
	return kvm_x86_ops->interrupt_allowed(vcpu);
}
8432

8433
unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
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Jan Kiszka committed
8434
{
8435 8436 8437 8438 8439 8440
	if (is_64_bit_mode(vcpu))
		return kvm_rip_read(vcpu);
	return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
		     kvm_rip_read(vcpu));
}
EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
Jan Kiszka's avatar
Jan Kiszka committed
8441

8442 8443 8444
bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
{
	return kvm_get_linear_rip(vcpu) == linear_rip;
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Jan Kiszka committed
8445 8446 8447
}
EXPORT_SYMBOL_GPL(kvm_is_linear_rip);

8448 8449 8450 8451 8452 8453
unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
{
	unsigned long rflags;

	rflags = kvm_x86_ops->get_rflags(vcpu);
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8454
		rflags &= ~X86_EFLAGS_TF;
8455 8456 8457 8458
	return rflags;
}
EXPORT_SYMBOL_GPL(kvm_get_rflags);

8459
static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
8460 8461
{
	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
Jan Kiszka's avatar
Jan Kiszka committed
8462
	    kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
8463
		rflags |= X86_EFLAGS_TF;
8464
	kvm_x86_ops->set_rflags(vcpu, rflags);
8465 8466 8467 8468 8469
}

void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
{
	__kvm_set_rflags(vcpu, rflags);
8470
	kvm_make_request(KVM_REQ_EVENT, vcpu);
8471 8472 8473
}
EXPORT_SYMBOL_GPL(kvm_set_rflags);

8474 8475 8476 8477
void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
{
	int r;

8478
	if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
8479
	      work->wakeup_all)
8480 8481 8482 8483 8484 8485
		return;

	r = kvm_mmu_reload(vcpu);
	if (unlikely(r))
		return;

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	if (!vcpu->arch.mmu.direct_map &&
	      work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
		return;

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	vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
}

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static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
{
	return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
}

static inline u32 kvm_async_pf_next_probe(u32 key)
{
	return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
}

static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
{
	u32 key = kvm_async_pf_hash_fn(gfn);

	while (vcpu->arch.apf.gfns[key] != ~0)
		key = kvm_async_pf_next_probe(key);

	vcpu->arch.apf.gfns[key] = gfn;
}

static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
{
	int i;
	u32 key = kvm_async_pf_hash_fn(gfn);

	for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
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		     (vcpu->arch.apf.gfns[key] != gfn &&
		      vcpu->arch.apf.gfns[key] != ~0); i++)
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		key = kvm_async_pf_next_probe(key);

	return key;
}

bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
{
	return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
}

static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
{
	u32 i, j, k;

	i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
	while (true) {
		vcpu->arch.apf.gfns[i] = ~0;
		do {
			j = kvm_async_pf_next_probe(j);
			if (vcpu->arch.apf.gfns[j] == ~0)
				return;
			k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
			/*
			 * k lies cyclically in ]i,j]
			 * |    i.k.j |
			 * |....j i.k.| or  |.k..j i...|
			 */
		} while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
		vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
		i = j;
	}
}

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static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
{
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	return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
				      sizeof(val));
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}

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void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
				     struct kvm_async_pf *work)
{
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	struct x86_exception fault;

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	trace_kvm_async_pf_not_present(work->arch.token, work->gva);
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	kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
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	if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
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	    (vcpu->arch.apf.send_user_only &&
	     kvm_x86_ops->get_cpl(vcpu) == 0))
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		kvm_make_request(KVM_REQ_APF_HALT, vcpu);
	else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
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		fault.vector = PF_VECTOR;
		fault.error_code_valid = true;
		fault.error_code = 0;
		fault.nested_page_fault = false;
		fault.address = work->arch.token;
		kvm_inject_page_fault(vcpu, &fault);
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	}
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}

void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
				 struct kvm_async_pf *work)
{
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	struct x86_exception fault;

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	if (work->wakeup_all)
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		work->arch.token = ~0; /* broadcast wakeup */
	else
		kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
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	trace_kvm_async_pf_ready(work->arch.token, work->gva);
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	if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
	    !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
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		fault.vector = PF_VECTOR;
		fault.error_code_valid = true;
		fault.error_code = 0;
		fault.nested_page_fault = false;
		fault.address = work->arch.token;
		kvm_inject_page_fault(vcpu, &fault);
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	}
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	vcpu->arch.apf.halted = false;
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	vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
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}

bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
{
	if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
		return true;
	else
		return !kvm_event_needs_reinjection(vcpu) &&
			kvm_x86_ops->interrupt_allowed(vcpu);
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}

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void kvm_arch_start_assignment(struct kvm *kvm)
{
	atomic_inc(&kvm->arch.assigned_device_count);
}
EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);

void kvm_arch_end_assignment(struct kvm *kvm)
{
	atomic_dec(&kvm->arch.assigned_device_count);
}
EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);

bool kvm_arch_has_assigned_device(struct kvm *kvm)
{
	return atomic_read(&kvm->arch.assigned_device_count);
}
EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);

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void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
{
	atomic_inc(&kvm->arch.noncoherent_dma_count);
}
EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);

void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
{
	atomic_dec(&kvm->arch.noncoherent_dma_count);
}
EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);

bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
{
	return atomic_read(&kvm->arch.noncoherent_dma_count);
}
EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);

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bool kvm_arch_has_irq_bypass(void)
{
	return kvm_x86_ops->update_pi_irte != NULL;
}

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int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
				      struct irq_bypass_producer *prod)
{
	struct kvm_kernel_irqfd *irqfd =
		container_of(cons, struct kvm_kernel_irqfd, consumer);

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	irqfd->producer = prod;
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	return kvm_x86_ops->update_pi_irte(irqfd->kvm,
					   prod->irq, irqfd->gsi, 1);
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}

void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
				      struct irq_bypass_producer *prod)
{
	int ret;
	struct kvm_kernel_irqfd *irqfd =
		container_of(cons, struct kvm_kernel_irqfd, consumer);

	WARN_ON(irqfd->producer != prod);
	irqfd->producer = NULL;

	/*
	 * When producer of consumer is unregistered, we change back to
	 * remapped mode, so we can re-use the current implementation
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Andrea Gelmini committed
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	 * when the irq is masked/disabled or the consumer side (KVM
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	 * int this case doesn't want to receive the interrupts.
	*/
	ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
	if (ret)
		printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
		       " fails: %d\n", irqfd->consumer.token, ret);
}

int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
				   uint32_t guest_irq, bool set)
{
	if (!kvm_x86_ops->update_pi_irte)
		return -EINVAL;

	return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
}

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bool kvm_vector_hashing_enabled(void)
{
	return vector_hashing;
}
EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);

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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
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EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);