head.S 16.6 KB
Newer Older
Linus Torvalds's avatar
Linus Torvalds committed
1 2 3
/*
 *  linux/arch/arm/boot/compressed/head.S
 *
4
 *  Copyright (C) 1996-2002 Russell King
Linus Torvalds's avatar
Linus Torvalds committed
5 6 7 8 9 10 11 12 13 14
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/config.h>
#include <linux/linkage.h>

/*
 * Debugging stuff
Linus Torvalds's avatar
Linus Torvalds committed
15 16 17 18
 *
 * Note that these macros must not contain any code which is not
 * 100% relocatable.  Any attempt to do so will result in a crash.
 * Please select one of the following when turning on debugging.
Linus Torvalds's avatar
Linus Torvalds committed
19
 */
Linus Torvalds's avatar
Linus Torvalds committed
20
#ifdef DEBUG
21
#if defined(CONFIG_DEBUG_DC21285_PORT)
22 23 24 25 26 27
		.macro	loadsp, rb
		mov	\rb, #0x42000000
		.endm
		.macro	writeb, rb
		str	\rb, [r3, #0x160]
		.endm
28 29 30 31 32 33
#elif defined(CONFIG_DEBUG_ICEDCC)
		.macro	loadsp, rb
		.endm
		.macro writeb, rb
		mcr	p14, 0, \rb, c0, c1, 0
		.endm
34
#elif defined(CONFIG_FOOTBRIDGE)
Linus Torvalds's avatar
Linus Torvalds committed
35 36 37 38 39 40
		.macro	loadsp,	rb
		mov	\rb, #0x7c000000
		.endm
		.macro	writeb,	rb
		strb	\rb, [r3, #0x3f8]
		.endm
41
#elif defined(CONFIG_ARCH_RPC)
Linus Torvalds's avatar
Linus Torvalds committed
42 43 44 45 46 47 48
		.macro	loadsp,	rb
		mov	\rb, #0x03000000
		orr	\rb, \rb, #0x00010000
		.endm
		.macro	writeb,	rb
		strb	\rb, [r3, #0x3f8 << 2]
		.endm
49
#elif defined(CONFIG_ARCH_INTEGRATOR)
Linus Torvalds's avatar
Linus Torvalds committed
50 51 52 53 54 55
		.macro	loadsp, rb
		mov	\rb, #0x16000000
		.endm
		.macro	writeb, rb
		strb	\rb, [r3, #0]
		.endm
56 57 58 59 60 61 62 63
#elif defined(CONFIG_ARCH_PXA) /* Xscale-type */
		.macro 	loadsp, rb
		mov	\rb, #0x40000000
		orr	\rb, \rb, #0x00100000
		.endm
		.macro	writeb, rb
		strb	\rb, [r3, #0]
		.endm
64 65 66 67 68 69 70 71 72 73 74 75
#elif defined(CONFIG_ARCH_SA1100)
		.macro	loadsp, rb
		mov	\rb, #0x80000000	@ physical base address
#  if defined(CONFIG_DEBUG_LL_SER3)
		add	\rb, \rb, #0x00050000	@ Ser3
#  else
		add	\rb, \rb, #0x00010000	@ Ser1
#  endif
		.endm
		.macro	writeb, rb
		str	\rb, [r3, #0x14]	@ UTDR
		.endm
Deepak Saxena's avatar
Deepak Saxena committed
76 77 78 79 80 81
#elif defined(CONFIG_ARCH_IXP4XX)
		.macro	loadsp, rb
		mov	\rb, #0xc8000000
		.endm
		.macro	writeb, rb
		str	\rb, [r3, #0]
82 83 84 85 86 87 88 89
#elif defined(CONFIG_ARCH_IXP2000)
		.macro	loadsp, rb
		mov	\rb, #0xc0000000
		orr	\rb, \rb, #0x00030000
		.endm
		.macro	writeb, rb
		str	\rb, [r3, #0]
		.endm
90 91 92 93 94 95 96
#elif defined(CONFIG_ARCH_LH7A40X)
		.macro	loadsp, rb
		ldr	\rb, =0x80000700	@ UART2 UARTBASE
		.endm
		.macro	writeb, rb
		strb	\rb, [r3, #0]
		.endm
97 98 99 100 101 102 103 104 105 106 107 108 109 110
#elif defined(CONFIG_ARCH_OMAP)
		.macro  loadsp, rb
		mov	\rb, #0xff000000	@ physical base address
		add	\rb, \rb, #0x00fb0000
#if defined(CONFIG_OMAP_LL_DEBUG_UART2) || defined(CONFIG_OMAP_LL_DEBUG_UART3)
		add	\rb, \rb, #0x00000800
#endif
#ifdef CONFIG_OMAP_LL_DEBUG_UART3
		add	\rb, \rb, #0x00009000
#endif
		.endm
		.macro	writeb, rb
		strb	\rb, [r3]
		.endm
Linus Torvalds's avatar
Linus Torvalds committed
111 112 113 114 115
#else
#error no serial architecture defined
#endif
#endif

Linus Torvalds's avatar
Linus Torvalds committed
116 117 118 119 120 121 122 123 124 125 126 127 128 129
		.macro	kputc,val
		mov	r0, \val
		bl	putc
		.endm

		.macro	kphex,val,len
		mov	r0, \val
		mov	r1, #\len
		bl	phex
		.endm

		.macro	debug_reloc_start
#ifdef DEBUG
		kputc	#'\n'
Linus Torvalds's avatar
Linus Torvalds committed
130
		kphex	r6, 8		/* processor id */
Linus Torvalds's avatar
Linus Torvalds committed
131
		kputc	#':'
Linus Torvalds's avatar
Linus Torvalds committed
132 133 134
		kphex	r7, 8		/* architecture id */
		kputc	#':'
		mrc	p15, 0, r0, c1, c0
Linus Torvalds's avatar
Linus Torvalds committed
135
		kphex	r0, 8		/* control reg */
Linus Torvalds's avatar
Linus Torvalds committed
136 137
		kputc	#'\n'
		kphex	r5, 8		/* decompressed kernel start */
Linus Torvalds's avatar
Linus Torvalds committed
138
		kputc	#'-'
Linus Torvalds's avatar
Linus Torvalds committed
139
		kphex	r8, 8		/* decompressed kernel end  */
Linus Torvalds's avatar
Linus Torvalds committed
140
		kputc	#'>'
Linus Torvalds's avatar
Linus Torvalds committed
141
		kphex	r4, 8		/* kernel execution address */
Linus Torvalds's avatar
Linus Torvalds committed
142 143 144 145 146 147
		kputc	#'\n'
#endif
		.endm

		.macro	debug_reloc_end
#ifdef DEBUG
Linus Torvalds's avatar
Linus Torvalds committed
148
		kphex	r5, 8		/* end of kernel */
Linus Torvalds's avatar
Linus Torvalds committed
149 150
		kputc	#'\n'
		mov	r0, r4
Linus Torvalds's avatar
Linus Torvalds committed
151
		bl	memdump		/* dump 256 bytes at start of kernel */
Linus Torvalds's avatar
Linus Torvalds committed
152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167
#endif
		.endm

		.section ".start", #alloc, #execinstr
/*
 * sort out different calling conventions
 */
		.align
start:
		.type	start,#function
		.rept	8
		mov	r0, r0
		.endr

		b	1f
		.word	0x016f2818		@ Magic numbers to help the loader
Linus Torvalds's avatar
Linus Torvalds committed
168 169
		.word	start			@ absolute load/run zImage address
		.word	_edata			@ zImage end address
Linus Torvalds's avatar
Linus Torvalds committed
170 171
1:		mov	r7, r1			@ save architecture ID
		mov	r8, #0			@ save r0
Linus Torvalds's avatar
Linus Torvalds committed
172

Linus Torvalds's avatar
Linus Torvalds committed
173
#ifndef __ARM_ARCH_2__
Linus Torvalds's avatar
Linus Torvalds committed
174 175
		/*
		 * Booting from Angel - need to enter SVC mode and disable
Linus Torvalds's avatar
Linus Torvalds committed
176 177
		 * FIQs/IRQs (numeric definitions from angel arm.h source).
		 * We only do this if we were in user mode on entry.
Linus Torvalds's avatar
Linus Torvalds committed
178
		 */
Linus Torvalds's avatar
Linus Torvalds committed
179 180
		mrs	r2, cpsr		@ get current mode
		tst	r2, #3			@ not user?
Linus Torvalds's avatar
Linus Torvalds committed
181
		bne	not_angel
Linus Torvalds's avatar
Linus Torvalds committed
182 183
		mov	r0, #0x17		@ angel_SWIreason_EnterSVC
		swi	0x123456		@ angel_SWI_ARM
Linus Torvalds's avatar
Linus Torvalds committed
184 185 186 187 188 189 190
not_angel:
		mrs	r2, cpsr		@ turn off interrupts to
		orr	r2, r2, #0xc0		@ prevent angel from running
		msr	cpsr_c, r2
#else
		teqp	pc, #0x0c000003		@ turn off interrupts
#endif
Linus Torvalds's avatar
Linus Torvalds committed
191 192 193 194 195

		/*
		 * Note that some cache flushing and other stuff may
		 * be needed here - is there an Angel SWI call for this?
		 */
Linus Torvalds's avatar
Linus Torvalds committed
196

Linus Torvalds's avatar
Linus Torvalds committed
197 198 199 200 201 202
		/*
		 * some architecture specific code can be inserted
		 * by the linker here, but it should preserve r7 and r8.
		 */

		.text
203 204 205 206
		adr	r0, LC0
		ldmia	r0, {r1, r2, r3, r4, r5, r6, ip, sp}
		subs	r0, r0, r1		@ calculate the delta offset

207
						@ if delta is zero, we are
208 209 210
		beq	not_relocated		@ running at the address we
						@ were linked at.

211 212 213 214 215 216 217 218
		/*
		 * We're running at a different address.  We need to fix
		 * up various pointers:
		 *   r5 - zImage base address
		 *   r6 - GOT start
		 *   ip - GOT end
		 */
		add	r5, r5, r0
219 220
		add	r6, r6, r0
		add	ip, ip, r0
221 222 223 224 225 226 227 228 229 230 231

#ifndef CONFIG_ZBOOT_ROM
		/*
		 * If we're running fully PIC === CONFIG_ZBOOT_ROM = n,
		 * we need to fix up pointers into the BSS region.
		 *   r2 - BSS start
		 *   r3 - BSS end
		 *   sp - stack pointer
		 */
		add	r2, r2, r0
		add	r3, r3, r0
232 233
		add	sp, sp, r0

234 235 236
		/*
		 * Relocate all entries in the GOT table.
		 */
237 238 239 240
1:		ldr	r1, [r6, #0]		@ relocate entries in the GOT
		add	r1, r1, r0		@ table.  This fixes up the
		str	r1, [r6], #4		@ C references.
		cmp	r6, ip
241
		blo	1b
242 243 244 245 246 247 248 249 250 251 252 253 254 255
#else

		/*
		 * Relocate entries in the GOT table.  We only relocate
		 * the entries that are outside the (relocated) BSS region.
		 */
1:		ldr	r1, [r6, #0]		@ relocate entries in the GOT
		cmp	r1, r2			@ entry < bss_start ||
		cmphs	r3, r1			@ _end < entry
		addlo	r1, r1, r0		@ table.  This fixes up the
		str	r1, [r6], #4		@ C references.
		cmp	r6, ip
		blo	1b
#endif
Linus Torvalds's avatar
Linus Torvalds committed
256

257
not_relocated:	mov	r0, #0
Linus Torvalds's avatar
Linus Torvalds committed
258 259 260 261 262
1:		str	r0, [r2], #4		@ clear bss
		str	r0, [r2], #4
		str	r0, [r2], #4
		str	r0, [r2], #4
		cmp	r2, r3
263
		blo	1b
Linus Torvalds's avatar
Linus Torvalds committed
264

265 266 267 268 269
		/*
		 * The C runtime environment should now be setup
		 * sufficiently.  Turn the cache on, set up some
		 * pointers, and start decompressing.
		 */
Linus Torvalds's avatar
Linus Torvalds committed
270 271 272 273 274
		bl	cache_on

		mov	r1, sp			@ malloc space above stack
		add	r2, sp, #0x10000	@ 64k max

275 276 277 278 279 280 281 282 283 284 285 286 287 288
/*
 * Check to see if we will overwrite ourselves.
 *   r4 = final kernel address
 *   r5 = start of this image
 *   r2 = end of malloc space (and therefore this image)
 * We basically want:
 *   r4 >= r2 -> OK
 *   r4 + image length <= r5 -> OK
 */
		cmp	r4, r2
		bhs	wont_overwrite
		add	r0, r4, #4096*1024	@ 4MB largest kernel size
		cmp	r0, r5
		bls	wont_overwrite
Linus Torvalds's avatar
Linus Torvalds committed
289

290
		mov	r5, r2			@ decompress after malloc space
Linus Torvalds's avatar
Linus Torvalds committed
291 292
		mov	r0, r5
		mov	r3, r7
293
		bl	decompress_kernel
Linus Torvalds's avatar
Linus Torvalds committed
294 295 296 297 298 299 300 301 302 303 304 305 306 307

		add	r0, r0, #127
		bic	r0, r0, #127		@ align the kernel length
/*
 * r0     = decompressed kernel length
 * r1-r3  = unused
 * r4     = kernel execution address
 * r5     = decompressed kernel start
 * r6     = processor ID
 * r7     = architecture ID
 * r8-r14 = unused
 */
		add	r1, r5, r0		@ end of decompressed kernel
		adr	r2, reloc_start
308 309
		ldr	r3, LC1
		add	r3, r2, r3
Linus Torvalds's avatar
Linus Torvalds committed
310 311 312 313 314
1:		ldmia	r2!, {r8 - r13}		@ copy relocation code
		stmia	r1!, {r8 - r13}
		ldmia	r2!, {r8 - r13}
		stmia	r1!, {r8 - r13}
		cmp	r2, r3
315
		blo	1b
Linus Torvalds's avatar
Linus Torvalds committed
316 317 318 319

		bl	cache_clean_flush
		add	pc, r5, r0		@ call relocation code

320 321 322 323 324 325 326 327
/*
 * We're not in danger of overwriting ourselves.  Do this the simple way.
 *
 * r4     = kernel execution address
 * r7     = architecture ID
 */
wont_overwrite:	mov	r0, r4
		mov	r3, r7
328
		bl	decompress_kernel
329 330
		b	call_kernel

Linus Torvalds's avatar
Linus Torvalds committed
331
		.type	LC0, #object
332 333 334
LC0:		.word	LC0			@ r1
		.word	__bss_start		@ r2
		.word	_end			@ r3
335
		.word	zreladdr		@ r4
336 337
		.word	_start			@ r5
		.word	_got_start		@ r6
338 339 340
		.word	_got_end		@ ip
		.word	user_stack+4096		@ sp
LC1:		.word	reloc_end - reloc_start
Linus Torvalds's avatar
Linus Torvalds committed
341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356
		.size	LC0, . - LC0

/*
 * Turn on the cache.  We need to setup some page tables so that we
 * can have both the I and D caches on.
 *
 * We place the page tables 16k down from the kernel execution address,
 * and we hope that nothing else is using it.  If we're using it, we
 * will go pop!
 *
 * On entry,
 *  r4 = kernel execution address
 *  r6 = processor ID
 *  r7 = architecture number
 *  r8 = run-time address of "start"
 * On exit,
Russell King's avatar
Russell King committed
357
 *  r1, r2, r3, r8, r9, r12 corrupted
Linus Torvalds's avatar
Linus Torvalds committed
358 359 360 361
 * This routine must preserve:
 *  r4, r5, r6, r7
 */
		.align	5
Russell King's avatar
Russell King committed
362 363 364
cache_on:	mov	r3, #8			@ cache_on function
		b	call_cache_fn

365
__setup_mmu:	sub	r3, r4, #16384		@ Page directory size
Linus Torvalds's avatar
Linus Torvalds committed
366 367 368 369 370 371 372 373 374
		bic	r3, r3, #0xff		@ Align the pointer
		bic	r3, r3, #0x3f00
/*
 * Initialise the page tables, turning on the cacheable and bufferable
 * bits for the RAM area only.
 */
		mov	r0, r3
		mov	r8, r0, lsr #18
		mov	r8, r8, lsl #18		@ start of RAM
Linus Torvalds's avatar
Linus Torvalds committed
375
		add	r9, r8, #0x10000000	@ a reasonable RAM size
Linus Torvalds's avatar
Linus Torvalds committed
376 377 378 379
		mov	r1, #0x12
		orr	r1, r1, #3 << 10
		add	r2, r3, #16384
1:		cmp	r1, r8			@ if virt > start of RAM
380
		orrhs	r1, r1, #0x0c		@ set cacheable, bufferable
Linus Torvalds's avatar
Linus Torvalds committed
381
		cmp	r1, r9			@ if virt > end of RAM
382
		bichs	r1, r1, #0x0c		@ clear cacheable, bufferable
Linus Torvalds's avatar
Linus Torvalds committed
383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400
		str	r1, [r0], #4		@ 1:1 mapping
		add	r1, r1, #1048576
		teq	r0, r2
		bne	1b
/*
 * If ever we are running from Flash, then we surely want the cache
 * to be enabled also for our execution instance...  We map 2MB of it
 * so there is no map overlap problem for up to 1 MB compressed kernel.
 * If the execution is in RAM then we would only be duplicating the above.
 */
		mov	r1, #0x1e
		orr	r1, r1, #3 << 10
		mov	r2, pc, lsr #20
		orr	r1, r1, r2, lsl #20
		add	r0, r3, r2, lsl #2
		str	r1, [r0], #4
		add	r1, r1, #1048576
		str	r1, [r0]
401
		mov	pc, lr
Linus Torvalds's avatar
Linus Torvalds committed
402

403 404 405
__armv4_cache_on:
		mov	r12, lr
		bl	__setup_mmu
Linus Torvalds's avatar
Linus Torvalds committed
406 407
		mov	r0, #0
		mcr	p15, 0, r0, c7, c10, 4	@ drain write buffer
408 409
		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
		mrc	p15, 0, r0, c1, c0, 0	@ read control reg
410
		orr	r0, r0, #0x5000		@ I-cache enable, RR cache replacement
411
		orr	r0, r0, #0x0030
412 413 414 415
		bl	__common_cache_on
		mov	r0, #0
		mcr	p15, 0, r0, c8, c7, 0	@ flush I,D TLBs
		mov	pc, r12
416 417 418 419 420 421 422 423

__arm6_cache_on:
		mov	r12, lr
		bl	__setup_mmu
		mov	r0, #0
		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
		mov	r0, #0x30
424 425 426 427 428
		bl	__common_cache_on
		mov	r0, #0
		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
		mov	pc, r12

429
__common_cache_on:
Linus Torvalds's avatar
Linus Torvalds committed
430
#ifndef DEBUG
431
		orr	r0, r0, #0x000d		@ Write buffer, mmu
Linus Torvalds's avatar
Linus Torvalds committed
432
#endif
433 434 435 436
		mov	r1, #-1
		mcr	p15, 0, r3, c2, c0, 0	@ load page table pointer
		mcr	p15, 0, r1, c3, c0, 0	@ load domain access control
		mcr	p15, 0, r0, c1, c0, 0	@ load control register
437
		mov	pc, lr
Linus Torvalds's avatar
Linus Torvalds committed
438 439

/*
Russell King's avatar
Russell King committed
440 441 442
 * All code following this line is relocatable.  It is relocated by
 * the above code to the end of the decompressed kernel image and
 * executed there.  During this time, we have no stacks.
Linus Torvalds's avatar
Linus Torvalds committed
443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462
 *
 * r0     = decompressed kernel length
 * r1-r3  = unused
 * r4     = kernel execution address
 * r5     = decompressed kernel start
 * r6     = processor ID
 * r7     = architecture ID
 * r8-r14 = unused
 */
		.align	5
reloc_start:	add	r8, r5, r0
		debug_reloc_start
		mov	r1, r4
1:
		.rept	4
		ldmia	r5!, {r0, r2, r3, r9 - r13}	@ relocate kernel
		stmia	r1!, {r0, r2, r3, r9 - r13}
		.endr

		cmp	r5, r8
463
		blo	1b
Linus Torvalds's avatar
Linus Torvalds committed
464 465 466 467 468 469 470 471 472
		debug_reloc_end

call_kernel:	bl	cache_clean_flush
		bl	cache_off
		mov	r0, #0
		mov	r1, r7			@ restore architecture number
		mov	pc, r4			@ call kernel

/*
Russell King's avatar
Russell King committed
473 474 475 476 477 478 479 480 481
 * Here follow the relocatable cache support functions for the
 * various processors.  This is a generic hook for locating an
 * entry and jumping to an instruction at the specified offset
 * from the start of the block.  Please note this is all position
 * independent code.
 *
 *  r1  = corrupted
 *  r2  = corrupted
 *  r3  = block offset
482
 *  r6  = corrupted
Russell King's avatar
Russell King committed
483
 *  r12 = corrupted
Linus Torvalds's avatar
Linus Torvalds committed
484 485
 */

Russell King's avatar
Russell King committed
486
call_cache_fn:	adr	r12, proc_types
487
		mrc	p15, 0, r6, c0, c0	@ get processor ID
Russell King's avatar
Russell King committed
488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513
1:		ldr	r1, [r12, #0]		@ get value
		ldr	r2, [r12, #4]		@ get mask
		eor	r1, r1, r6		@ (real ^ match)
		tst	r1, r2			@       & mask
		addeq	pc, r12, r3		@ call cache function
		add	r12, r12, #4*5
		b	1b

/*
 * Table for cache operations.  This is basically:
 *   - CPU ID match
 *   - CPU ID mask
 *   - 'cache on' method instruction
 *   - 'cache off' method instruction
 *   - 'cache flush' method instruction
 *
 * We match an entry using: ((real_id ^ match) & mask) == 0
 *
 * Writethrough caches generally only need 'on' and 'off'
 * methods.  Writeback caches _must_ have the flush method
 * defined.
 */
		.type	proc_types,#object
proc_types:
		.word	0x41560600		@ ARM6/610
		.word	0xffffffe0
514
		b	__arm6_cache_off	@ works, but slow
Russell King's avatar
Russell King committed
515 516
		b	__arm6_cache_off
		mov	pc, lr
517 518 519
@		b	__arm6_cache_on		@ untested
@		b	__arm6_cache_off
@		b	__armv3_cache_flush
Russell King's avatar
Russell King committed
520

521 522 523 524 525 526
		.word	0x00000000		@ old ARM ID
		.word	0x0000f000
		mov	pc, lr
		mov	pc, lr
		mov	pc, lr

Russell King's avatar
Russell King committed
527 528 529 530 531 532 533 534
		.word	0x41007000		@ ARM7/710
		.word	0xfff8fe00
		b	__arm7_cache_off
		b	__arm7_cache_off
		mov	pc, lr

		.word	0x41807200		@ ARM720T (writethrough)
		.word	0xffffff00
535
		b	__armv4_cache_on
Russell King's avatar
Russell King committed
536 537 538
		b	__armv4_cache_off
		mov	pc, lr

539 540 541 542 543 544 545 546
		.word	0x00007000		@ ARM7 IDs
		.word	0x0000f000
		mov	pc, lr
		mov	pc, lr
		mov	pc, lr

		@ Everything from here on will be the new ID system.

Russell King's avatar
Russell King committed
547 548
		.word	0x4401a100		@ sa110 / sa1100
		.word	0xffffffe0
549
		b	__armv4_cache_on
Russell King's avatar
Russell King committed
550 551 552 553 554
		b	__armv4_cache_off
		b	__armv4_cache_flush

		.word	0x6901b110		@ sa1110
		.word	0xfffffff0
555
		b	__armv4_cache_on
Russell King's avatar
Russell King committed
556 557 558
		b	__armv4_cache_off
		b	__armv4_cache_flush

559 560
		@ These match on the architecture ID

561 562 563 564 565 566
		.word	0x00020000		@ ARMv4T
		.word	0x000f0000
		b	__armv4_cache_on
		b	__armv4_cache_off
		b	__armv4_cache_flush

567 568 569 570 571 572 573 574
		.word	0x00050000		@ ARMv5TE
		.word	0x000f0000
		b	__armv4_cache_on
		b	__armv4_cache_off
		b	__armv4_cache_flush

		.word	0x00060000		@ ARMv5TEJ
		.word	0x000f0000
575
		b	__armv4_cache_on
Russell King's avatar
Russell King committed
576 577 578 579 580 581 582 583
		b	__armv4_cache_off
		b	__armv4_cache_flush

		.word	0			@ unrecognised type
		.word	0
		mov	pc, lr
		mov	pc, lr
		mov	pc, lr
Linus Torvalds's avatar
Linus Torvalds committed
584

Russell King's avatar
Russell King committed
585
		.size	proc_types, . - proc_types
Linus Torvalds's avatar
Linus Torvalds committed
586 587

/*
Linus Torvalds's avatar
Linus Torvalds committed
588 589
 * Turn off the Cache and MMU.  ARMv3 does not support
 * reading the control register, but ARMv4 does.
Linus Torvalds's avatar
Linus Torvalds committed
590
 *
Linus Torvalds's avatar
Linus Torvalds committed
591
 * On entry,  r6 = processor ID
Russell King's avatar
Russell King committed
592
 * On exit,   r0, r1, r2, r3, r12 corrupted
Linus Torvalds's avatar
Linus Torvalds committed
593
 * This routine must preserve: r4, r6, r7
Linus Torvalds's avatar
Linus Torvalds committed
594 595
 */
		.align	5
Russell King's avatar
Russell King committed
596 597 598 599
cache_off:	mov	r3, #12			@ cache_off function
		b	call_cache_fn

__armv4_cache_off:
Linus Torvalds's avatar
Linus Torvalds committed
600 601
		mrc	p15, 0, r0, c1, c0
		bic	r0, r0, #0x000d
Linus Torvalds's avatar
Linus Torvalds committed
602 603 604 605 606 607
		mcr	p15, 0, r0, c1, c0	@ turn MMU and cache off
		mov	r0, #0
		mcr	p15, 0, r0, c7, c7	@ invalidate whole cache v4
		mcr	p15, 0, r0, c8, c7	@ invalidate whole TLB v4
		mov	pc, lr

Russell King's avatar
Russell King committed
608
__arm6_cache_off:
609
		mov	r0, #0x00000030		@ ARM6 control reg.
Russell King's avatar
Russell King committed
610 611 612 613 614 615
		b	__armv3_cache_off

__arm7_cache_off:
		mov	r0, #0x00000070		@ ARM7 control reg.
		b	__armv3_cache_off

Linus Torvalds's avatar
Linus Torvalds committed
616
__armv3_cache_off:
617
		mcr	p15, 0, r0, c1, c0, 0	@ turn MMU and cache off
Linus Torvalds's avatar
Linus Torvalds committed
618
		mov	r0, #0
619 620
		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
		mcr	p15, 0, r0, c5, c0, 0	@ invalidate whole TLB v3
Linus Torvalds's avatar
Linus Torvalds committed
621
		mov	pc, lr
Linus Torvalds's avatar
Linus Torvalds committed
622 623 624 625 626 627 628

/*
 * Clean and flush the cache to maintain consistency.
 *
 * On entry,
 *  r6 = processor ID
 * On exit,
629
 *  r1, r2, r3, r11, r12 corrupted
Linus Torvalds's avatar
Linus Torvalds committed
630
 * This routine must preserve:
Russell King's avatar
Russell King committed
631
 *  r0, r4, r5, r6, r7
Linus Torvalds's avatar
Linus Torvalds committed
632 633 634
 */
		.align	5
cache_clean_flush:
Russell King's avatar
Russell King committed
635 636 637 638
		mov	r3, #16
		b	call_cache_fn

__armv4_cache_flush:
639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657
		mov	r2, #64*1024		@ default: 32K dcache size (*2)
		mov	r11, #32		@ default: 32 byte line size
		mrc	p15, 0, r3, c0, c0, 1	@ read cache type
		teq	r3, r6			@ cache ID register present?
		beq	no_cache_id
		mov	r1, r3, lsr #18
		and	r1, r1, #7
		mov	r2, #1024
		mov	r2, r2, lsl r1		@ base dcache size *2
		tst	r3, #1 << 14		@ test M bit
		addne	r2, r2, r2, lsr #1	@ +1/2 size if M == 1
		mov	r3, r3, lsr #12
		and	r3, r3, #3
		mov	r11, #8
		mov	r11, r11, lsl r3	@ cache line size in bytes
no_cache_id:
		bic	r1, pc, #63		@ align to longest cache line
		add	r2, r1, r2
1:		ldr	r3, [r1], r11		@ s/w flush D cache
Linus Torvalds's avatar
Linus Torvalds committed
658 659 660
		teq	r1, r2
		bne	1b

661 662
		mcr	p15, 0, r1, c7, c5, 0	@ flush I cache
		mcr	p15, 0, r1, c7, c6, 0	@ flush D cache
Linus Torvalds's avatar
Linus Torvalds committed
663 664 665
		mcr	p15, 0, r1, c7, c10, 4	@ drain WB
		mov	pc, lr

666 667 668 669 670
__armv3_cache_flush:
		mov	r1, #0
		mcr	p15, 0, r0, c7, c0, 0	@ invalidate whole cache v3
		mov	pc, lr

Linus Torvalds's avatar
Linus Torvalds committed
671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717
/*
 * Various debugging routines for printing hex characters and
 * memory, which again must be relocatable.
 */
#ifdef DEBUG
		.type	phexbuf,#object
phexbuf:	.space	12
		.size	phexbuf, . - phexbuf

phex:		adr	r3, phexbuf
		mov	r2, #0
		strb	r2, [r3, r1]
1:		subs	r1, r1, #1
		movmi	r0, r3
		bmi	puts
		and	r2, r0, #15
		mov	r0, r0, lsr #4
		cmp	r2, #10
		addge	r2, r2, #7
		add	r2, r2, #'0'
		strb	r2, [r3, r1]
		b	1b

puts:		loadsp	r3
1:		ldrb	r2, [r0], #1
		teq	r2, #0
		moveq	pc, lr
2:		writeb	r2
		mov	r1, #0x00020000
3:		subs	r1, r1, #1
		bne	3b
		teq	r2, #'\n'
		moveq	r2, #'\r'
		beq	2b
		teq	r0, #0
		bne	1b
		mov	pc, lr
putc:
		mov	r2, r0
		mov	r0, #0
		loadsp	r3
		b	2b

memdump:	mov	r12, r0
		mov	r10, lr
		mov	r11, #0
2:		mov	r0, r11, lsl #2
Linus Torvalds's avatar
Linus Torvalds committed
718 719
		add	r0, r0, r12
		mov	r1, #8
Linus Torvalds's avatar
Linus Torvalds committed
720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745
		bl	phex
		mov	r0, #':'
		bl	putc
1:		mov	r0, #' '
		bl	putc
		ldr	r0, [r12, r11, lsl #2]
		mov	r1, #8
		bl	phex
		and	r0, r11, #7
		teq	r0, #3
		moveq	r0, #' '
		bleq	putc
		and	r0, r11, #7
		add	r11, r11, #1
		teq	r0, #7
		bne	1b
		mov	r0, #'\n'
		bl	putc
		cmp	r11, #64
		blt	2b
		mov	pc, r10
#endif

reloc_end:

		.align
746
		.section ".stack", "w"
Linus Torvalds's avatar
Linus Torvalds committed
747
user_stack:	.space	4096