main.c 53.3 KB
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/*
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 * Copyright (c) 2008-2009 Atheros Communications Inc.
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 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/nl80211.h>
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#include "ath9k.h"
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#include "btcoex.h"
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static void ath_cache_conf_rate(struct ath_softc *sc,
				struct ieee80211_conf *conf)
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{
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	switch (conf->channel->band) {
	case IEEE80211_BAND_2GHZ:
		if (conf_is_ht20(conf))
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			sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
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		else if (conf_is_ht40_minus(conf))
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			sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
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		else if (conf_is_ht40_plus(conf))
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			sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
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		else
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			sc->cur_rate_mode = ATH9K_MODE_11G;
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		break;
	case IEEE80211_BAND_5GHZ:
		if (conf_is_ht20(conf))
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			sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
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		else if (conf_is_ht40_minus(conf))
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			sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
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		else if (conf_is_ht40_plus(conf))
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			sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
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		else
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			sc->cur_rate_mode = ATH9K_MODE_11A;
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		break;
	default:
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		BUG_ON(1);
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		break;
	}
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}

static void ath_update_txpow(struct ath_softc *sc)
{
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	struct ath_hw *ah = sc->sc_ah;
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	u32 txpow;

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	if (sc->curtxpow != sc->config.txpowlimit) {
		ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
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		/* read back in case value is clamped */
		ath9k_hw_getcapability(ah, ATH9K_CAP_TXPOW, 1, &txpow);
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		sc->curtxpow = txpow;
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	}
}

static u8 parse_mpdudensity(u8 mpdudensity)
{
	/*
	 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
	 *   0 for no restriction
	 *   1 for 1/4 us
	 *   2 for 1/2 us
	 *   3 for 1 us
	 *   4 for 2 us
	 *   5 for 4 us
	 *   6 for 8 us
	 *   7 for 16 us
	 */
	switch (mpdudensity) {
	case 0:
		return 0;
	case 1:
	case 2:
	case 3:
		/* Our lower layer calculations limit our precision to
		   1 microsecond */
		return 1;
	case 4:
		return 2;
	case 5:
		return 4;
	case 6:
		return 8;
	case 7:
		return 16;
	default:
		return 0;
	}
}

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static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
						struct ieee80211_hw *hw)
{
	struct ieee80211_channel *curchan = hw->conf.channel;
	struct ath9k_channel *channel;
	u8 chan_idx;

	chan_idx = curchan->hw_value;
	channel = &sc->sc_ah->channels[chan_idx];
	ath9k_update_ichannel(sc, hw, channel);
	return channel;
}

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bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
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{
	unsigned long flags;
	bool ret;

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	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	ret = ath9k_hw_setpower(sc->sc_ah, mode);
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
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	return ret;
}

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void ath9k_ps_wakeup(struct ath_softc *sc)
{
	unsigned long flags;

	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	if (++sc->ps_usecount != 1)
		goto unlock;

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	ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
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 unlock:
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
}

void ath9k_ps_restore(struct ath_softc *sc)
{
	unsigned long flags;

	spin_lock_irqsave(&sc->sc_pm_lock, flags);
	if (--sc->ps_usecount != 0)
		goto unlock;

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	if (sc->ps_idle)
		ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
	else if (sc->ps_enabled &&
		 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
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			      PS_WAIT_FOR_CAB |
			      PS_WAIT_FOR_PSPOLL_DATA |
			      PS_WAIT_FOR_TX_ACK)))
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		ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
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 unlock:
	spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
}

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/*
 * Set/change channels.  If the channel is really being changed, it's done
 * by reseting the chip.  To accomplish this we must first cleanup any pending
 * DMA, then restart stuff.
*/
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int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
		    struct ath9k_channel *hchan)
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{
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	struct ieee80211_conf *conf = &common->hw->conf;
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	bool fastcc = true, stopped;
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	struct ieee80211_channel *channel = hw->conf.channel;
	int r;
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	if (sc->sc_flags & SC_OP_INVALID)
		return -EIO;

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	ath9k_ps_wakeup(sc);

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	/*
	 * This is only performed if the channel settings have
	 * actually changed.
	 *
	 * To switch channels clear any pending DMA operations;
	 * wait long enough for the RX fifo to drain, reset the
	 * hardware at the new frequency, and then re-enable
	 * the relevant bits of the h/w.
	 */
	ath9k_hw_set_interrupts(ah, 0);
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	ath_drain_all_txq(sc, false);
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	stopped = ath_stoprecv(sc);
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	/* XXX: do not flush receive queue here. We don't want
	 * to flush data frames already in queue because of
	 * changing channel. */
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	if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
		fastcc = false;

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	ath_print(common, ATH_DBG_CONFIG,
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		  "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
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		  sc->sc_ah->curchan->channel,
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		  channel->center_freq, conf_is_ht40(conf));
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	spin_lock_bh(&sc->sc_resetlock);

	r = ath9k_hw_reset(ah, hchan, fastcc);
	if (r) {
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		ath_print(common, ATH_DBG_FATAL,
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			  "Unable to reset channel (%u MHz), "
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			  "reset status %d\n",
			  channel->center_freq, r);
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		spin_unlock_bh(&sc->sc_resetlock);
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		goto ps_restore;
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	}
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	spin_unlock_bh(&sc->sc_resetlock);

	sc->sc_flags &= ~SC_OP_FULL_RESET;

	if (ath_startrecv(sc) != 0) {
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		ath_print(common, ATH_DBG_FATAL,
			  "Unable to restart recv logic\n");
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		r = -EIO;
		goto ps_restore;
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	}

	ath_cache_conf_rate(sc, &hw->conf);
	ath_update_txpow(sc);
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	ath9k_hw_set_interrupts(ah, ah->imask);
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 ps_restore:
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	ath9k_ps_restore(sc);
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	return r;
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}

/*
 *  This routine performs the periodic noise floor calibration function
 *  that is used to adjust and optimize the chip performance.  This
 *  takes environmental changes (location, temperature) into account.
 *  When the task is complete, it reschedules itself depending on the
 *  appropriate interval that was calculated.
 */
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void ath_ani_calibrate(unsigned long data)
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{
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	struct ath_softc *sc = (struct ath_softc *)data;
	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	bool longcal = false;
	bool shortcal = false;
	bool aniflag = false;
	unsigned int timestamp = jiffies_to_msecs(jiffies);
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	u32 cal_interval, short_cal_interval;
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	short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
		ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
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	/* Only calibrate if awake */
	if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
		goto set_timer;

	ath9k_ps_wakeup(sc);

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	/* Long calibration runs independently of short calibration. */
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	if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
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		longcal = true;
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		ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
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		common->ani.longcal_timer = timestamp;
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	}

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	/* Short calibration applies only while caldone is false */
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	if (!common->ani.caldone) {
		if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
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			shortcal = true;
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			ath_print(common, ATH_DBG_ANI,
				  "shortcal @%lu\n", jiffies);
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			common->ani.shortcal_timer = timestamp;
			common->ani.resetcal_timer = timestamp;
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		}
	} else {
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		if ((timestamp - common->ani.resetcal_timer) >=
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		    ATH_RESTART_CALINTERVAL) {
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			common->ani.caldone = ath9k_hw_reset_calvalid(ah);
			if (common->ani.caldone)
				common->ani.resetcal_timer = timestamp;
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		}
	}

	/* Verify whether we must check ANI */
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	if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
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		aniflag = true;
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		common->ani.checkani_timer = timestamp;
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	}

	/* Skip all processing if there's nothing to do. */
	if (longcal || shortcal || aniflag) {
		/* Call ANI routine if necessary */
		if (aniflag)
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			ath9k_hw_ani_monitor(ah, ah->curchan);
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		/* Perform calibration if necessary */
		if (longcal || shortcal) {
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			common->ani.caldone =
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				ath9k_hw_calibrate(ah,
						   ah->curchan,
						   common->rx_chainmask,
						   longcal);
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			if (longcal)
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				common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
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								     ah->curchan);

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			ath_print(common, ATH_DBG_ANI,
				  " calibrate chan %u/%x nf: %d\n",
				  ah->curchan->channel,
				  ah->curchan->channelFlags,
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				  common->ani.noise_floor);
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		}
	}

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	ath9k_ps_restore(sc);

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set_timer:
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	/*
	* Set timer interval based on previous results.
	* The interval must be the shortest necessary to satisfy ANI,
	* short calibration and long calibration.
	*/
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	cal_interval = ATH_LONG_CALINTERVAL;
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	if (sc->sc_ah->config.enable_ani)
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		cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
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	if (!common->ani.caldone)
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		cal_interval = min(cal_interval, (u32)short_cal_interval);
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	mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
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}

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static void ath_start_ani(struct ath_common *common)
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{
	unsigned long timestamp = jiffies_to_msecs(jiffies);

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	common->ani.longcal_timer = timestamp;
	common->ani.shortcal_timer = timestamp;
	common->ani.checkani_timer = timestamp;
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	mod_timer(&common->ani.timer,
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		  jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
}

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/*
 * Update tx/rx chainmask. For legacy association,
 * hard code chainmask to 1x1, for 11n association, use
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 * the chainmask configuration, for bt coexistence, use
 * the chainmask configuration even in legacy mode.
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 */
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void ath_update_chainmask(struct ath_softc *sc, int is_ht)
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{
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
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	    (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
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		common->tx_chainmask = ah->caps.tx_chainmask;
		common->rx_chainmask = ah->caps.rx_chainmask;
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	} else {
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		common->tx_chainmask = 1;
		common->rx_chainmask = 1;
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	}

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	ath_print(common, ATH_DBG_CONFIG,
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		  "tx chmask: %d, rx chmask: %d\n",
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		  common->tx_chainmask,
		  common->rx_chainmask);
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}

static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
{
	struct ath_node *an;

	an = (struct ath_node *)sta->drv_priv;

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	if (sc->sc_flags & SC_OP_TXAGGR) {
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		ath_tx_node_init(sc, an);
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		an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
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				     sta->ht_cap.ampdu_factor);
		an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
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		an->last_rssi = ATH_RSSI_DUMMY_MARKER;
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	}
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}

static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
{
	struct ath_node *an = (struct ath_node *)sta->drv_priv;

	if (sc->sc_flags & SC_OP_TXAGGR)
		ath_tx_node_cleanup(sc, an);
}

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void ath9k_tasklet(unsigned long data)
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{
	struct ath_softc *sc = (struct ath_softc *)data;
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	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
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	u32 status = sc->intrstatus;
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	u32 rxmask;
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	ath9k_ps_wakeup(sc);

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	if ((status & ATH9K_INT_FATAL) ||
	    !ath9k_hw_check_alive(ah)) {
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		ath_reset(sc, false);
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		ath9k_ps_restore(sc);
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		return;
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	}
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	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
		rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
			  ATH9K_INT_RXORN);
	else
		rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);

	if (status & rxmask) {
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		spin_lock_bh(&sc->rx.rxflushlock);
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		/* Check for high priority Rx first */
		if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
		    (status & ATH9K_INT_RXHP))
			ath_rx_tasklet(sc, 0, true);

		ath_rx_tasklet(sc, 0, false);
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		spin_unlock_bh(&sc->rx.rxflushlock);
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	}

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	if (status & ATH9K_INT_TX) {
		if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
			ath_tx_edma_tasklet(sc);
		else
			ath_tx_tasklet(sc);
	}
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	if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
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		/*
		 * TSF sync does not look correct; remain awake to sync with
		 * the next Beacon.
		 */
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		ath_print(common, ATH_DBG_PS,
			  "TSFOOR - Sync with next Beacon\n");
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		sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
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	}

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	if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
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		if (status & ATH9K_INT_GENTIMER)
			ath_gen_timer_isr(sc->sc_ah);

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	/* re-enable hardware interrupt */
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	ath9k_hw_set_interrupts(ah, ah->imask);
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	ath9k_ps_restore(sc);
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}

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irqreturn_t ath_isr(int irq, void *dev)
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{
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#define SCHED_INTR (				\
		ATH9K_INT_FATAL |		\
		ATH9K_INT_RXORN |		\
		ATH9K_INT_RXEOL |		\
		ATH9K_INT_RX |			\
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		ATH9K_INT_RXLP |		\
		ATH9K_INT_RXHP |		\
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		ATH9K_INT_TX |			\
		ATH9K_INT_BMISS |		\
		ATH9K_INT_CST |			\
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		ATH9K_INT_TSFOOR |		\
		ATH9K_INT_GENTIMER)
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	struct ath_softc *sc = dev;
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	struct ath_hw *ah = sc->sc_ah;
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	enum ath9k_int status;
	bool sched = false;

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	/*
	 * The hardware is not ready/present, don't
	 * touch anything. Note this can happen early
	 * on if the IRQ is shared.
	 */
	if (sc->sc_flags & SC_OP_INVALID)
		return IRQ_NONE;
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	/* shared irq, not for us */

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	if (!ath9k_hw_intrpend(ah))
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		return IRQ_NONE;

	/*
	 * Figure out the reason(s) for the interrupt.  Note
	 * that the hal returns a pseudo-ISR that may include
	 * bits we haven't explicitly enabled so we mask the
	 * value to insure we only process bits we requested.
	 */
	ath9k_hw_getisr(ah, &status);	/* NB: clears ISR too */
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	status &= ah->imask;	/* discard unasked-for bits */
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	/*
	 * If there are no status bits set, then this interrupt was not
	 * for me (should have been caught above).
	 */
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	if (!status)
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		return IRQ_NONE;
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	/* Cache the status */
	sc->intrstatus = status;

	if (status & SCHED_INTR)
		sched = true;

	/*
	 * If a FATAL or RXORN interrupt is received, we have to reset the
	 * chip immediately.
	 */
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	if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
	    !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
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		goto chip_reset;

	if (status & ATH9K_INT_SWBA)
		tasklet_schedule(&sc->bcon_tasklet);

	if (status & ATH9K_INT_TXURN)
		ath9k_hw_updatetxtriglevel(ah, true);

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	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
		if (status & ATH9K_INT_RXEOL) {
			ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
			ath9k_hw_set_interrupts(ah, ah->imask);
		}
	}

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	if (status & ATH9K_INT_MIB) {
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		/*
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		 * Disable interrupts until we service the MIB
		 * interrupt; otherwise it will continue to
		 * fire.
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		 */
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		ath9k_hw_set_interrupts(ah, 0);
		/*
		 * Let the hal handle the event. We assume
		 * it will clear whatever condition caused
		 * the interrupt.
		 */
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		ath9k_hw_procmibevent(ah);
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		ath9k_hw_set_interrupts(ah, ah->imask);
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	}
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	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
		if (status & ATH9K_INT_TIM_TIMER) {
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			/* Clear RxAbort bit so that we can
			 * receive frames */
556
			ath9k_setpower(sc, ATH9K_PM_AWAKE);
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			ath9k_hw_setrxabort(sc->sc_ah, 0);
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			sc->ps_flags |= PS_WAIT_FOR_BEACON;
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		}
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chip_reset:
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	ath_debug_stat_interrupt(sc, status);

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	if (sched) {
		/* turn off every interrupt except SWBA */
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		ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
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		tasklet_schedule(&sc->intr_tq);
	}

	return IRQ_HANDLED;
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#undef SCHED_INTR
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}

576
static u32 ath_get_extchanmode(struct ath_softc *sc,
577
			       struct ieee80211_channel *chan,
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			       enum nl80211_channel_type channel_type)
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{
	u32 chanmode = 0;

	switch (chan->band) {
	case IEEE80211_BAND_2GHZ:
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		switch(channel_type) {
		case NL80211_CHAN_NO_HT:
		case NL80211_CHAN_HT20:
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			chanmode = CHANNEL_G_HT20;
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			break;
		case NL80211_CHAN_HT40PLUS:
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			chanmode = CHANNEL_G_HT40PLUS;
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			break;
		case NL80211_CHAN_HT40MINUS:
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			chanmode = CHANNEL_G_HT40MINUS;
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			break;
		}
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		break;
	case IEEE80211_BAND_5GHZ:
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		switch(channel_type) {
		case NL80211_CHAN_NO_HT:
		case NL80211_CHAN_HT20:
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			chanmode = CHANNEL_A_HT20;
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			break;
		case NL80211_CHAN_HT40PLUS:
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			chanmode = CHANNEL_A_HT40PLUS;
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			break;
		case NL80211_CHAN_HT40MINUS:
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			chanmode = CHANNEL_A_HT40MINUS;
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			break;
		}
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		break;
	default:
		break;
	}

	return chanmode;
}

618
static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
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			   struct ath9k_keyval *hk, const u8 *addr,
			   bool authenticator)
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{
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	struct ath_hw *ah = common->ah;
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	const u8 *key_rxmic;
	const u8 *key_txmic;
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	key_txmic = key + NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY;
	key_rxmic = key + NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY;
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	if (addr == NULL) {
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		/*
		 * Group key installation - only two key cache entries are used
		 * regardless of splitmic capability since group key is only
		 * used either for TX or RX.
		 */
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		if (authenticator) {
			memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
			memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_mic));
		} else {
			memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
			memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
		}
642
		return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
643
	}
644
	if (!common->splitmic) {
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		/* TX and RX keys share the same key cache entry. */
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		memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
		memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
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		return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
649
	}
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	/* Separate key cache entries for TX and RX */

	/* TX key goes at first index, RX key at +32. */
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	memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
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	if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
656
		/* TX MIC entry failed. No need to proceed further */
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		ath_print(common, ATH_DBG_FATAL,
658
			  "Setting TX MIC Key Failed\n");
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		return 0;
	}

	memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
	/* XXX delete tx key on failure? */
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	return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
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}

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static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
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{
	int i;

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	for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
		if (test_bit(i, common->keymap) ||
		    test_bit(i + 64, common->keymap))
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			continue; /* At least one part of TKIP key allocated */
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		if (common->splitmic &&
		    (test_bit(i + 32, common->keymap) ||
		     test_bit(i + 64 + 32, common->keymap)))
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			continue; /* At least one part of TKIP key allocated */

		/* Found a free slot for a TKIP key */
		return i;
	}
	return -1;
}

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static int ath_reserve_key_cache_slot(struct ath_common *common)
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{
	int i;

	/* First, try to find slots that would not be available for TKIP. */
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	if (common->splitmic) {
		for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
			if (!test_bit(i, common->keymap) &&
			    (test_bit(i + 32, common->keymap) ||
			     test_bit(i + 64, common->keymap) ||
			     test_bit(i + 64 + 32, common->keymap)))
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				return i;
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			if (!test_bit(i + 32, common->keymap) &&
			    (test_bit(i, common->keymap) ||
			     test_bit(i + 64, common->keymap) ||
			     test_bit(i + 64 + 32, common->keymap)))
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				return i + 32;
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			if (!test_bit(i + 64, common->keymap) &&
			    (test_bit(i , common->keymap) ||
			     test_bit(i + 32, common->keymap) ||
			     test_bit(i + 64 + 32, common->keymap)))
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				return i + 64;
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			if (!test_bit(i + 64 + 32, common->keymap) &&
			    (test_bit(i, common->keymap) ||
			     test_bit(i + 32, common->keymap) ||
			     test_bit(i + 64, common->keymap)))
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				return i + 64 + 32;
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		}
	} else {
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		for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
			if (!test_bit(i, common->keymap) &&
			    test_bit(i + 64, common->keymap))
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				return i;
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			if (test_bit(i, common->keymap) &&
			    !test_bit(i + 64, common->keymap))
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				return i + 64;
		}
	}

	/* No partially used TKIP slots, pick any available slot */
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	for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
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		/* Do not allow slots that could be needed for TKIP group keys
		 * to be used. This limitation could be removed if we know that
		 * TKIP will not be used. */
		if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
			continue;
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		if (common->splitmic) {
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			if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
				continue;
			if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
				continue;
		}

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		if (!test_bit(i, common->keymap))
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			return i; /* Found a free slot for a key */
	}

	/* No free slot found */
	return -1;
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}

747
static int ath_key_config(struct ath_common *common,
748
			  struct ieee80211_vif *vif,
749
			  struct ieee80211_sta *sta,
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			  struct ieee80211_key_conf *key)
{
752
	struct ath_hw *ah = common->ah;
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	struct ath9k_keyval hk;
	const u8 *mac = NULL;
755
	u8 gmac[ETH_ALEN];
756
	int ret = 0;
757
	int idx;
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	memset(&hk, 0, sizeof(hk));

	switch (key->alg) {
	case ALG_WEP:
		hk.kv_type = ATH9K_CIPHER_WEP;
		break;
	case ALG_TKIP:
		hk.kv_type = ATH9K_CIPHER_TKIP;
		break;
	case ALG_CCMP:
		hk.kv_type = ATH9K_CIPHER_AES_CCM;
		break;
	default:
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		return -EOPNOTSUPP;
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	}

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	hk.kv_len = key->keylen;
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	memcpy(hk.kv_val, key->key, key->keylen);

778
	if (!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
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		if (key->ap_addr) {
			/*
			 * Group keys on hardware that supports multicast frame
			 * key search use a mac that is the sender's address with
			 * the high bit set instead of the app-specified address.
			 */
			memcpy(gmac, key->ap_addr, ETH_ALEN);
			gmac[0] |= 0x80;
			mac = gmac;

			if (key->alg == ALG_TKIP)
				idx = ath_reserve_key_cache_slot_tkip(common);
			else
				idx = ath_reserve_key_cache_slot(common);
			if (idx < 0)
				mac = NULL; /* no free key cache entries */
		}

		if (!mac) {
			/* For now, use the default keys for broadcast keys. This may
			 * need to change with virtual interfaces. */
			idx = key->keyidx;
		}
803
	} else if (key->keyidx) {
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		if (WARN_ON(!sta))
			return -EOPNOTSUPP;
		mac = sta->addr;

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		if (vif->type != NL80211_IFTYPE_AP) {
			/* Only keyidx 0 should be used with unicast key, but
			 * allow this for client mode for now. */
			idx = key->keyidx;
		} else
			return -EIO;
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	} else {
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		if (WARN_ON(!sta))
			return -EOPNOTSUPP;
		mac = sta->addr;

819
		if (key->alg == ALG_TKIP)
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			idx = ath_reserve_key_cache_slot_tkip(common);
821
		else
822
			idx = ath_reserve_key_cache_slot(common);
823
		if (idx < 0)
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			return -ENOSPC; /* no free key cache entries */
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	}

	if (key->alg == ALG_TKIP)
828
		ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
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				      vif->type == NL80211_IFTYPE_AP);
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	else
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		ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
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	if (!ret)
		return -EIO;

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	set_bit(idx, common->keymap);
837
	if (key->alg == ALG_TKIP) {
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		set_bit(idx + 64, common->keymap);
		if (common->splitmic) {
			set_bit(idx + 32, common->keymap);
			set_bit(idx + 64 + 32, common->keymap);
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		}
	}

	return idx;
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}

848
static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
849
{
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	struct ath_hw *ah = common->ah;

	ath9k_hw_keyreset(ah, key->hw_key_idx);
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	if (key->hw_key_idx < IEEE80211_WEP_NKID)
		return;

856
	clear_bit(key->hw_key_idx, common->keymap);
857 858
	if (key->alg != ALG_TKIP)
		return;
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	clear_bit(key->hw_key_idx + 64, common->keymap);
	if (common->splitmic) {
862
		ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
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		clear_bit(key->hw_key_idx + 32, common->keymap);
		clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
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	}
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}

868
static void ath9k_bss_assoc_info(struct ath_softc *sc,
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				 struct ieee80211_vif *vif,
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				 struct ieee80211_bss_conf *bss_conf)
871
{
872
	struct ath_hw *ah = sc->sc_ah;
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	struct ath_common *common = ath9k_hw_common(ah);
874

875
	if (bss_conf->assoc) {
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		ath_print(common, ATH_DBG_CONFIG,
			  "Bss Info ASSOC %d, bssid: %pM\n",
			   bss_conf->aid, common->curbssid);
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		/* New association, store aid */
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		common->curaid = bss_conf->aid;
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		ath9k_hw_write_associd(ah);
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		/*
		 * Request a re-configuration of Beacon related timers
		 * on the receipt of the first Beacon frame (i.e.,
		 * after time sync with the AP).
		 */
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		sc->ps_flags |= PS_BEACON_SYNC;
890

891
		/* Configure the beacon */
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		ath_beacon_config(sc, vif);
893

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		/* Reset rssi stats */
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		sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
896

897
		ath_start_ani(common);
898
	} else {
899
		ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
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		common->curaid = 0;
901
		/* Stop ANI */
902
		del_timer_sync(&common->ani.timer);
903
	}
904
}
905

906
void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
907
{
908
	struct ath_hw *ah = sc->sc_ah;
909
	struct ath_common *common = ath9k_hw_common(ah);
910
	struct ieee80211_channel *channel = hw->conf.channel;
911
	int r;
912

913
	ath9k_ps_wakeup(sc);
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	ath9k_hw_configpcipowersave(ah, 0, 0);
915

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	if (!ah->curchan)
		ah->curchan = ath_get_curchannel(sc, sc->hw);

919
	spin_lock_bh(&sc->sc_resetlock);
920
	r = ath9k_hw_reset(ah, ah->curchan, false);
921
	if (r) {
922
		ath_print(common, ATH_DBG_FATAL,
923
			  "Unable to reset channel (%u MHz), "
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			  "reset status %d\n",
			  channel->center_freq, r);
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	}
	spin_unlock_bh(&sc->sc_resetlock);

	ath_update_txpow(sc);
	if (ath_startrecv(sc) != 0) {
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		ath_print(common, ATH_DBG_FATAL,
			  "Unable to restart recv logic\n");
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		return;
	}

	if (sc->sc_flags & SC_OP_BEACONS)
937
		ath_beacon_config(sc, NULL);	/* restart beacons */
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	/* Re-Enable  interrupts */
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	ath9k_hw_set_interrupts(ah, ah->imask);
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	/* Enable LED */
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	ath9k_hw_cfg_output(ah, ah->led_pin,
944
			    AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
945
	ath9k_hw_set_gpio(ah, ah->led_pin, 0);
946

947
	ieee80211_wake_queues(hw);
948
	ath9k_ps_restore(sc);
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}

951
void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
952
{
953
	struct ath_hw *ah = sc->sc_ah;
954
	struct ieee80211_channel *channel = hw->conf.channel;
955
	int r;
956

957
	ath9k_ps_wakeup(sc);
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	ieee80211_stop_queues(hw);
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	/* Disable LED */
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	ath9k_hw_set_gpio(ah, ah->led_pin, 1);
	ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
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	/* Disable interrupts */
	ath9k_hw_set_interrupts(ah, 0);

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	ath_drain_all_txq(sc, false);	/* clear pending tx frames */
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	ath_stoprecv(sc);		/* turn off frame recv */
	ath_flushrecv(sc);		/* flush recv queue */

971
	if (!ah->curchan)
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		ah->curchan = ath_get_curchannel(sc, hw);
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974
	spin_lock_bh(&sc->sc_resetlock);
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	r = ath9k_hw_reset(ah, ah->curchan, false);
976
	if (r) {
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		ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
978
			  "Unable to reset channel (%u MHz), "
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			  "reset status %d\n",
			  channel->center_freq, r);
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	}
	spin_unlock_bh(&sc->sc_resetlock);

	ath9k_hw_phy_disable(ah);
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	ath9k_hw_configpcipowersave(ah, 1, 1);
986
	ath9k_ps_restore(sc);
987
	ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
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}

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int ath_reset(struct ath_softc *sc, bool retry_tx)
{
992
	struct ath_hw *ah = sc->sc_ah;
993
	struct ath_common *common = ath9k_hw_common(ah);
994
	struct ieee80211_hw *hw = sc->hw;
995
	int r;
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	/* Stop ANI */
	del_timer_sync(&common->ani.timer);

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	ieee80211_stop_queues(hw);

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	ath9k_hw_set_interrupts(ah, 0);
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	ath_drain_all_txq(sc, retry_tx);
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	ath_stoprecv(sc);
	ath_flushrecv(sc);

	spin_lock_bh(&sc->sc_resetlock);
1008
	r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1009
	if (r)
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		ath_print(common, ATH_DBG_FATAL,
			  "Unable to reset hardware; reset status %d\n", r);
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	spin_unlock_bh(&sc->sc_resetlock);

	if (ath_startrecv(sc) != 0)
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		ath_print(common, ATH_DBG_FATAL,
			  "Unable to start recv logic\n");
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	/*
	 * We may be doing a reset in response to a request
	 * that changes the channel so update any state that
	 * might change as a result.
	 */
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	ath_cache_conf_rate(sc, &hw->conf);
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	ath_update_txpow(sc);

	if (sc->sc_flags & SC_OP_BEACONS)
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		ath_beacon_config(sc, NULL);	/* restart beacons */
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	ath9k_hw_set_interrupts(ah, ah->imask);
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	if (retry_tx) {
		int i;
		for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
			if (ATH_TXQ_SETUP(sc, i)) {
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				spin_lock_bh(&sc->tx.txq[i].axq_lock);
				ath_txq_schedule(sc, &sc->tx.txq[i]);
				spin_unlock_bh(&sc->tx.txq[i].axq_lock);
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			}
		}
	}

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	ieee80211_wake_queues(hw);

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	/* Start ANI */
	ath_start_ani(common);

1048
	return r;
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}

int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
{
	int qnum;

	switch (queue) {
	case 0:
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		qnum = sc->tx.hwq_map[ATH9K_WME_AC_VO];
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		break;
	case 1:
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		qnum = sc->tx.hwq_map[ATH9K_WME_AC_VI];
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		break;
	case 2:
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		qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
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		break;
	case 3:
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		qnum = sc->tx.hwq_map[ATH9K_WME_AC_BK];
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		break;
	default:
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1069
		qnum = sc->tx.hwq_map[ATH9K_WME_AC_BE];
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		break;
	}

	return qnum;
}

int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
{
	int qnum;

	switch (queue) {
	case ATH9K_WME_AC_VO:
		qnum = 0;
		break;
	case ATH9K_WME_AC_VI:
		qnum = 1;
		break;
	case ATH9K_WME_AC_BE:
		qnum = 2;
		break;
	case ATH9K_WME_AC_BK:
		qnum = 3;
		break;
	default:
		qnum = -1;
		break;
	}

	return qnum;
}

1101 1102
/* XXX: Remove me once we don't depend on ath9k_channel for all
 * this redundant data */
1103 1104
void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
			   struct ath9k_channel *ichan)
1105 1106 1107 1108 1109 1110 1111 1112 1113
{
	struct ieee80211_channel *chan = hw->conf.channel;
	struct ieee80211_conf *conf = &hw->conf;

	ichan->channel = chan->center_freq;
	ichan->chan = chan;

	if (chan->band == IEEE80211_BAND_2GHZ) {
		ichan->chanmode = CHANNEL_G;
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1114
		ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1115 1116 1117 1118 1119
	} else {
		ichan->chanmode = CHANNEL_A;
		ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
	}

1120
	if (conf_is_ht(conf))
1121 1122 1123 1124
		ichan->chanmode = ath_get_extchanmode(sc, chan,
					    conf->channel_type);
}

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1125 1126 1127 1128
/**********************/
/* mac80211 callbacks */
/**********************/

1129
static int ath9k_start(struct ieee80211_hw *hw)
1130
{
1131 1132
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1133
	struct ath_hw *ah = sc->sc_ah;
1134
	struct ath_common *common = ath9k_hw_common(ah);
1135
	struct ieee80211_channel *curchan = hw->conf.channel;
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1136
	struct ath9k_channel *init_channel;
1137
	int r;
1138

1139 1140 1141
	ath_print(common, ATH_DBG_CONFIG,
		  "Starting driver with initial channel: %d MHz\n",
		  curchan->center_freq);
1142

1143 1144
	mutex_lock(&sc->mutex);

1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165
	if (ath9k_wiphy_started(sc)) {
		if (sc->chan_idx == curchan->hw_value) {
			/*
			 * Already on the operational channel, the new wiphy
			 * can be marked active.
			 */
			aphy->state = ATH_WIPHY_ACTIVE;
			ieee80211_wake_queues(hw);
		} else {
			/*
			 * Another wiphy is on another channel, start the new
			 * wiphy in paused state.
			 */
			aphy->state = ATH_WIPHY_PAUSED;
			ieee80211_stop_queues(hw);
		}
		mutex_unlock(&sc->mutex);
		return 0;
	}
	aphy->state = ATH_WIPHY_ACTIVE;

1166
	/* setup initial channel */
1167

1168
	sc->chan_idx = curchan->hw_value;
1169

1170
	init_channel = ath_get_curchannel(sc, hw);
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1171 1172

	/* Reset SERDES registers */
1173
	ath9k_hw_configpcipowersave(ah, 0, 0);
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	/*
	 * The basic interface to setting the hardware in a good
	 * state is ``reset''.  On return the hardware is known to
	 * be powered up and with interrupts disabled.  This must
	 * be followed by initialization of the appropriate bits
	 * and then setup of the interrupt mask.
	 */
	spin_lock_bh(&sc->sc_resetlock);
1183
	r = ath9k_hw_reset(ah, init_channel, false);
1184
	if (r) {
1185 1186 1187 1188
		ath_print(common, ATH_DBG_FATAL,
			  "Unable to reset hardware; reset status %d "
			  "(freq %u MHz)\n", r,
			  curchan->center_freq);
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1189
		spin_unlock_bh(&sc->sc_resetlock);
1190
		goto mutex_unlock;
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	}
	spin_unlock_bh(&sc->sc_resetlock);

	/*
	 * This is needed only to setup initial state
	 * but it's best done after a reset.
	 */
	ath_update_txpow(sc);
1199

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1200 1201 1202 1203 1204 1205 1206 1207
	/*
	 * Setup the hardware after reset:
	 * The receive engine is set going.
	 * Frame transmit is handled entirely
	 * in the frame output path; there's nothing to do
	 * here except setup the interrupt mask.
	 */
	if (ath_startrecv(sc) != 0) {
1208 1209
		ath_print(common, ATH_DBG_FATAL,
			  "Unable to start recv logic\n");
1210 1211
		r = -EIO;
		goto mutex_unlock;
1212
	}
1213

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1214
	/* Setup our intr mask. */
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	ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
		    ATH9K_INT_RXORN | ATH9K_INT_FATAL |
		    ATH9K_INT_GLOBAL;

	if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
		ah->imask |= ATH9K_INT_RXHP | ATH9K_INT_RXLP;
	else
		ah->imask |= ATH9K_INT_RX;
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1223

1224
	if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
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1225
		ah->imask |= ATH9K_INT_GTT;
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1226

1227
	if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
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1228
		ah->imask |= ATH9K_INT_CST;
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1229

1230
	ath_cache_conf_rate(sc, &hw->conf);
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1231 1232 1233 1234

	sc->sc_flags &= ~SC_OP_INVALID;

	/* Disable BMISS interrupt when we're not associated */
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1235 1236
	ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
	ath9k_hw_set_interrupts(ah, ah->imask);
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1237

1238
	ieee80211_wake_queues(hw);
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1239

1240
	ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1241

1242 1243
	if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
	    !ah->btcoex_hw.enabled) {
1244 1245
		ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
					   AR_STOMP_LOW_WLAN_WGHT);
1246
		ath9k_hw_btcoex_enable(ah);
1247

1248 1249
		if (common->bus_ops->bt_coex_prep)
			common->bus_ops->bt_coex_prep(common);
1250
		if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1251
			ath9k_btcoex_timer_resume(sc);
1252 1253
	}

1254 1255 1256
mutex_unlock:
	mutex_unlock(&sc->mutex);

1257
	return r;
1258 1259
}

1260 1261
static int ath9k_tx(struct ieee80211_hw *hw,
		    struct sk_buff *skb)
1262
{
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	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1264 1265
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1266
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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1267
	struct ath_tx_control txctl;
1268 1269
	int padpos, padsize;
	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
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1270

1271
	if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1272 1273 1274
		ath_print(common, ATH_DBG_XMIT,
			  "ath9k: %s: TX in unexpected wiphy state "
			  "%d\n", wiphy_name(hw->wiphy), aphy->state);
1275 1276 1277
		goto exit;
	}

1278
	if (sc->ps_enabled) {
1279 1280 1281 1282 1283 1284 1285
		/*
		 * mac80211 does not set PM field for normal data frames, so we
		 * need to update that based on the current PS mode.
		 */
		if (ieee80211_is_data(hdr->frame_control) &&
		    !ieee80211_is_nullfunc(hdr->frame_control) &&
		    !ieee80211_has_pm(hdr->frame_control)) {
1286 1287
			ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
				  "while in PS mode\n");
1288 1289 1290 1291
			hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
		}
	}

1292 1293 1294 1295 1296 1297 1298 1299 1300
	if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
		/*
		 * We are using PS-Poll and mac80211 can request TX while in
		 * power save mode. Need to wake up hardware for the TX to be
		 * completed and if needed, also for RX of buffered frames.
		 */
		ath9k_ps_wakeup(sc);
		ath9k_hw_setrxabort(sc->sc_ah, 0);
		if (ieee80211_is_pspoll(hdr->frame_control)) {
1301 1302
			ath_print(common, ATH_DBG_PS,
				  "Sending PS-Poll to pick a buffered frame\n");
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1303
			sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1304
		} else {
1305 1306
			ath_print(common, ATH_DBG_PS,
				  "Wake up to complete TX\n");
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1307
			sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1308 1309 1310 1311 1312 1313 1314 1315 1316
		}
		/*
		 * The actual restore operation will happen only after
		 * the sc_flags bit is cleared. We are just dropping
		 * the ps_usecount here.
		 */
		ath9k_ps_restore(sc);
	}

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1317
	memset(&txctl, 0, sizeof(struct ath_tx_control));
1318

1319 1320 1321 1322 1323 1324 1325
	/*
	 * As a temporary workaround, assign seq# here; this will likely need
	 * to be cleaned up to work better with Beacon transmission and virtual
	 * BSSes.
	 */
	if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
		if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
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1326
			sc->tx.seq_no += 0x10;
1327
		hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
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1328
		hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1329
	}
1330

1331
	/* Add the padding after the header if this is not already done */
1332 1333 1334
	padpos = ath9k_cmn_padpos(hdr->frame_control);
	padsize = padpos & 3;
	if (padsize && skb->len>padpos) {
1335 1336 1337
		if (skb_headroom(skb) < padsize)
			return -1;
		skb_push(skb, padsize);
1338
		memmove(skb->data, skb->data + padsize, padpos);
1339 1340
	}

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	/* Check if a tx queue is available */

	txctl.txq = ath_test_get_txq(sc, skb);
	if (!txctl.txq)
		goto exit;

1347
	ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1348

1349
	if (ath_tx_start(hw, skb, &txctl) != 0) {
1350
		ath_print(common, ATH_DBG_XMIT, "TX failed\n");
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1351
		goto exit;
1352 1353
	}

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1354 1355 1356
	return 0;
exit:
	dev_kfree_skb_any(skb);
1357
	return 0;
1358 1359
}

1360
static void ath9k_stop(struct ieee80211_hw *hw)
1361
{
1362 1363
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1364
	struct ath_hw *ah = sc->sc_ah;
1365
	struct ath_common *common = ath9k_hw_common(ah);
1366

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1367 1368
	mutex_lock(&sc->mutex);

1369 1370
	aphy->state = ATH_WIPHY_INACTIVE;

1371 1372 1373 1374 1375 1376 1377 1378
	cancel_delayed_work_sync(&sc->ath_led_blink_work);
	cancel_delayed_work_sync(&sc->tx_complete_work);

	if (!sc->num_sec_wiphy) {
		cancel_delayed_work_sync(&sc->wiphy_work);
		cancel_work_sync(&sc->chan_work);
	}

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1379
	if (sc->sc_flags & SC_OP_INVALID) {
1380
		ath_print(common, ATH_DBG_ANY, "Device not present\n");
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1381
		mutex_unlock(&sc->mutex);
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1382 1383
		return;
	}
1384

1385 1386 1387 1388 1389
	if (ath9k_wiphy_started(sc)) {
		mutex_unlock(&sc->mutex);
		return; /* another wiphy still in use */
	}

1390 1391 1392
	/* Ensure HW is awake when we try to shut it down. */
	ath9k_ps_wakeup(sc);

1393
	if (ah->btcoex_hw.enabled) {
1394
		ath9k_hw_btcoex_disable(ah);
1395
		if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1396
			ath9k_btcoex_timer_pause(sc);
1397 1398
	}

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1399 1400
	/* make sure h/w will not generate any interrupt
	 * before setting the invalid flag. */
1401
	ath9k_hw_set_interrupts(ah, 0);
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1402 1403

	if (!(sc->sc_flags & SC_OP_INVALID)) {
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1404
		ath_drain_all_txq(sc, false);
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1405
		ath_stoprecv(sc);
1406
		ath9k_hw_phy_disable(ah);
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1407
	} else
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1408
		sc->rx.rxlink = NULL;
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1409 1410

	/* disable HAL and put h/w to sleep */
1411 1412
	ath9k_hw_disable(ah);
	ath9k_hw_configpcipowersave(ah, 1, 1);
1413 1414 1415
	ath9k_ps_restore(sc);

	/* Finally, put the chip in FULL SLEEP mode */
1416
	ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
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1417 1418

	sc->sc_flags |= SC_OP_INVALID;
1419

1420 1421
	mutex_unlock(&sc->mutex);

1422
	ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1423 1424
}

1425
static int ath9k_add_interface(struct ieee80211_hw *hw,
1426
			       struct ieee80211_vif *vif)
1427
{
1428 1429
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
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1430 1431
	struct ath_hw *ah = sc->sc_ah;
	struct ath_common *common = ath9k_hw_common(ah);
1432
	struct ath_vif *avp = (void *)vif->drv_priv;
1433
	enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1434
	int ret = 0;
1435

1436 1437
	mutex_lock(&sc->mutex);

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1438
	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1439 1440 1441 1442 1443
	    sc->nvifs > 0) {
		ret = -ENOBUFS;
		goto out;
	}

1444
	switch (vif->type) {
1445
	case NL80211_IFTYPE_STATION:
1446
		ic_opmode = NL80211_IFTYPE_STATION;
1447
		break;
1448 1449
	case NL80211_IFTYPE_ADHOC:
	case NL80211_IFTYPE_AP:
1450
	case NL80211_IFTYPE_MESH_POINT:
1451 1452 1453 1454
		if (sc->nbcnvifs >= ATH_BCBUF) {
			ret = -ENOBUFS;
			goto out;
		}
1455
		ic_opmode = vif->type;
1456 1457
		break;
	default:
1458
		ath_print(common, ATH_DBG_FATAL,
1459
			"Interface type %d not yet supported\n", vif->type);
1460 1461
		ret = -EOPNOTSUPP;
		goto out;
1462 1463
	}

1464 1465
	ath_print(common, ATH_DBG_CONFIG,
		  "Attach a VIF of type: %d\n", ic_opmode);
1466

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1467
	/* Set the VIF opmode */
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1468 1469 1470
	avp->av_opmode = ic_opmode;
	avp->av_bslot = -1;

1471
	sc->nvifs++;
1472

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1473
	if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1474 1475
		ath9k_set_bssid_mask(hw);

1476 1477 1478
	if (sc->nvifs > 1)
		goto out; /* skip global settings for secondary vif */

1479
	if (ic_opmode == NL80211_IFTYPE_AP) {
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1480
		ath9k_hw_set_tsfadjust(ah, 1);
1481 1482
		sc->sc_flags |= SC_OP_TSF_RESET;
	}
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1483 1484

	/* Set the device opmode */
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1485
	ah->opmode = ic_opmode;
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1487 1488 1489 1490
	/*
	 * Enable MIB interrupts when there are hardware phy counters.
	 * Note we only do this (at the moment) for station mode.
	 */
1491 1492 1493
	if ((vif->type == NL80211_IFTYPE_STATION) ||
	    (vif->type == NL80211_IFTYPE_ADHOC) ||
	    (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1494 1495
		if (ah->config.enable_ani)
			ah->imask |= ATH9K_INT_MIB;
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		ah->imask |= ATH9K_INT_TSFOOR;
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	}

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	ath9k_hw_set_interrupts(ah, ah->imask);
1500

1501 1502 1503
	if (vif->type == NL80211_IFTYPE_AP    ||
	    vif->type == NL80211_IFTYPE_ADHOC ||
	    vif->type == NL80211_IFTYPE_MONITOR)
1504
		ath_start_ani(common);
1505

1506
out:
1507
	mutex_unlock(&sc->mutex);
1508
	return ret;
1509 1510
}

1511
static void ath9k_remove_interface(struct ieee80211_hw *hw,
1512
				   struct ieee80211_vif *vif)
1513
{
1514 1515
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1516
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1517
	struct ath_vif *avp = (void *)vif->drv_priv;
1518
	int i;
1519

1520
	ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1521

1522 1523
	mutex_lock(&sc->mutex);

1524
	/* Stop ANI */
1525
	del_timer_sync(&common->ani.timer);
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1526

1527
	/* Reclaim beacon resources */
1528 1529 1530
	if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
	    (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
	    (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1531
		ath9k_ps_wakeup(sc);
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1532
		ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1533
		ath9k_ps_restore(sc);
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1534
	}
1535

1536
	ath_beacon_return(sc, avp);
1537
	sc->sc_flags &= ~SC_OP_BEACONS;
1538

1539
	for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1540
		if (sc->beacon.bslot[i] == vif) {
1541 1542 1543
			printk(KERN_DEBUG "%s: vif had allocated beacon "
			       "slot\n", __func__);
			sc->beacon.bslot[i] = NULL;
1544
			sc->beacon.bslot_aphy[i] = NULL;
1545 1546 1547
		}
	}

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1548
	sc->nvifs--;
1549 1550

	mutex_unlock(&sc->mutex);
1551 1552
}

1553 1554
void ath9k_enable_ps(struct ath_softc *sc)
{
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1555 1556
	struct ath_hw *ah = sc->sc_ah;

1557
	sc->ps_enabled = true;
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	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
		if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
			ah->imask |= ATH9K_INT_TIM_TIMER;
			ath9k_hw_set_interrupts(ah, ah->imask);
1562 1563
		}
	}
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1564
	ath9k_hw_setrxabort(ah, 1);
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}

1567
static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1568
{
1569 1570
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1571
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1572
	struct ieee80211_conf *conf = &hw->conf;
1573
	struct ath_hw *ah = sc->sc_ah;
1574
	bool disable_radio;
1575

1576
	mutex_lock(&sc->mutex);
1577

1578 1579 1580 1581 1582 1583
	/*
	 * Leave this as the first check because we need to turn on the
	 * radio if it was disabled before prior to processing the rest
	 * of the changes. Likewise we must only disable the radio towards
	 * the end.
	 */
1584
	if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1585 1586 1587
		bool enable_radio;
		bool all_wiphys_idle;
		bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1588 1589 1590

		spin_lock_bh(&sc->wiphy_lock);
		all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1591 1592
		ath9k_set_wiphy_idle(aphy, idle);

1593
		enable_radio = (!idle && all_wiphys_idle);
1594 1595 1596 1597 1598 1599 1600

		/*
		 * After we unlock here its possible another wiphy
		 * can be re-renabled so to account for that we will
		 * only disable the radio toward the end of this routine
		 * if by then all wiphys are still idle.
		 */
1601 1602
		spin_unlock_bh(&sc->wiphy_lock);

1603
		if (enable_radio) {
1604
			sc->ps_idle = false;
1605
			ath_radio_enable(sc, hw);
1606 1607
			ath_print(common, ATH_DBG_CONFIG,
				  "not-idle: enabling radio\n");
1608 1609 1610
		}
	}

1611 1612 1613 1614 1615 1616
	/*
	 * We just prepare to enable PS. We have to wait until our AP has
	 * ACK'd our null data frame to disable RX otherwise we'll ignore
	 * those ACKs and end up retransmitting the same null data frames.
	 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
	 */
1617 1618
	if (changed & IEEE80211_CONF_CHANGE_PS) {
		if (conf->flags & IEEE80211_CONF_PS) {
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1619
			sc->ps_flags |= PS_ENABLED;
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			/*
			 * At this point we know hardware has received an ACK
			 * of a previously sent null data frame.
			 */
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1624 1625
			if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
				sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1626
				ath9k_enable_ps(sc);
1627
                        }
1628
		} else {
1629
			sc->ps_enabled = false;
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1630 1631
			sc->ps_flags &= ~(PS_ENABLED |
					  PS_NULLFUNC_COMPLETED);
1632
			ath9k_setpower(sc, ATH9K_PM_AWAKE);
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			if (!(ah->caps.hw_caps &
			      ATH9K_HW_CAP_AUTOSLEEP)) {
				ath9k_hw_setrxabort(sc->sc_ah, 0);
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1636 1637 1638 1639
				sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
						  PS_WAIT_FOR_CAB |
						  PS_WAIT_FOR_PSPOLL_DATA |
						  PS_WAIT_FOR_TX_ACK);
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1640 1641
				if (ah->imask & ATH9K_INT_TIM_TIMER) {
					ah->imask &= ~ATH9K_INT_TIM_TIMER;
1642
					ath9k_hw_set_interrupts(sc->sc_ah,
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1643
							ah->imask);
1644
				}
1645 1646 1647 1648
			}
		}
	}

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1649 1650 1651 1652 1653 1654 1655 1656
	if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
		if (conf->flags & IEEE80211_CONF_MONITOR) {
			ath_print(common, ATH_DBG_CONFIG,
				  "HW opmode set to Monitor mode\n");
			sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
		}
	}

1657
	if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1658
		struct ieee80211_channel *curchan = hw->conf.channel;
1659
		int pos = curchan->hw_value;
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1660

1661 1662 1663
		aphy->chan_idx = pos;
		aphy->chan_is_ht = conf_is_ht(conf);

1664 1665 1666 1667 1668 1669 1670 1671 1672 1673
		if (aphy->state == ATH_WIPHY_SCAN ||
		    aphy->state == ATH_WIPHY_ACTIVE)
			ath9k_wiphy_pause_all_forced(sc, aphy);
		else {
			/*
			 * Do not change operational channel based on a paused
			 * wiphy changes.
			 */
			goto skip_chan_change;
		}
1674

1675 1676
		ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
			  curchan->center_freq);
1677

1678
		/* XXX: remove me eventualy */
1679
		ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1680

1681
		ath_update_chainmask(sc, conf_is_ht(conf));
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1682

1683
		if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1684 1685
			ath_print(common, ATH_DBG_FATAL,
				  "Unable to set channel\n");
1686
			mutex_unlock(&sc->mutex);
1687 1688
			return -EINVAL;
		}
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1689
	}
1690

1691
skip_chan_change:
1692
	if (changed & IEEE80211_CONF_CHANGE_POWER) {
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1693
		sc->config.txpowlimit = 2 * conf->power_level;
1694 1695
		ath_update_txpow(sc);
	}
1696

1697 1698 1699 1700
	spin_lock_bh(&sc->wiphy_lock);
	disable_radio = ath9k_all_wiphys_idle(sc);
	spin_unlock_bh(&sc->wiphy_lock);

1701
	if (disable_radio) {
1702
		ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1703
		sc->ps_idle = true;
1704
		ath_radio_disable(sc, hw);
1705 1706
	}

1707
	mutex_unlock(&sc->mutex);
1708

1709 1710 1711
	return 0;
}

1712 1713 1714 1715
#define SUPPORTED_FILTERS			\
	(FIF_PROMISC_IN_BSS |			\
	FIF_ALLMULTI |				\
	FIF_CONTROL |				\
1716
	FIF_PSPOLL |				\
1717 1718 1719
	FIF_OTHER_BSS |				\
	FIF_BCN_PRBRESP_PROMISC |		\
	FIF_FCSFAIL)
1720

1721 1722 1723 1724
/* FIXME: sc->sc_full_reset ? */
static void ath9k_configure_filter(struct ieee80211_hw *hw,
				   unsigned int changed_flags,
				   unsigned int *total_flags,
1725
				   u64 multicast)
1726
{
1727 1728
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1729
	u32 rfilt;
1730

1731 1732
	changed_flags &= SUPPORTED_FILTERS;
	*total_flags &= SUPPORTED_FILTERS;
1733

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1734
	sc->rx.rxfilter = *total_flags;
1735
	ath9k_ps_wakeup(sc);
1736 1737
	rfilt = ath_calcrxfilter(sc);
	ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1738
	ath9k_ps_restore(sc);
1739

1740 1741
	ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
		  "Set HW RX filter: 0x%x\n", rfilt);
1742
}
1743

1744 1745 1746
static int ath9k_sta_add(struct ieee80211_hw *hw,
			 struct ieee80211_vif *vif,
			 struct ieee80211_sta *sta)
1747
{
1748 1749
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1750

1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765
	ath_node_attach(sc, sta);

	return 0;
}

static int ath9k_sta_remove(struct ieee80211_hw *hw,
			    struct ieee80211_vif *vif,
			    struct ieee80211_sta *sta)
{
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;

	ath_node_detach(sc, sta);

	return 0;
1766 1767
}

1768
static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1769
			 const struct ieee80211_tx_queue_params *params)
1770
{
1771 1772
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1773
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1774 1775
	struct ath9k_tx_queue_info qi;
	int ret = 0, qnum;
1776

1777 1778
	if (queue >= WME_NUM_AC)
		return 0;
1779

1780 1781
	mutex_lock(&sc->mutex);

1782 1783
	memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));

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	qi.tqi_aifs = params->aifs;
	qi.tqi_cwmin = params->cw_min;
	qi.tqi_cwmax = params->cw_max;
	qi.tqi_burstTime = params->txop;
	qnum = ath_get_hal_qnum(queue, sc);
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1790 1791 1792 1793 1794
	ath_print(common, ATH_DBG_CONFIG,
		  "Configure tx [queue/halq] [%d/%d],  "
		  "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
		  queue, qnum, params->aifs, params->cw_min,
		  params->cw_max, params->txop);
1795

1796 1797
	ret = ath_txq_update(sc, qnum, &qi);
	if (ret)
1798
		ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
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1800 1801 1802 1803
	if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
		if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
			ath_beaconq_config(sc);

1804 1805
	mutex_unlock(&sc->mutex);

1806 1807
	return ret;
}
1808

1809 1810
static int ath9k_set_key(struct ieee80211_hw *hw,
			 enum set_key_cmd cmd,
1811 1812
			 struct ieee80211_vif *vif,
			 struct ieee80211_sta *sta,
1813 1814
			 struct ieee80211_key_conf *key)
{
1815 1816
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1817
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1818
	int ret = 0;
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1820 1821 1822
	if (modparam_nohwcrypt)
		return -ENOSPC;

1823
	mutex_lock(&sc->mutex);
1824
	ath9k_ps_wakeup(sc);
1825
	ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1826

1827 1828
	switch (cmd) {
	case SET_KEY:
1829
		ret = ath_key_config(common, vif, sta, key);
1830 1831
		if (ret >= 0) {
			key->hw_key_idx = ret;
1832 1833 1834 1835
			/* push IV and Michael MIC generation to stack */
			key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
			if (key->alg == ALG_TKIP)
				key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1836 1837
			if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
				key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1838
			ret = 0;
1839 1840 1841
		}
		break;
	case DISABLE_KEY:
1842
		ath_key_delete(common, key);
1843 1844 1845 1846
		break;
	default:
		ret = -EINVAL;
	}
1847

1848
	ath9k_ps_restore(sc);
1849 1850
	mutex_unlock(&sc->mutex);

1851 1852
	return ret;
}
1853

1854 1855 1856 1857 1858
static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
				   struct ieee80211_vif *vif,
				   struct ieee80211_bss_conf *bss_conf,
				   u32 changed)
{
1859 1860
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1861
	struct ath_hw *ah = sc->sc_ah;
1862
	struct ath_common *common = ath9k_hw_common(ah);
1863
	struct ath_vif *avp = (void *)vif->drv_priv;
1864
	int slottime;
1865
	int error;
1866

1867 1868
	mutex_lock(&sc->mutex);

1869 1870 1871 1872
	if (changed & BSS_CHANGED_BSSID) {
		/* Set BSSID */
		memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
		memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1873
		common->curaid = 0;
1874
		ath9k_hw_write_associd(ah);
1875

1876 1877
		/* Set aggregation protection mode parameters */
		sc->config.ath_aggr_prot = 0;
1878

1879 1880 1881
		/* Only legacy IBSS for now */
		if (vif->type == NL80211_IFTYPE_ADHOC)
			ath_update_chainmask(sc, 0);
1882

1883 1884 1885
		ath_print(common, ATH_DBG_CONFIG,
			  "BSSID: %pM aid: 0x%x\n",
			  common->curbssid, common->curaid);
1886

1887 1888 1889
		/* need to reconfigure the beacon */
		sc->sc_flags &= ~SC_OP_BEACONS ;
	}
1890

1891 1892 1893 1894 1895 1896 1897
	/* Enable transmission of beacons (AP, IBSS, MESH) */
	if ((changed & BSS_CHANGED_BEACON) ||
	    ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
		ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
		error = ath_beacon_alloc(aphy, vif);
		if (!error)
			ath_beacon_config(sc, vif);
1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916
	}

	if (changed & BSS_CHANGED_ERP_SLOT) {
		if (bss_conf->use_short_slot)
			slottime = 9;
		else
			slottime = 20;
		if (vif->type == NL80211_IFTYPE_AP) {
			/*
			 * Defer update, so that connected stations can adjust
			 * their settings at the same time.
			 * See beacon.c for more details
			 */
			sc->beacon.slottime = slottime;
			sc->beacon.updateslot = UPDATE;
		} else {
			ah->slottime = slottime;
			ath9k_hw_init_global_settings(ah);
		}
1917 1918
	}

1919 1920 1921
	/* Disable transmission of beacons */
	if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
		ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1922

1923 1924 1925 1926 1927 1928 1929 1930 1931
	if (changed & BSS_CHANGED_BEACON_INT) {
		sc->beacon_interval = bss_conf->beacon_int;
		/*
		 * In case of AP mode, the HW TSF has to be reset
		 * when the beacon interval changes.
		 */
		if (vif->type == NL80211_IFTYPE_AP) {
			sc->sc_flags |= SC_OP_TSF_RESET;
			ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1932 1933 1934
			error = ath_beacon_alloc(aphy, vif);
			if (!error)
				ath_beacon_config(sc, vif);
1935 1936
		} else {
			ath_beacon_config(sc, vif);
1937 1938 1939
		}
	}

1940
	if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1941 1942
		ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
			  bss_conf->use_short_preamble);
1943 1944 1945 1946 1947
		if (bss_conf->use_short_preamble)
			sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
		else
			sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
	}
1948

1949
	if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1950 1951
		ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
			  bss_conf->use_cts_prot);
1952 1953 1954 1955 1956 1957
		if (bss_conf->use_cts_prot &&
		    hw->conf.channel->band != IEEE80211_BAND_5GHZ)
			sc->sc_flags |= SC_OP_PROTECT_ENABLE;
		else
			sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
	}
1958

1959
	if (changed & BSS_CHANGED_ASSOC) {
1960
		ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1961
			bss_conf->assoc);
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1962
		ath9k_bss_assoc_info(sc, vif, bss_conf);
1963
	}
1964 1965

	mutex_unlock(&sc->mutex);
1966
}
1967

1968 1969 1970
static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
{
	u64 tsf;
1971 1972
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1973

1974 1975 1976
	mutex_lock(&sc->mutex);
	tsf = ath9k_hw_gettsf64(sc->sc_ah);
	mutex_unlock(&sc->mutex);
1977

1978 1979
	return tsf;
}
1980

1981 1982
static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
{
1983 1984
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1985

1986 1987 1988
	mutex_lock(&sc->mutex);
	ath9k_hw_settsf64(sc->sc_ah, tsf);
	mutex_unlock(&sc->mutex);
1989 1990
}

1991 1992
static void ath9k_reset_tsf(struct ieee80211_hw *hw)
{
1993 1994
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
1995

1996
	mutex_lock(&sc->mutex);
1997 1998

	ath9k_ps_wakeup(sc);
1999
	ath9k_hw_reset_tsf(sc->sc_ah);
2000 2001
	ath9k_ps_restore(sc);

2002
	mutex_unlock(&sc->mutex);
2003
}
2004

2005
static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2006
			      struct ieee80211_vif *vif,
2007 2008 2009
			      enum ieee80211_ampdu_mlme_action action,
			      struct ieee80211_sta *sta,
			      u16 tid, u16 *ssn)
2010
{
2011 2012
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
2013
	int ret = 0;
2014

2015 2016
	switch (action) {
	case IEEE80211_AMPDU_RX_START:
2017 2018
		if (!(sc->sc_flags & SC_OP_RXAGGR))
			ret = -ENOTSUPP;
2019 2020 2021 2022
		break;
	case IEEE80211_AMPDU_RX_STOP:
		break;
	case IEEE80211_AMPDU_TX_START:
2023
		ath9k_ps_wakeup(sc);
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2024
		ath_tx_aggr_start(sc, sta, tid, ssn);
2025
		ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2026
		ath9k_ps_restore(sc);
2027 2028
		break;
	case IEEE80211_AMPDU_TX_STOP:
2029
		ath9k_ps_wakeup(sc);
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2030
		ath_tx_aggr_stop(sc, sta, tid);
2031
		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2032
		ath9k_ps_restore(sc);
2033
		break;
2034
	case IEEE80211_AMPDU_TX_OPERATIONAL:
2035
		ath9k_ps_wakeup(sc);
2036
		ath_tx_aggr_resume(sc, sta, tid);
2037
		ath9k_ps_restore(sc);
2038
		break;
2039
	default:
2040 2041
		ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
			  "Unknown AMPDU action\n");
2042 2043 2044
	}

	return ret;
2045 2046
}

2047 2048
static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
{
2049 2050
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
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2051
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2052

2053
	mutex_lock(&sc->mutex);
2054 2055 2056 2057 2058 2059 2060
	if (ath9k_wiphy_scanning(sc)) {
		printk(KERN_DEBUG "ath9k: Two wiphys trying to scan at the "
		       "same time\n");
		/*
		 * Do not allow the concurrent scanning state for now. This
		 * could be improved with scanning control moved into ath9k.
		 */
2061
		mutex_unlock(&sc->mutex);
2062 2063 2064 2065 2066
		return;
	}

	aphy->state = ATH_WIPHY_SCAN;
	ath9k_wiphy_pause_all_forced(sc, aphy);
2067
	sc->sc_flags |= SC_OP_SCANNING;
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2068
	del_timer_sync(&common->ani.timer);
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2069
	cancel_delayed_work_sync(&sc->tx_complete_work);
2070
	mutex_unlock(&sc->mutex);
2071 2072 2073 2074
}

static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
{
2075 2076
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
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2077
	struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2078

2079
	mutex_lock(&sc->mutex);
2080
	aphy->state = ATH_WIPHY_ACTIVE;
2081
	sc->sc_flags &= ~SC_OP_SCANNING;
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2082
	sc->sc_flags |= SC_OP_FULL_RESET;
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2083
	ath_start_ani(common);
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2084
	ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2085
	ath_beacon_config(sc, NULL);
2086
	mutex_unlock(&sc->mutex);
2087 2088
}

2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100
static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
{
	struct ath_wiphy *aphy = hw->priv;
	struct ath_softc *sc = aphy->sc;
	struct ath_hw *ah = sc->sc_ah;

	mutex_lock(&sc->mutex);
	ah->coverage_class = coverage_class;
	ath9k_hw_init_global_settings(ah);
	mutex_unlock(&sc->mutex);
}

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struct ieee80211_ops ath9k_ops = {
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	.tx 		    = ath9k_tx,
	.start 		    = ath9k_start,
	.stop 		    = ath9k_stop,
	.add_interface 	    = ath9k_add_interface,
	.remove_interface   = ath9k_remove_interface,
	.config 	    = ath9k_config,
	.configure_filter   = ath9k_configure_filter,
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	.sta_add	    = ath9k_sta_add,
	.sta_remove	    = ath9k_sta_remove,
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	.conf_tx 	    = ath9k_conf_tx,
	.bss_info_changed   = ath9k_bss_info_changed,
	.set_key            = ath9k_set_key,
	.get_tsf 	    = ath9k_get_tsf,
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	.set_tsf 	    = ath9k_set_tsf,
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	.reset_tsf 	    = ath9k_reset_tsf,
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	.ampdu_action       = ath9k_ampdu_action,
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	.sw_scan_start      = ath9k_sw_scan_start,
	.sw_scan_complete   = ath9k_sw_scan_complete,
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Johannes Berg committed
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	.rfkill_poll        = ath9k_rfkill_poll_state,
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	.set_coverage_class = ath9k_set_coverage_class,
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};