Binding for simple memory mapped io fixed-rate clock sources.The driver reads a clock frequency value from a single 32-bit memory mappedI/O register and registers it as a fixed rate clock.It was designed for test systems, like FPGA, not for complete, finished SoCs.This binding uses the common clock binding[1].[1] Documentation/devicetree/bindings/clock/clock-bindings.txtRequired properties:- compatible : shall be "fixed-mmio-clock".- #clock-cells : from common clock binding; shall be set to 0.- reg : Address and length of the clock value register set.Optional properties:- clock-output-names : From common clock binding.Example:sysclock: sysclock@fd020004 { #clock-cells = <0>; compatible = "fixed-mmio-clock"; reg = <0xfd020004 0x4>;};