• Rodrigo Vivi's avatar
    drm/i915: Fix IPS related flicker · 066cf55b
    Rodrigo Vivi authored
    We cannot let IPS enabled with no plane on the pipe:
    
    BSpec: "IPS cannot be enabled until after at least one plane has
    been enabled for at least one vertical blank." and "IPS must be
    disabled while there is still at least one plane enabled on the
    same pipe as IPS." This restriction apply to HSW and BDW.
    
    However a shortcut path on update primary plane function
    to make primary plane invisible by setting DSPCTRL to 0
    was leting IPS enabled while there was no
    other plane enabled on the pipe causing flickerings that we were
    believing that it was caused by that other restriction where
    ips cannot be used when pixel rate is greater than 95% of cdclok.
    
    v2: Don't mess with Atomic path as pointed out by Ville.
    
    v3: Rebase after a long time and atomic path changes.
        Accept Ville suggestion of not check !fb
    
    v4: Re-factore on dinq
    
    Reference: https://bugs.freedesktop.org/show_bug.cgi?id=85583
    Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
    Cc: Jani Nikula <jani.nikula@intel.com>
    Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
    Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Tested-by: default avatarKenneth Graunke <kenneth@whitecape.org>
    [danvet: Make it compile]
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    066cf55b
intel_display.c 436 KB