• Emil Renner Berthing's avatar
    riscv: Fix auipc+jalr relocation range checks · 0966d385
    Emil Renner Berthing authored
    RISC-V can do PC-relative jumps with a 32bit range using the following
    two instructions:
    
    	auipc	t0, imm20	; t0 = PC + imm20 * 2^12
    	jalr	ra, t0, imm12	; ra = PC + 4, PC = t0 + imm12
    
    Crucially both the 20bit immediate imm20 and the 12bit immediate imm12
    are treated as two's-complement signed values. For this reason the
    immediates are usually calculated like this:
    
    	imm20 = (offset + 0x800) >> 12
    	imm12 = offset & 0xfff
    
    ..where offset is the signed offset from the auipc instruction. When
    the 11th bit of offset is 0 the addition of 0x800 doesn't change the top
    20 bits and imm12 considered positive. When the 11th bit is 1 the carry
    of the addition by 0x800 means imm20 is one higher, but since imm12 is
    then considered negative the two's complement representation means it
    all cancels out nicely.
    
    However, this addition by 0x800 (2^11) means an offset greater than or
    equal to 2^31 - 2^11 would overflow so imm20 is considered negative and
    result in a backwards jump. Similarly the lower range of offset is also
    moved down by 2^11 and hence the true 32bit range is
    
    	[-2^31 - 2^11, 2^31 - 2^11)
    Signed-off-by: default avatarEmil Renner Berthing <kernel@esmil.dk>
    Fixes: e2c0cdfb ("RISC-V: User-facing API")
    Cc: stable@vger.kernel.org
    Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
    0966d385
module.c 11.5 KB