• James Hogan's avatar
    MIPS: Fix cacheinfo overflow · 4828b5f5
    James Hogan authored
    The recently added MIPS cacheinfo support used a macro populate_cache()
    to populate the cacheinfo structures depending on which caches are
    present. However the macro contains multiple statements without
    enclosing them in a do {} while (0) loop, so the L2 and L3 cache
    conditionals in populate_cache_leaves() only conditionalised the first
    statement in the macro.
    
    This overflows the buffer allocated by detect_cache_attributes(),
    resulting in boot failures under QEMU where neither the L2 or L2 caches
    are present.
    
    Enclose the macro statements in a do {} while (0) block to keep the
    whole macro inside the conditionals.
    
    Fixes: ef462f3b ("MIPS: Add cacheinfo support")
    Reported-by: default avatarGuenter Roeck <linux@roeck-us.net>
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Tested-by: default avatarGuenter Roeck <linux@roeck-us.net>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: Justin Chen <justin.chen@broadcom.com>
    Cc: Florian Fainelli <f.fainelli@gmail.com>
    Cc: linux-mips@linux-mips.org
    Cc: bcm-kernel-feedback-list@broadcom.com
    Patchwork: https://patchwork.linux-mips.org/patch/15276/
    4828b5f5
cacheinfo.c 2.32 KB