• James Hogan's avatar
    MIPS: Fix MSA assembly with big thread offsets · 143e93d7
    James Hogan authored
    When lockdep is enabled on a 64-bit kernel the FPR offset into the
    thread structure exceeds the maximum range of the MSA ld.d/st.d
    instructions. For example THREAD_FPR31 = 4644 (instead of 2448), while
    the signed immediate field is only 10 bits with an implicit multiply by
    8, giving a maximum offset of 511*8 = 4088.
    
    This isn't a problem when the toolchain doesn't support MSA as the
    ld_*/st_* macros perform the addition separately into $1 with [d]addui
    which has a 16bit signed immediate field.
    
    Fix the case where the toolchain does support MSA by doing a single
    addition of THREAD_FPR0 into $1 with [d]addui, and doing the ld_*/st_*
    relative to that.
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Cc: Paul Burton <paul.burton@imgtec.com>
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/13064/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    143e93d7
asmmacro.h 14 KB