Add TI SERDES control registers compatible. This is a region found in the
TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a
SERDES clock and lane select mux.

[0] https://www.ti.com/lit/pdf/spruid7Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240205174736.27749-1-afd@ti.comSigned-off-by: Lee Jones <lee@kernel.org>