• Hauke Mehrtens's avatar
    spi: lantiq-ssc: add support for Lantiq SSC SPI controller · 17f84b79
    Hauke Mehrtens authored
    This driver supports the Lantiq SSC SPI controller in master
    mode. This controller is found on Intel (former Lantiq) SoCs like
    the Danube, Falcon, xRX200, xRX300.
    
    The hardware uses two hardware FIFOs one for received and one for
    transferred bytes. When the driver writes data into the transmit FIFO
    the complete word is taken from the FIFO into a shift register. The
    data from this shift register is then written to the wire. This driver
    uses the interrupts signaling the status of the FIFOs and not the shift
    register. It is also possible to use the interrupts for the shift
    register, but they will send a signal after every word. When using the
    interrupts for the shift register we get a signal when the last word is
    written into the shift register and not when it is written to the wire.
    After all FIFOs are empty the driver busy waits till the hardware is
    not busy any more and returns the transfer status.
    Signed-off-by: default avatarDaniel Schwierzeck <daniel.schwierzeck@gmail.com>
    Signed-off-by: default avatarHauke Mehrtens <hauke@hauke-m.de>
    Signed-off-by: default avatarMark Brown <broonie@kernel.org>
    17f84b79
Makefile 4.58 KB