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Suman Anna authored
The Power Sleep Controller (PSC) module contains specific memory-mapped registers that can be used to perform reset management using specific bits for the DSPs available on the SoC. The PSC is defined using a syscon node, and the reset functionality is defined using a child syscon reset controller node. Add this syscon reset controller node as well as the reset control data for the resets it supports for the 66AK2L SoCs. Signed-off-by:
Andrew F. Davis <afd@ti.com> Signed-off-by:
Suman Anna <s-anna@ti.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org>
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