drivers/clk/tegra/clk-pll.c · 1a7da87727acfc201141d67e6edf2fb4ddcab7db · Kirill Smelkov / linux

clk: tegra: fix SS control on PLL enable/disable · 1a7da877

Peter De Schrijver authored Jul 25, 2017



PLL SS was only controlled when setting the PLL rate, not when the PLL itself
is enabled or disabled.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

1a7da877

clk-pll.c 71.1 KB

Replace clk-pll.c