You need to sign in or sign up before continuing.
-
Magnus Damm authored
On Gen2 hardware the VSP1 is a bus master and accesses the display list and video buffers through DMA directly. On Gen3 hardware, however, memory accesses go through a separate IP core called FCP. The VSP1 driver unconditionally maps DMA buffers through the VSP device. While this doesn't cause any practical issue so far, DMA mappings will be incorrect as soon as we will enable IOMMU support for the FCP on Gen3 platforms, resulting in IOMMU faults. Fix this by mapping all buffers through the FCP device if present, and through the VSP1 device as usual otherwise. Suggested-by:
Magnus Damm <magnus.damm@gmail.com> [Cache the bus master device] Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by:
Mauro Cavalho Chehab <mchehab@s-opensource.com>
2cc2137f
