The recent introduction of ptep_set_access_flags() with the optimisation
of not flushing the TLB unfortunately broke ppc32 CPUs with no hash
table.

The data access exception code path in assembly for these doesn't
properly deal with the case where the TLB entry is present with the
wrong PAGE_RW and will just call do_page_fault again instead of just
replacing the TLB entry.

Fixing the asm code for all the different CPU types affected (yah,
embedded PPCs all have different MMUs =P) is painful and need testing I
can't do at the moment, so here's a fix that will just flush the TLB
page when changing the access flags on non-hash based machines.  Please
apply.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org