• Manivannan Sadhasivam's avatar
    dt-bindings: dvfs: Use MediaTek CPUFREQ HW as an example · cac2ed0a
    Manivannan Sadhasivam authored
    Qcom CPUFREQ HW don't have the support for generic performance domains yet.
    So use MediaTek CPUFREQ HW that has the support available in mainline.
    
    This also silences the below dtschema warnings for "cpufreq-qcom-hw.yaml":
    
    Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: reg: [[305397760, 4096]] is too short
            From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
    Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clocks' is a required property
            From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
    Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: 'clock-names' is a required property
            From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
    Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#freq-domain-cells' is a required property
            From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
    Documentation/devicetree/bindings/dvfs/performance-domain.example.dt.yaml: performance-controller@12340000: '#performance-domain-cells' does not match any of the regexes: 'pinctrl-[0-9]+'
            From schema: Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
    
    Cc: Hector Yuan <hector.yuan@mediatek.com>
    Cc: Sudeep Holla <sudeep.holla@arm.com>
    Signed-off-by: default avatarManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
    Acked-by: default avatarSudeep Holla <sudeep.holla@arm.com>
    Reviewed-by: default avatarRob Herring <robh@kernel.org>
    Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
    cac2ed0a
performance-domain.yaml 2.88 KB