• Andreas Irestål's avatar
    ASoC: adau17x1: Cache writes when core clock is disabled · 27d6e7d1
    Andreas Irestål authored
    In some configurations, the dai registers get written before the bias
    level is changed in the codec driver. This leads to a situation where
    an initial write to the serial port register gets ignored, and future
    writes may as well, since regmap thinks that the codec already holds the
    value. More specifically, configuring the codec as i2s master would in
    fact result in the codec running as slave, a situation where no i2s
    clocks are generated and hence no data is transferred.
    
    This change makes sure that regmap only caches writes when the core
    clock is disabled, and syncs regmap whenever enabling the core clock
    again.
    Signed-off-by: default avatarAndreas Irestål <andire@axis.com>
    Acked-by: default avatarLars-Peter Clausen <lars@metafoo.de>
    Signed-off-by: default avatarMark Brown <broonie@kernel.org>
    27d6e7d1
adau1761.c 25.9 KB