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Claudiu Beznea authored
SAMA7G5 introduces 64 and 256 oversampling rates. Due to this EMR.OSR is 3 bits long. Change the code to reflect this. Commit prepares the code for the addition of 64 and 256 oversampling rates. Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20220803102855.2191070-7-claudiu.beznea@microchip.com Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com>
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