• Andreas Herrmann's avatar
    x86, mtrr: Assume SYS_CFG[Tom2ForceMemTypeWB] exists on all future AMD CPUs · 3fdbf004
    Andreas Herrmann authored
    Instead of adapting the CPU family check in amd_special_default_mtrr()
    for each new CPU family assume that all new AMD CPUs support the
    necessary bits in SYS_CFG MSR.
    
    Tom2Enabled is architectural (defined in APM Vol.2).
    Tom2ForceMemTypeWB is defined in all BKDGs starting with K8 NPT.
    In pre K8-NPT BKDG this bit is reserved (read as zero).
    
    W/o this adaption Linux would unnecessarily complain about bad MTRR
    settings on every new AMD CPU family, e.g.
    
    [    0.000000] WARNING: BIOS bug: CPU MTRRs don't cover all of memory, losing 4863MB of RAM.
    
    Cc: stable@kernel.org # .32.x, .35.x
    Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann3@amd.com>
    LKML-Reference: <20100930123235.GB20545@loge.amd.com>
    Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
    3fdbf004
cleanup.c 24.7 KB