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Dmitry Osipenko authored
Define the table of memory controller hot resets for Tegra124. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
1b19b056
Define the table of memory controller hot resets for Tegra124. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>