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Maya Erez authored
In idle times 60G device can enter deep sleep and turn off its XTAL clock. Host access triggers the device power-up flow which will hold the AHB during XTAL stabilization until device switches from slow-clock to XTAL clock. This behavior can stall the PCIe bus for some arbitrary period of time. In order to prevent this stall, host can vote for High Latency Access Policy (HALP) before reading from PCIe bus. This vote will wakeup the device from deep sleep and prevent deep sleep until unvote is done. Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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