• David Gibson's avatar
    [PATCH] powerpc: Merge cacheflush.h and cache.h · 26ef5c09
    David Gibson authored
    The ppc32 and ppc64 versions of cacheflush.h were almost identical.
    The two versions of cache.h are fairly similar, except for a bunch of
    register definitions in the ppc32 version which probably belong better
    elsewhere.  This patch, therefore, merges both headers.  Notable
    points:
    	- there are several functions in cacheflush.h which exist only
    on ppc32 or only on ppc64.  These are handled by #ifdef for now, but
    these should probably be consolidated, along with the actual code
    behind them later.
    	- Confusingly, both ppc32 and ppc64 have a
    flush_dcache_range(), but they're subtly different: it uses dcbf on
    ppc32 and dcbst on ppc64, ppc64 has a flush_inval_dcache_range() which
    uses dcbf.  These too should be merged and consolidated later.
    	- Also flush_dcache_range() was defined in cacheflush.h on
    ppc64, and in cache.h on ppc32.  In the merged version it's in
    cacheflush.h
    	- On ppc32 flush_icache_range() is a normal function from
    misc.S.  On ppc64, it was wrapper, testing a feature bit before
    calling __flush_icache_range() which does the actual flush.  This
    patch takes the ppc64 approach, which amounts to no change on ppc32,
    since CPU_FTR_COHERENT_ICACHE will never be set there, but does mean
    renaming flush_icache_range() to __flush_icache_range() in
    arch/ppc/kernel/misc.S and arch/powerpc/kernel/misc_32.S
    	- The PReP register info from asm-ppc/cache.h has moved to
    arch/ppc/platforms/prep_setup.c
    	- The 8xx register info from asm-ppc/cache.h has moved to a
    new asm-powerpc/reg_8xx.h, included from reg.h
    	- flush_dcache_all() was defined on ppc32 (only), but was
    never called (although it was exported).  Thus this patch removes it
    from cacheflush.h and from ARCH=powerpc (misc_32.S) entirely.  It's
    left in ARCH=ppc for now, with the prototype moved to ppc_ksyms.c.
    
    Built for Walnut (ARCH=ppc), 32-bit multiplatform (pmac, CHRP and PReP
    ARCH=ppc, pmac and CHRP ARCH=powerpc).  Built and booted on POWER5
    LPAR (ARCH=powerpc and ARCH=ppc64).
    
    Built for 32-bit powermac (ARCH=ppc and ARCH=powerpc).  Built and
    booted on POWER5 LPAR (ARCH=powerpc and ARCH=ppc64).  Built and booted
    on G5 (ARCH=powerpc)
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
    Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
    26ef5c09
cacheflush.h 2.42 KB