• Paul Burton's avatar
    irqchip/mips-gic: Use effective affinity to unmask · d9f82930
    Paul Burton authored
    Commit 7778c4b2 ("irqchip: mips-gic: Use pcpu_masks to avoid reading
    GIC_SH_MASK*") adjusted the way we handle masking interrupts to set &
    clear the interrupt's bit in each pcpu_mask. This allows us to avoid
    needing to read the GIC mask registers and perform a bitwise and of
    their values with the pending & pcpu_masks.
    
    Unfortunately this didn't quite work for IPIs, which were mapped to a
    particular CPU/VP during initialisation but never set the affinity or
    effective_affinity fields of their struct irq_desc. This led to them
    losing their affinity when gic_unmask_irq() was called for them, and
    they'd all become affine to cpu0.
    
    Fix this by:
    
     1) Setting the effective affinity of interrupts in
        gic_shared_irq_domain_map(), which is where we actually map an
        interrupt to a CPU/VP. This ensures that the effective affinity mask
        is always valid, not just after explicitly setting affinity.
    
     2) Using an interrupt's effective affinity when unmasking it, which
        prevents gic_unmask_irq() from unintentionally changing which
        pcpu_mask includes an interrupt.
    
    
    Fixes: 7778c4b2 ("irqchip: mips-gic: Use pcpu_masks to avoid reading GIC_SH_MASK*")
    Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Cc: Marc Zyngier <marc.zyngier@arm.com>
    Cc: Jason Cooper <jason@lakedaemon.net>
    Link: https://lkml.kernel.org/r/20170922062440.23701-3-paul.burton@imgtec.com
    d9f82930
irq-mips-gic.c 19.5 KB