• Will Deacon's avatar
    drivers/perf: arm_pmu: Request PMU SPIs with IRQF_PER_CPU · a3287c41
    Will Deacon authored
    Since the PMU register interface is banked per CPU, CPU PMU interrrupts
    cannot be handled by a CPU other than the one with the PMU asserting the
    interrupt. This means that migrating PMU SPIs, as we do during a CPU
    hotplug operation doesn't make any sense and can lead to the IRQ being
    disabled entirely if we route a spurious IRQ to the new affinity target.
    
    This has been observed in practice on AMD Seattle, where CPUs on the
    non-boot cluster appear to take a spurious PMU IRQ when coming online,
    which is routed to CPU0 where it cannot be handled.
    
    This patch passes IRQF_PERCPU for PMU SPIs and forcefully sets their
    affinity prior to requesting them, ensuring that they cannot
    be migrated during hotplug events. This interacts badly with the DB8500
    erratum workaround that ping-pongs the interrupt affinity from the handler,
    so we avoid passing IRQF_PERCPU in that case by allowing the IRQ flags
    to be overridden in the platdata.
    
    Fixes: 3cf7ee98 ("drivers/perf: arm_pmu: move irq request/free into probe")
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Linus Walleij <linus.walleij@linaro.org>
    Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
    a3287c41
arm_pmu.c 21.4 KB