• Kan Liang's avatar
    perf/x86/intel: Add Alder Lake Hybrid support · f83d2f91
    Kan Liang authored
    Alder Lake Hybrid system has two different types of core, Golden Cove
    core and Gracemont core. The Golden Cove core is registered to
    "cpu_core" PMU. The Gracemont core is registered to "cpu_atom" PMU.
    
    The difference between the two PMUs include:
    - Number of GP and fixed counters
    - Events
    - The "cpu_core" PMU supports Topdown metrics.
      The "cpu_atom" PMU supports PEBS-via-PT.
    
    The "cpu_core" PMU is similar to the Sapphire Rapids PMU, but without
    PMEM.
    The "cpu_atom" PMU is similar to Tremont, but with different events,
    event_constraints, extra_regs and number of counters.
    
    The mem-loads AUX event workaround only applies to the Golden Cove core.
    
    Users may disable all CPUs of the same CPU type on the command line or
    in the BIOS. For this case, perf still register a PMU for the CPU type
    but the CPU mask is 0.
    
    Current caps/pmu_name is usually the microarch codename. Assign the
    "alderlake_hybrid" to the caps/pmu_name of both PMUs to indicate the
    hybrid Alder Lake microarchitecture.
    Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Reviewed-by: default avatarAndi Kleen <ak@linux.intel.com>
    Link: https://lkml.kernel.org/r/1618237865-33448-21-git-send-email-kan.liang@linux.intel.com
    f83d2f91
perf_event.h 38.3 KB