• Hugh Dickins's avatar
    x86/events/intel/ds: Fix bts_interrupt_threshold alignment · 2c991e40
    Hugh Dickins authored
    Markus reported that BTS is sporadically missing the tail of the trace
    in the perf_event data buffer: [decode error (1): instruction overflow]
    shown in GDB; and bisected it to the conversion of debug_store to PTI.
    
    A little "optimization" crept into alloc_bts_buffer(), which mistakenly
    placed bts_interrupt_threshold away from the 24-byte record boundary.
    Intel SDM Vol 3B 17.4.9 says "This address must point to an offset from
    the BTS buffer base that is a multiple of the BTS record size."
    
    Revert "max" from a byte count to a record count, to calculate the
    bts_interrupt_threshold correctly: which turns out to fix problem seen.
    
    Fixes: c1961a46 ("x86/events/intel/ds: Map debug buffers in cpu_entry_area")
    Reported-and-tested-by: default avatarMarkus T Metzger <markus.t.metzger@intel.com>
    Signed-off-by: default avatarHugh Dickins <hughd@google.com>
    Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
    Cc: Alexander Shishkin <alexander.shishkin@intel.com>
    Cc: Andi Kleen <andi.kleen@intel.com>
    Cc: Dave Hansen <dave.hansen@intel.com>
    Cc: Stephane Eranian <eranian@google.com>
    Cc: stable@vger.kernel.org # v4.14+
    Link: https://lkml.kernel.org/r/alpine.LSU.2.11.1807141248290.1614@eggly.anvils
    2c991e40
ds.c 45.8 KB