• Ville Syrjälä's avatar
    drm/i915: Drop the 64k linear scanout alignment on gen2/3 · 44c5905e
    Ville Syrjälä authored
    The docs don't support the 64k linear scanout alignment we impose
    on gen2/3. And it really makes no sense since we have no DSPSURF
    register, so the only thing that the hardware will see is the linear
    offset which will be just pixel aligned anyway.
    
    There is one case where 64k comes into the picture, and that's FBC.
    The start of the line length buffer corresponds to a 64k aligned
    address of the uncompressed framebuffer. So if the uncompressed fb is
    not 64k aligned, the first actually used entry in the line length
    buffer will not be byte 0. There are 32 extra entries in the line
    length buffer to account for this extra alignment so we shouldn't
    have to worry about it when mapping the uncompressed fb to the GTT.
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    44c5905e
intel_display.c 437 KB