Increase DSP cache window range to 2.5MB to align with ACP memory.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20231020062822.3913760-3-Vijendar.Mukunda@amd.comSigned-off-by: Mark Brown <broonie@kernel.org>