• Kishon Vijay Abraham I's avatar
    dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC · 4e0ae876
    Kishon Vijay Abraham I authored
    AM654x has two SERDES instances. Each instance has three input clocks
    (left input, externel reference clock and right input) and two output
    clocks (left output and right output) in addition to a PLL mux clock
    which the SERDES uses for Clock Multiplier Unit (CMU refclock).
    The PLL mux clock can select from one of the three input clocks.
    The right output can select between left input and external reference
    clock while the left output can select between the right input and
    external reference clock.
    
    The left and right input reference clock of SERDES0 and SERDES1
    respectively are connected to the SoC clock. In the case of two lane
    SERDES personality card, the left input of SERDES1 is connected to
    the right output of SERDES0 in a chained fashion.
    
    See section "Reference Clock Distribution" of AM65x Sitara Processors
    TRM (SPRUID7 – April 2018) for more details.
    
    Add dt-binding documentation in order to represent all these different
    configurations in device tree.
    Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
    4e0ae876
ti,phy-am654-serdes.txt 3.39 KB