Convert to YAML schemas for Xilinx NWL PCIe Root Port Bridge
dt binding.
Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221111053709.1474323-2-thippeswamy.havalige@amd.comSigned-off-by: Rob Herring <robh@kernel.org>