Power Down Release Command (PMVR, PMDAC, RSTN, PMDA1-PMDA6)
which are located on PW_MGMT1 / PW_MGMT3 register must be
write again after at least 5 LRCK cycle or later on each command.
Otherwise, Playback volume will be 0dB.
Basically, it should be

        1.   PowerDownRelease by Power Management1 <= call 1.x after 5LRCK
        1.x  Dummy write      to Power Management1
        2.   PowerDownRelease by Power Management3 <= call 2.x after 5LRCK
        2.x  Dummy write      to Power Management3

To avoid too many dummy write, this patch is merging these.

        1.   PowerDownRelease by Power Management1
        2.   PowerDownRelease by Power Management3   <= call after 5LRCK
        2.x  Dummy write      to Power Management1/3 <= merge dummy write

This patch adds dummy write when Playback Start timing.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>