Bay Trail / BYT SoCs do not have a builtin device-mode phy, instead
they require an external ULPI phy for device-mode.

Only some BYT devices have an external phy, but even on those devices
device-mode is not working because the dwc3 does not see the phy.

The problem is that the ACPI fwnode for the dwc3 does not contain the
expected GPIO resources for the GPIOs connected to the chip-select and
reset pins of the phy.

I've found the workaround which some Android x86 kernels use for this:
https://github.com/BORETS24/Kernel-for-Asus-Zenfone-2/blob/master/arch/x86/platform/intel-mid/device_libs/pci/platform_usb_otg.c
Which boils down to hardcoding the GPIOs for these devices.

The good news it that all boards (*) use the same GPIOs.

This commit fixes the ULPI phy not woring by adding a gpiod_lookup_table
call which adds a hardcoded mapping for BYT devices. Note that the mapping
added by gpiod_add_lookup_table is a fallback mapping, so boards which
properly provide GPIO resources in the ACPI firmware-node resources
will not use this.

*) Except for the first revision of the evalulation-kit, which normal users
don't have
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>