au1200fb allocates DMA memory using DMA_ATTR_NON_CONSISTENT, but never
calls dma_cache_sync to synchronize the memory between the CPU and the
device.  If it was use on a not cache coherent bus that would be fatal,
but as far as I can tell from the naming and the mips platform
implementation it always is used in cache coherent systems.  Remove
the DMA_ATTR_NON_CONSISTENT flag, which is a no-op in that case.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190625121321.10197-1-hch@lst.de