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Nícolas F. R. A. Prado authored
The binding expects the first register space to be VDEC_SYS. However this register space is already assigned to a different node on both MT8173 and MT8183: a clock-controller node called 'vdecsys' which is also a syscon. In order to resolve the overlapping address ranges, remove the VDEC_SYS register space from the video decoder, and add a new property to hold the phandle to the syscon, so that iospace can still be handled. Also add reg-names to be able to tell that this new register schema is used, so the driver can keep backward compatibility. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Hans Verkuil <hverkuil-cisco@xs4all.nl>
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