• Tao Su's avatar
    KVM: x86: Clear bit12 of ICR after APIC-write VM-exit · 629d3698
    Tao Su authored
    When IPI virtualization is enabled, a WARN is triggered if bit12 of ICR
    MSR is set after APIC-write VM-exit. The reason is kvm_apic_send_ipi()
    thinks the APIC_ICR_BUSY bit should be cleared because KVM has no delay,
    but kvm_apic_write_nodecode() doesn't clear the APIC_ICR_BUSY bit.
    
    Under the x2APIC section, regarding ICR, the SDM says:
    
      It remains readable only to aid in debugging; however, software should
      not assume the value returned by reading the ICR is the last written
      value.
    
    I.e. the guest is allowed to set bit 12.  However, the SDM also gives KVM
    free reign to do whatever it wants with the bit, so long as KVM's behavior
    doesn't confuse userspace or break KVM's ABI.
    
    Clear bit 12 so that it reads back as '0'. This approach is safer than
    "do nothing" and is consistent with the case where IPI virtualization is
    disabled or not supported, i.e.,
    
      handle_fastpath_set_x2apic_icr_irqoff() -> kvm_x2apic_icr_write()
    
    Opportunistically replace the TODO with a comment calling out that eating
    the write is likely faster than a conditional branch around the busy bit.
    
    Link: https://lore.kernel.org/all/ZPj6iF0Q7iynn62p@google.com/
    Fixes: 5413bcba
    
     ("KVM: x86: Add support for vICR APIC-write VM-Exits in x2APIC mode")
    Cc: stable@vger.kernel.org
    Signed-off-by: default avatarTao Su <tao1.su@linux.intel.com>
    Tested-by: default avatarYi Lai <yi1.lai@intel.com>
    Reviewed-by: default avatarChao Gao <chao.gao@intel.com>
    Link: https://lore.kernel.org/r/20230914055504.151365-1-tao1.su@linux.intel.com
    
    
    [sean: tweak changelog, replace TODO with comment, drop local "val"]
    Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
    629d3698
lapic.c 85.8 KB