• Chris Chiu's avatar
    pinctrl: intel: remap the pin number to gpio offset for irq enabled pin · 6cb0880f
    Chris Chiu authored
    On Asus X571GT, GPIO 297 is configured as an interrupt and serves
    for the touchpad. The touchpad will report input events much less
    than expected after S3 suspend/resume, which results in extremely
    slow cursor movement. However, the number of interrupts observed
    from /proc/interrupts increases much more than expected even no
    touching touchpad.
    
    This is due to the value of PADCFG0 of PIN 225 for the interrupt
    has been changed from 0x80800102 to 0x80100102. The GPIROUTIOXAPIC
    is toggled on which results in the spurious interrupts. The PADCFG0
    of PIN 225 is expected to be saved during suspend, but the 297 is
    saved instead because the gpiochip_line_is_irq() expect the GPIO
    offset but what's really passed to it is PIN number. In this case,
    the /sys/kernel/debug/pinctrl/INT3450:00/gpio-ranges shows
    
    288: INT3450:00 GPIOS [436 - 459] PINS [216 - 239]
    
    So gpiochip_line_is_irq() returns true for GPIO offset 297, the
    suspend routine spuriously saves the content for PIN 297 which
    we expect to save for PIN 225.
    
    This commit maps the PIN number to GPIO offset first in the
    intel_pinctrl_should_save() to make sure the values for the
    specific PINs can be correctly saved and then restored.
    
    Fixes: c538b943 ("pinctrl: intel: Only restore pins that are used by the driver")
    Signed-off-by: default avatarChris Chiu <chiu@endlessm.com>
    Acked-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
    Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
    6cb0880f
pinctrl-intel.c 41.2 KB