• Aurelien Jarno's avatar
    riscv: fix build with binutils 2.38 · 6df2a016
    Aurelien Jarno authored
    From version 2.38, binutils default to ISA spec version 20191213. This
    means that the csr read/write (csrr*/csrw*) instructions and fence.i
    instruction has separated from the `I` extension, become two standalone
    extensions: Zicsr and Zifencei. As the kernel uses those instruction,
    this causes the following build failure:
    
      CC      arch/riscv/kernel/vdso/vgettimeofday.o
      <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h: Assembler messages:
      <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
      <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
      <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
      <<BUILDDIR>>/arch/riscv/include/asm/vdso/gettimeofday.h:71: Error: unrecognized opcode `csrr a5,0xc01'
    
    The fix is to specify those extensions explicitely in -march. However as
    older binutils version do not support this, we first need to detect
    that.
    Signed-off-by: default avatarAurelien Jarno <aurelien@aurel32.net>
    Tested-by: default avatarAlexandre Ghiti <alexandre.ghiti@canonical.com>
    Cc: stable@vger.kernel.org
    Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
    6df2a016
Makefile 4.43 KB