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Oswald Buddenhagen authored
Unlike the Alice2 chips used on 1st generation E-MU cards, the Tina/Tina2 chips used on the 2nd gen cards have only six GPIN pins, which means that we need to use a smaller mask. Failure to do so would falsify the read data if the FPGA tried to raise an IRQ right at that moment. This wasn't a problem so far, as we didn't actually enable FPGA IRQs, but that's going to change soon. Signed-off-by:
Oswald Buddenhagen <oswald.buddenhagen@gmx.de> Link: https://lore.kernel.org/r/20230422132430.1057490-1-oswald.buddenhagen@gmx.deSigned-off-by:
Takashi Iwai <tiwai@suse.de>
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